Texas Instruments UCC28500N

Overview

UCC28500N from Texas Instruments is a dual-stage power factor correction (PFC) and DC-DC controller IC integrating average-current-mode PFC control with peak-current-mode downstream PWM control. It delivers near-unity power factor, programmable 100 kHz oscillator frequency, 7.5 V reference accuracy ±1.5%, and synchronized leading-edge (PFC) / trailing-edge (DC-DC) modulation for reduced bulk capacitor ripple in universal-input AC-DC supplies.

For engineers reviewing the UCC28500N datasheet, UCC28500N pinout, UCC28500N application, or UCC28500N equivalent, key selection criteria include its 16.5 V/10 V UVLO threshold for bootstrap bias operation, dual-gate drivers (GT1/GT2) with 5–12 Ω pull-up resistance, and integrated feedforward line regulation via VFF pin for stable input power across 85–265 V_RMS inputs.

Technical Context

The UCC28500N implements a two-stage control architecture: the PFC stage uses average current-mode control with a high-linearity analog multiplier (IAC-to-MOUT), voltage amplifier (VAOUT), and CAOUT current-sense amplifier to shape line current; the second stage employs peak-current-mode control with external error feedback on VERR and internal slope compensation via ISENSE2.

Its feedforward path generates VFF by mirroring IAC through an external RC filter, enabling constant input power regulation over 3:1 input voltage range without high-voltage components. The device enforces synchronized start-up-holding GT2 inactive until VAOUT reaches ≥90% of regulation-and provides programmable soft-start (SS2) and dual UVLO thresholds (VCC and UVLO2) for robust sequencing.

Key Specifications

Pinout & Package

UCC28500N is housed in a 20-pin plastic DIP (N) package with 0.3-inch body width and through-hole mounting. Thermal performance supports 1 W dissipation at T_J ≤ 125°C with standard PCB copper area.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-stage PFC+PWM controller applications.

Compared with UCC28502N, the UCC28500N provides tighter UVLO2 hysteresis for faster response to moderate line sags, while UCC28070N offers superior harmonic suppression but increases system component count and design complexity.

Availability

UCC28500N is available at Aetrix Electronics and suitable for server power supplies, industrial motor drives, medical imaging equipment, and telecom rectifiers requiring stable component supply and long-term production continuity.

Supply support for UCC28500N includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of power conversion innovation.

The UCC28500N belongs to TI's UCC2850x family of integrated PFC+PWM controllers, designed specifically for cost-sensitive, high-reliability two-stage AC-DC power supplies targeting enterprise, industrial, and medical applications.

FAQ

What is the primary function of the UCC28500N in an AC-DC power supply?

The UCC28500N integrates control for both the boost PFC preregulator and the downstream DC-DC converter in a single IC. It shapes the input current waveform to achieve near-unity power factor using average current-mode control, then regulates the isolated output using peak-current-mode PWM. Its synchronized leading-edge (PFC) and trailing-edge (DC-DC) modulation minimizes ripple current in the bulk capacitor, directly improving reliability and reducing EMI in the UCC28500N-based design.

How does the UCC28500N implement line voltage feedforward?

The UCC28500N generates the VFF signal by mirroring the IAC current input through an internal 2:1 current mirror into an external RC filter. This produces a DC voltage proportional to the RMS line voltage, which scales the analog multiplier's gain to maintain constant input power across 85–265 V_RMS inputs. Unlike traditional methods requiring high-voltage dividers, this technique eliminates costly high-voltage components and reduces part count-key to the UCC28500N's cost-effective implementation.

What are the critical UVLO thresholds for the UCC28500N and how do they affect system behavior?

The UCC28500N features two UVLO thresholds: VCC UVLO turns on at 16.5 V and off at 10 V, enabling bootstrap startup from the bulk capacitor; UVLO2 for the DC-DC stage activates at 6.75 V with 1.2 V hysteresis, shutting down GT2 if the PFC output falls below 74% of nominal. These thresholds ensure safe sequencing-preventing GT2 from turning on prematurely-and graceful shutdown during brownouts, making the UCC28500N robust in real-world grid conditions.

Can the UCC28500N support both voltage-mode and current-mode control for the DC-DC stage?

Yes-the UCC28500N supports both modes. For current-mode control, the external error signal connects to VERR, and the ISENSE2 pin receives the current-sense signal plus optional slope compensation from the CT ramp. For voltage-mode control, the CT ramp is fed back into ISENSE2 via a voltage divider, allowing the internal oscillator ramp to provide slope compensation. This flexibility lets designers optimize transient response and loop stability based on topology-critical for reliable UCC28500N deployment across forward, flyback, and LLC converters.

What is the role of the SS2 pin in the UCC28500N and how is it implemented?

The SS2 pin controls soft-start for the DC-DC stage: during enable, an internal –10 µA current source charges an external capacitor, ramping the effective error voltage and limiting GT2 duty cycle until regulation is achieved. On disable or UVLO2 dropout, SS2 discharges rapidly via a 3–10 mA sink, forcing immediate GT2 shutdown. This prevents inrush current and transformer saturation-especially vital in high-power UCC28500N applications like server PSUs where hold-up capacitors exceed 1000 µF.