Texas Instruments UCC28517DWR
- Part No.:
- UCC28517DWR
- Manufacturer:
- Texas Instruments
- Category:
- PFC (Power Factor Correction)
- Package:
- 20-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
UCC28517DWR.pdf
- Description:
- IC PFC CTR AVERAGE 200KHZ 20SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,536
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
UCC28517DWR from Texas Instruments is a dual-stage combination controller integrating average-current-mode PFC and peak-current-mode PWM control in a single SOIC-20 package. It delivers 2-A source / 3-A sink gate drive for both stages, supports 1:2 PFC:PWM frequency ratio (PWM at 2× PFC), and enables leading-edge PFC + trailing-edge PWM modulation to minimize boost capacitor ripple. It is used in AC/DC front-end power supplies complying with IEC 61000-3-2 harmonic standards.
For engineers reviewing the UCC28517DWR datasheet, UCC28517DWR pinout, UCC28517DWR application, or UCC28517DWR equivalent, key selection criteria include its programmable PWM maximum duty cycle (70–80%), zero-power detect functionality, UVLO2 turn-off threshold of 3.55 V, and compatibility with boost PFC + flyback/buck-derived PWM topologies.
Technical Context
The UCC28517DWR implements a tightly synchronized dual-control architecture: the PFC section uses average-current-mode control with input voltage feedforward and a highly linear three-input multiplier, while the PWM stage employs peak-current-mode control with slope compensation via CT_BUFF. The 1:2 frequency ratio (e.g., 200 kHz PWM / 100 kHz PFC) is fixed for this variant and reduces output capacitor stress.
Startup sequencing is hardware-managed: PWM remains suppressed until PFC output reaches 90% of regulation; during line dropout, PWM continues operating until PFC output falls to 47% of nominal. Gate drivers GT1 and GT2 each provide 2-A source / 3-A sink capability with ≤25 ns rise/fall times into 1-nF loads, supporting fast-switching MOSFETs in high-efficiency designs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PFC:PWM Frequency Ratio | Fixed 1:2 - PWM operates at twice PFC frequency (e.g., 200 kHz PWM / 100 kHz PFC), reducing boost capacitor RMS current. |
| UVLO2 Turn-Off Threshold | 3.55 V - Enables extended hold-up time by sustaining PWM operation deeper into brownout conditions. |
| Maximum PWM Duty Cycle | 70–80% - Programmable via D_MAX pin voltage; prevents transformer saturation in flyback/forward topologies. |
| Zero-Power Detect Threshold | 0.20–0.50 V on VAOUT - Disables PFC gate drive when output power drops near zero, improving light-load efficiency. |
| Gate Drive Capability (GT1/GT2) | 2-A source / 3-A sink - Drives high-side MOSFETs directly without external buffers in <300 W applications. |
| PFC Peak Current Limit Reference | 0 V at PKLMT pin - Enables accurate overcurrent protection using resistor-divider offset from VREF. |
| Operating Temperature Range | −40°C to +105°C - Qualified for industrial and telecom power supply environments. |
Pinout & Package
UCC28517DWR is housed in a 20-pin SOIC (DW) package with 0.65 mm pitch, thermally optimized for surface-mount assembly and rated for 0.7 W power dissipation. Pin functions are electrically isolated between analog (GND) and power (PWRGND) grounds, requiring Kelvin connection per TI layout guidelines.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GT1 (12) | PFC gate driver output | 2-A source / 3-A sink totem pole drives PFC switch; disabled below UVLO. |
| GT2 (10) | PWM gate driver output | Identical drive strength to GT1; PWM stage enabled only after PFC reaches 90% regulation. |
| VSENSE (3) | PFC voltage error amplifier inverting input | Feedback node for PFC output voltage regulation; also feeds OVP, ENABLE, and UVLO2 comparators. |
| VAOUT (1) | PFC transconductance amplifier output | Regulates PFC output; sinks up to 3.3 mA during slew enhancement; triggers zero-power shutdown below 0.33 V. |
| IAC (18) | PFC multiplier current input | Accepts rectified line voltage-derived current (≤500 µA); enables input voltage feedforward for line regulation. |
| VFF (19) | PFC voltage feedforward output | Sources IAC/2 current; external RC filter generates feedforward voltage (1.4 V at low line, 4.7 V at high line). |
| CT_BUFF (5) | PWM oscillator ramp buffer | 4-V amplitude buffered ramp; connects directly to ISENSE2 for slope compensation in peak-current-mode control. |
| D_MAX (4) | PWM max duty cycle clamp input | Analog voltage (0.09–0.90 × VREF) sets 70–80% max duty cycle; critical for transformer reset margin. |
| SS2 (13) | PWM soft-start timing node | Capacitor-to-ground sets PWM startup ramp time; internal 10.5 µA current charges SS2 to 3 V. |
| PWRGND (11) | Power ground return | Kelvin-connected to GND; carries high di/dt currents from GT1/GT2 drivers to minimize noise coupling. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated PFC + PWM control | Eliminates inter-stage timing mismatches and reduces BOM count vs. discrete controllers. |
| Leading-edge PFC + trailing-edge PWM modulation | Reduces RMS ripple current in boost output capacitor by >30% vs. TEM/TEM schemes. |
| Programmable PWM maximum duty cycle | Prevents core saturation in two-transistor forward and flyback converters without external clamping. |
| Zero-power detect with hysteresis | Shuts down PFC stage at light load (VAOUT < 0.33 V), cutting standby power consumption. |
| Independent UVLO2 for PWM stage | Allows PWM to remain active during deep line sags (down to 47% PFC output), extending hold-up time. |
Applications
| Server Power Supply | Industrial AC/DC Adapter |
|---|---|
|
Use Scenario: 300–600 W front-end with boost PFC followed by LLC or flyback secondary. IC Role / Device Role / Timing Role: UCC28517DWR provides synchronized PFC and PWM control with 1:2 frequency ratio and hardware-enforced startup sequencing. Use Value: Meets IEC 61000-3-2 Class A harmonics limits while enabling compact boost capacitor selection due to reduced ripple. |
Use Scenario: 150–300 W enclosed industrial power module with wide input range (85–265 VAC). IC Role / Device Role / Timing Role: UCC28517DWR manages continuous-conduction-mode PFC and peak-current-mode flyback PWM with programmable duty clamp. Use Value: UVLO2 turn-off at 3.55 V sustains output during brownouts; zero-power detect cuts no-load input power to <300 mW. |
| Telecom Rectifier | Medical Grade AC/DC Converter |
|
Use Scenario: -48 V DC output telecom rectifier with active PFC and forward converter secondary. IC Role / Device Role / Timing Role: UCC28517DWR controls boost PFC stage and two-transistor forward PWM with D_MAX-based duty limiting. Use Value: Programmable 70–80% max duty cycle ensures safe transformer reset under all line/load conditions. |
Use Scenario: 250 W medical AC/DC power supply requiring 2× MOPP isolation and low EMI. IC Role / Device Role / Timing Role: UCC28517DWR implements leading-edge PFC + trailing-edge PWM to minimize conducted EMI from boost capacitor ripple. Use Value: CT_BUFF ramp output enables precise slope compensation, stabilizing peak-current-mode control across line/load variations. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PFC+PWM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC28516DWR | Same 1:2 PFC:PWM ratio and 3.55 V UVLO2 turn-off, but UVLO hysteresis is 3.2 V (vs. 2.56–3.84 V range in UCC28517DWR). | Designed for identical boost PFC + flyback use cases; differs only in UVLO hysteresis profile for specific brownout recovery behavior. | Select UCC28516DWR if system requires tighter UVLO2 hysteresis (3.2 V) for predictable restart timing after line sag. |
| ICE3PCS01G | Standalone PFC controller (no integrated PWM); requires external PWM IC; supports CCM/DCM modes; lower gate drive (0.6 A sink). | Used where PFC and PWM stages demand independent optimization (e.g., resonant LLC secondary); lacks hardware sequencing. | Choose ICE3PCS01G only when full design flexibility across stages outweighs integration benefits and BOM reduction of UCC28517DWR. |
Compared with UCC28516DWR, UCC28517DWR offers broader UVLO2 hysteresis tuning (2.56–3.84 V), enabling finer hold-up time control; versus ICE3PCS01G, UCC28517DWR eliminates inter-controller timing skew and reduces component count by 30% in boost+flyback systems.
Availability
UCC28517DWR is available at Aetrix Electronics and suitable for server power supplies, industrial AC/DC adapters, and telecom rectifiers requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for UCC28517DWR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management ICs.
The UCC28517DWR belongs to TI's UCC2851x family of combination PFC/PWM controllers, designed specifically for cost-sensitive, high-efficiency AC/DC front-ends requiring IEC 61000-3-2 compliance and simplified system-level timing.
FAQ
What is the PFC:PWM frequency ratio supported by the UCC28517DWR?
The UCC28517DWR supports a fixed 1:2 PFC:PWM frequency ratio - the PWM stage operates at twice the PFC switching frequency (e.g., 200 kHz PWM with 100 kHz PFC). This ratio is hard-coded in silicon and cannot be changed via external components. It is confirmed in the "Available Options" table and functional description of the UCC28517DWR datasheet SLUS517C.
How does the UCC28517DWR implement zero-power detection?
The UCC28517DWR monitors the VAOUT pin voltage: when VAOUT falls below 0.20–0.50 V (typ. 0.33 V), the internal zero-power comparator disables GT1 gate drive. This feature is explicitly documented in the "Zero Power" electrical characteristics table and pin description for VAOUT in the UCC28517DWR datasheet.
What is the purpose of the CT_BUFF pin on the UCC28517DWR?
The CT_BUFF pin on the UCC28517DWR provides a buffered 4-V amplitude PWM oscillator ramp signal. It is intended to connect directly to the ISENSE2 pin via a single resistor to inject slope compensation into the peak-current-mode PWM comparator - a function verified in the "Oscillator" and "PWM stage pulse-by-pulse current sense" sections of the UCC28517DWR datasheet.
Can the UCC28517DWR be used with a flyback PWM topology?
Yes - the UCC28517DWR is explicitly validated for flyback PWM topologies, as shown in Figure 1 ("Typical Application Circuit") and stated in the "Selection of Controller Options" section. Its programmable D_MAX pin allows setting 70–80% maximum duty cycle to prevent transformer saturation, a critical requirement for flyback designs.
What is the UVLO2 turn-off threshold for the UCC28517DWR?
The UCC28517DWR has a UVLO2 turn-off threshold of 3.55 V, as specified in the "PWM stage undervoltage lockout (UVLO2)" table of the datasheet. This value is fixed for the UCC28517 variant and enables extended PWM operation during line sags - the device continues switching until PFC output drops to 47% of nominal.
UCC28517DWR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Mode:
- Average Current
- Frequency - Switching:
- 200kHz
- Current - Startup:
- 100 µA
- Voltage - Supply:
- 9.7V ~ 18V
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-SOIC
UCC28517DWR FAQ
1.How can I place an order for UCC28517DWR through Aetrix?
Please submit a Request for Quotation (RFQ) for UCC28517DWR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UCC28517DWR reliable?
The price and inventory of UCC28517DWR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UCC28517DWR is usually 5 days.
3.What payment methods are accepted for UCC28517DWR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UCC28517DWR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UCC28517DWR?
UCC28517DWR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UCC28517DWR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UCC28517DWR?
For technical support, including UCC28517DWR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UCC28517DWR requirements.
6.How does Aetrix verify that UCC28517DWR is sourced from the original manufacturer or authorized distributors?
All UCC28517DWR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCC28517DWR meets industry standards.
7.What is the process for return or replacement of UCC28517DWR?
All UCC28517DWR units undergo pre-shipment inspection (PSI). If there is an issue with UCC28517DWR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UCC28517DWR part is unused and in its original packaging.
Return procedure for UCC28517DWR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
UCC28517DWR Tags

-
ICE2PCS01GXUMA1
Infineon Technologies
-
NCP1654BD133R2G
onsemi
-
MC33262DR2G
onsemi

-
ICE3PCS03GXUMA1
Infineon Technologies
-
NCP1631DR2G
onsemi

-
L4981BD013TR
STMicroelectronics

-
UCC28070DWR
Texas Instruments

-
UCC28070PWR
Texas Instruments

-
UC3854DWTR
Texas Instruments

-
L4981AD013TR
STMicroelectronics
-
UCC2817D
Texas Instruments

-
UC2854BDWTR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
