Texas Instruments UCC28521DWRG4
- Part No.:
- UCC28521DWRG4
- Manufacturer:
- Texas Instruments
- Category:
- PFC (Power Factor Correction)
- Package:
- 20-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
UCC28521DWRG4.pdf
- Description:
- IC PFC CTR AVERAGE 200KHZ 20SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,909
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Product details
Overview
UCC28521DWRG4 from Texas Instruments is a dual-stage PFC/PWM combination controller IC for off-line AC-DC power supplies, implementing trailing-edge modulation for both stages, average-current-mode PFC control with input voltage feedforward, and peak-current-mode PWM control with programmable 75% maximum duty cycle clamp, targeting IEC61000-3-2 compliance in high-efficiency server and telecom power supplies.
For engineers reviewing the UCC28521DWRG4 datasheet, UCC28521DWRG4 pinout, UCC28521DWRG4 application, or UCC28521DWRG4 equivalent, key selection criteria include its 200 kHz nominal switching frequency, 2-A source / 3-A sink gate drivers for GT1 and GT2, 7.5-V precision reference, zero-power detect function, and 1:1 PFC:PWM frequency ratio - all validated for continuous conduction mode boost PFC and isolated flyback PWM topologies.
Technical Context
The UCC28521DWRG4 integrates two independent control loops: a PFC section using a three-input linearized multiplier (IAC × VFF × VAOUT) with transconductance voltage amplifier and current error amplifier, and a PWM section featuring peak-current-mode operation with slope compensation via CT_BUFF, programmable soft-start on SS2, and UVLO2 turn-off at 5.3 V. Both stages share a common oscillator programmed by RT and operate at identical 1:1 frequency ratio.
Startup sequencing is hardware-controlled: PWM remains disabled until PFC output reaches 90% of regulation, and during line dropout, PWM continues operating until PFC bulk voltage falls to 71% of nominal - a behavior distinguishing UCC28521DWRG4 from UCC28528DW. Gate drivers GT1 and GT2 deliver 16-ns rise / 7-ns fall times into 1-nF loads with 5–12 Ω pull-up/pull-down resistance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PFC:PWM Frequency Ratio | 1:1 - ensures synchronized timing between boost PFC and flyback PWM stages without external clock alignment. |
| Max Duty Cycle Clamp | 75% typical - limits GT2 conduction time to prevent transformer saturation and ensure stable regulation under transient load. |
| Gate Drive Strength | 2-A source / 3-A sink per GT1/GT2 - directly drives MOSFET gates without external buffers in ≤300-W designs. |
| Reference Voltage | 7.5 V ±1.5% - powers internal circuitry and serves as precision bias for feedback dividers and D_MAX programming. |
| Zero Power Detect Threshold | 0.33 V on VAOUT - disables GT1 when PFC output collapses, eliminating standby losses in no-load conditions. |
| UVLO Hysteresis | 0.5 V - prevents oscillation during brown-out by separating turn-on (10.2 V) and turn-off (9.7 V) thresholds on VCC. |
| Operating Temperature | −40°C to +105°C - supports industrial-grade thermal reliability in enclosed server and telecom power enclosures. |
Pinout & Package
UCC28521DWRG4 is housed in a 20-pin SOIC Wide (DW) package with 1.27-mm pitch, 12.8-mm body width, and exposed thermal pad (not electrically connected). Pin numbering follows standard TI DW outline (pin 1 = VAOUT, pin 20 = VREF), with separate analog ground (GND) and power ground (PWRGND) terminals for noise isolation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GT1 (12) | PFC gate driver output | 2-A source / 3-A sink totem pole driving boost MOSFET; disabled below UVLO threshold. |
| GT2 (10) | PWM gate driver output | Identical drive strength to GT1; duty cycle controlled by VERR and clamped by D_MAX voltage. |
| VSENSE (3) | PFC voltage feedback input | Inverting input to transconductance amplifier; connects to output divider; enables OVP/enable/UVLO2 functions. |
| IAC (18) | Line voltage sensing current input | Accepts rectified line current up to 500 µA; feeds multiplier for input voltage feedforward. |
| VFF (19) | Voltage feedforward input | Sources IAC/2 current; external RC filter sets feedforward gain to maintain constant power across line range. |
| CAOUT (15) | PFC current amplifier output | Drives PFC comparator; compensation network placed between CAOUT and MOUT for loop stability. |
| MOUT (17) | Multiplier output / current amp input | High-impedance node linking multiplier and current amplifier; sets PFC power range via resistor to sense resistor. |
| SS2 (13) | PWM soft-start capacitor | 10.5-µA internal charge current ramps VERR to limit inrush; fast discharge disables PWM on fault. |
| D_MAX (4) | PWM max duty cycle control | 0.09–0.90 input voltage linearly sets GT2 duty limit; 4.15 V yields 75% typical clamp. |
| VREF (20) | 7.5-V precision reference output | Supplies bias for external resistors; delivers ≥10 mA; bypassed with 0.1–10 µF ceramic to GND. |
Key Features
| Feature | Design Value |
|---|---|
| Average-current-mode PFC control | Enables continuous conduction mode operation with near-unity power factor and low THD across universal AC input (85–265 VAC). |
| Input voltage feedforward (VFF) | Compensates for line variation in real time, maintaining constant output power and improving load transient response by >30% vs non-feedforward designs. |
| Programmable PWM soft-start (SS2) | External capacitor sets controlled ramp time for GT2 duty cycle, preventing inrush current and transformer saturation at startup. |
| Zero power detect | Turns off GT1 when VAOUT drops below 0.33 V, eliminating PFC stage switching losses during standby or no-load conditions. |
| Accurate power limiting | Uses IMOUT × VFF product to clamp PFC output power within ±5% tolerance, ensuring compliance with IEC61000-3-2 Class D limits. |
Applications
| Server Power Supply | Telecom AC-DC Converter |
|---|---|
Use Scenario: 80 PLUS Platinum-certified 500-W ATX power supply with active PFC front-end and dual forward/flyback secondary. IC Role / Device Role / Timing Role: UCC28521DWRG4 provides synchronized PFC and PWM control with 1:1 frequency ratio, enabling single-chip management of boost PFC and main DC-DC conversion stages. Use Value: Reduces BOM count by eliminating separate PFC and PWM controllers, cuts PCB area by 35%, and achieves <0.99 PF at full load with <5% THD. | Use Scenario: -48 V telecom rectifier module requiring IEC61000-3-2 Class C compliance and hold-up time >20 ms. IC Role / Device Role / Timing Role: UCC28521DWRG4 implements average-current-mode PFC with input voltage feedforward and peak-current-mode PWM for isolated flyback output stage. Use Value: Delivers 92% efficiency at 50% load and meets harmonic current limits up to 2 kHz without additional filtering components. |
| Industrial Motor Drive PSU | Medical Imaging Power System |
Use Scenario: 3-phase input rectifier feeding isolated DC bus for servo motor control, requiring low EMI and high reliability. IC Role / Device Role / Timing Role: UCC28521DWRG4 controls interleaved boost PFC and resonant LLC PWM stage via external synchronization signals derived from CT_BUFF. Use Value: Enables deterministic timing between PFC and PWM stages, reducing conducted EMI by 12 dBµV and supporting 15-year field life under thermal cycling. | Use Scenario: MRI gradient amplifier power supply demanding ultra-low standby loss and rapid wake-up from sleep mode. IC Role / Device Role / Timing Role: UCC28521DWRG4 manages PFC and auxiliary PWM rails with zero-power detect disabling GT1 during imaging idle periods. Use Value: Achieves <150 mW no-load input power and <500-µs wake-up latency from zero-power state, meeting IEC60601-1 leakage and efficiency requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PFC/PWM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC28528DW | PWM stage remains active until VCC drops below UVLO threshold; no 71% bulk voltage shutdown logic. | Designed for auxiliary/standby converters where continuous PWM operation during PFC collapse is required. | Select UCC28528DW only when main DC-DC must remain powered during brown-out events; not drop-in compatible due to differing UVLO2 behavior. |
| ICE2PCS01 | Fixed 65 kHz PFC frequency; no programmable PWM duty clamp; integrated 600-V startup circuit. | Targeted at cost-sensitive consumer SMPS; lacks zero-power detect and precise 7.5-V reference. | Choose ICE2PCS01 for <100-W applications with fixed-frequency constraints; UCC28521DWRG4 offers superior transient response and design flexibility. |
Compared with UCC28528DW and ICE2PCS01, UCC28521DWRG4 uniquely combines programmable PWM duty clamping, zero-power detection, and 1:1 synchronized PFC/PWM operation - making it the only option among the three suitable for high-efficiency, IEC61000-3-2-compliant server and telecom main power supplies requiring precise bulk voltage sequencing.
Availability
UCC28521DWRG4 is available at Aetrix Electronics and suitable for high-efficiency server power supplies, telecom AC-DC converters, and industrial motor drive PSUs requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for UCC28521DWRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with over 50 years of power management innovation and broad distribution through authorized channels.
The UCC28521DWRG4 belongs to TI's UCC285xx family of combination PFC/PWM controllers, designed specifically for high-density, high-efficiency off-line power systems needing IEC61000-3-2 harmonic compliance and simplified system-level integration.
FAQ
What is the primary function of the UCC28521DWRG4 in a power supply design?
The UCC28521DWRG4 integrates PFC and PWM control into a single IC to manage both the boost PFC front-end and isolated DC-DC conversion stage. It implements average-current-mode PFC with input voltage feedforward and peak-current-mode PWM with programmable duty cycle clamping, enabling compact, high-efficiency AC-DC power supplies compliant with IEC61000-3-2. Its 1:1 PFC:PWM frequency ratio and hardware-enforced startup sequencing make it ideal for server and telecom applications where reliability and harmonic performance are critical. The UCC28521DWRG4 eliminates the need for discrete timing coordination between stages.
How does the zero-power detect feature operate in the UCC28521DWRG4?
The UCC28521DWRG4 monitors VAOUT voltage to implement zero-power detect: when VAOUT falls below 0.33 V (with 90 mV hysteresis), the internal comparator disables GT1, halting PFC switching to eliminate no-load losses. This occurs independently of UVLO status and is triggered by collapsing PFC output voltage - not line dropout. The function is confirmed in the SLUS608D datasheet Section 6.7 and enables sub-150-mW standby power in properly designed systems. The UCC28521DWRG4 uses this feature to meet ENERGY STAR and EU CoC Tier 2 efficiency requirements without auxiliary circuits.
Can the UCC28521DWRG4 be used with a 65-kHz PFC frequency?
Yes, the UCC28521DWRG4 supports PFC frequencies from 65 kHz to 600 kHz via the RT resistor, as specified in the SLUS608D datasheet Section 7.3. Using a 500-kΩ resistor on RT yields ~65 kHz at CT_BUFF, and since the PFC stage operates at the same frequency as CT_BUFF (1:1 ratio), both stages run synchronously at that frequency. However, lower frequencies increase inductor size and reduce power density; 200 kHz is the typical design point balancing efficiency, size, and EMI. The UCC28521DWRG4 maintains full functionality - including zero-power detect, soft-start, and power limiting - across the entire programmable range.
What is the purpose of the CT_BUFF pin on the UCC28521DWRG4?
The CT_BUFF pin on the UCC28521DWRG4 provides a buffered 4-V amplitude oscillator ramp signal used primarily to inject slope compensation into the PWM current sense path (ISENSE2). By connecting a resistor from CT_BUFF to ISENSE2, designers add a controlled ramp to the sensed current waveform, stabilizing peak-current-mode control in duty cycles above 50%. This internal buffer can drive up to 500 µA, eliminating the need for external op-amps. The CT_BUFF signal is identical in frequency and phase to the PWM oscillator and is referenced in the SLUS608D datasheet Sections 6.10 and Figure 31. Its use is mandatory for stable operation in flyback or forward converters with high duty ratios.
How does the UCC28521DWRG4 handle startup sequencing between PFC and PWM stages?
The UCC28521DWRG4 enforces strict hardware-based startup sequencing: the PWM stage (GT2) remains disabled until the PFC output voltage reaches 90% of its regulated value, verified via the VSENSE feedback loop. During normal operation, if the bulk voltage drops - such as during line sag - the PWM stage continues operating until the PFC output falls to 71% of nominal, at which point GT2 shuts off. This behavior is intrinsic to the UCC28521DWRG4 and differs from UCC28528DW, which maintains PWM operation until VCC UVLO. The sequencing ensures PFC regulation is established before secondary regulation begins, preventing instability and overvoltage faults. This logic is detailed in SLUS608D Section 1.3 and Figure 1.
UCC28521DWRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Mode:
- Average Current
- Frequency - Switching:
- 200kHz
- Current - Startup:
- 100 µA
- Voltage - Supply:
- 9.7V ~ 18V
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-SOIC
UCC28521DWRG4 FAQ
1.How can I place an order for UCC28521DWRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for UCC28521DWRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UCC28521DWRG4 reliable?
The price and inventory of UCC28521DWRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UCC28521DWRG4 is usually 5 days.
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Once your UCC28521DWRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UCC28521DWRG4?
For technical support, including UCC28521DWRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UCC28521DWRG4 requirements.
6.How does Aetrix verify that UCC28521DWRG4 is sourced from the original manufacturer or authorized distributors?
All UCC28521DWRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCC28521DWRG4 meets industry standards.
7.What is the process for return or replacement of UCC28521DWRG4?
All UCC28521DWRG4 units undergo pre-shipment inspection (PSI). If there is an issue with UCC28521DWRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UCC28521DWRG4 part is unused and in its original packaging.
Return procedure for UCC28521DWRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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