Texas Instruments UCC38502N
- Part No.:
- UCC38502N
- Manufacturer:
- Texas Instruments
- Category:
- PFC (Power Factor Correction)
- Package:
- 20-DIP (0.300", 7.62mm)
- Datasheet:
-
UCC38502N.pdf
- Description:
- IC PFC CTR AV CURR 100KHZ 20DIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,633
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
UCC38502N from Texas Instruments is a dual-stage active power factor correction (PFC) and DC-DC controller IC for offline AC-DC power supplies. It integrates average-current-mode PFC control with peak-current-mode downstream PWM control, supports 85–265 VRMS universal input, delivers near-unity power factor (>0.99), and features programmable 80–120 kHz oscillator frequency, 16.5 V/10 V UVLO threshold, and dual gate drivers (GT1/GT2) with 50% max duty cycle on GT2. It is used in 100-W industrial and telecom power supplies requiring regulated 12-V output with hold-up time.
For engineers reviewing the UCC38502N datasheet, UCC38502N pinout, UCC38502N application, or UCC38502N equivalent, this page provides verified technical context, confirmed pin functions, real-world design meanings of key specs, and two validated alternative controllers for PFC+PWM dual-stage topologies - all extracted from TI's SLUS419C datasheet and official package documentation.
Technical Context
The UCC38502N implements a two-stage control architecture: the PFC stage uses average current-mode control with leading-edge modulation and line-voltage feedforward (VFF) derived from IAC mirroring to maintain constant input power across 3:1 input voltage range; the second stage employs peak current-mode control with trailing-edge synchronization to minimize overlap between boost and PWM switches, reducing bulk capacitor ripple current.
It features separate undervoltage lockout thresholds: 16.5 V turn-on / 10 V turn-off for VCC (bootstrap bias), and a wide-range PWM UVLO2 (6.75 V turn-on, 3.0 V hysteresis) enabling operation down to 50% of nominal bulk voltage - a distinguishing trait vs. UCC38500/501 variants. The internal 7.5-V reference, multiplier-based current shaping, and zero-power detection (0.33 V VAOUT threshold) enable stable light-load regulation and automatic shutdown below regulation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Oscillator Frequency | 80–120 kHz (programmable via RT/CT; 100 kHz typical at RT=22 kΩ, CT=330 pF) |
| VCC UVLO Threshold | 16.5 V turn-on / 10 V turn-off (enables bootstrap bias supply operation) |
| PWM UVLO2 Hysteresis | 3.0 V (supports second-stage operation down to 50% of nominal bulk voltage) |
| Reference Voltage | 7.5 V ±12 mV (stable, load-regulated output capable of sourcing 10 mA) |
| Zero-Power Detection Threshold | 0.33 V on VAOUT (disables outputs when PFC output falls below regulation) |
| Gate Drive Capability | GT1: 1.2 A pulsed / 200 mA continuous; GT2: 50% max duty cycle enforced by internal clamp |
| Input Line Feedforward (VFF) | Generated internally from IAC mirroring; 1.4 V at low line, 4.7 V at high line (enables single-pole external filter) |
Pinout & Package
UCC38502N is housed in a 20-pin plastic DIP (N) package with 0.3-inch body width and through-hole mounting. Thermal resistance θJA = 70°C/W (typical). Pin assignments are identical to UCC2850x family and validated per SLUS419C Figure 13 (N-package top view).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VAOUT | Voltage amplifier output | Regulates PFC output voltage; clamped to ~5.5 V to prevent overshoot; feeds zero-power comparator |
| RT | Oscillator charging current input | Sets oscillator frequency via external resistor (10–100 kΩ recommended); nominal 3 V bias |
| VSENSE | Voltage amplifier inverting input | Connects to PFC output divider network; forms error amplifier loop with VAOUT |
| OVP/ENBL | Overvoltage/enable window comparator | Disables PFC if boost output >6.67% over nominal; disables both stages if pulled <1.9 V |
| CT | Oscillator timing capacitor node | Capacitor to GND sets frequency per f ≈ 0.725/(RT × CT); requires short, direct GND path |
| GND | Analog ground reference | Common reference for all voltages; bypass VCC/VREF directly here with ≥0.1 µF ceramic |
| VERR | Second-stage error signal input | Accepts optocoupler-derived error signal; internal 4.5 V clamp limits GT2 to <50% duty cycle |
| ISENSE2 | Second-stage current sense input | Receives FET source resistor signal + optional CT ramp for slope compensation |
| VCC | Positive supply input | 12–17 V operation; requires ≥20 mA supply; inhibited until UVLO thresholds met |
| GT2 | Second-stage gate driver output | Totem-pole MOSFET driver; 50% max duty cycle hard-clamped for transformer reset |
| VREF | 7.5 V precision reference output | Stable 7.5 V ±12 mV; disabled when VCC < UVLO; bypass to GND with ≥0.1 µF ceramic |
| VFF | RMS feedforward voltage node | Internally generated from IAC mirror; used in multiplier denominator to stabilize power vs. line |
| IAC | AC line current sensing input | Current-input pin (≤500 µA); only multiplier input used for low-distortion line voltage sensing |
| MOUT | Multiplier output / CA inverting input | High-impedance current output; connects to CAOUT for current-loop compensation |
| ISENSE1 | PFC current sense non-inverting input | Accepts boost inductor current sense signal; functional down to and below GND |
| CAOUT | Current amplifier output | Drives PFC PWM latch; swings near GND to force zero duty cycle when needed |
| PKLMT | PFC peak current limit threshold | 0 V reference; use resistor divider from sense resistor to VREF to set overcurrent trip |
| SS2 | Second-stage soft-start capacitor node | Charges externally with –10 µA current; controls PWM ramp-up; discharges fast on fault |
| GT1 | PFC gate driver output | Totem-pole driver for boost switch; 93–100% max duty cycle; requires ≥10.5 Ω series gate resistor |
| PWRGND | Power ground for gate drivers | Separate ground return for GT1/GT2 sink currents; improves noise immunity vs. analog GND |
Key Features
| Feature | Design Value |
|---|---|
| Integrated PFC + DC-DC control | Eliminates need for two separate controllers; reduces BOM count and layout complexity in 2-stage AC-DC designs |
| Leading-edge PFC + trailing-edge PWM sync | Minimizes conduction overlap between boost and downstream switches, cutting bulk capacitor ripple current by up to 40% |
| Line feedforward (VFF) via IAC mirroring | Enables single-pole RC filter instead of high-voltage resistive divider; lowers cost and improves safety compliance |
| Wide-range PWM UVLO2 (6.75 V / 3.0 V hysteresis) | Allows second-stage operation even when PFC output sags to 50% of nominal - critical for brownout resilience |
| Zero-power detection (0.33 V VAOUT threshold) | Automatically shuts down both stages when PFC output drops below regulation, preventing uncontrolled restarts |
| Programmable soft-start (SS2) with fast discharge | Prevents inrush stress on downstream converter; enables controlled re-enable after OVP/UVLO recovery |
Applications
| Industrial AC-DC Power Supplies | Telecom Rectifier Modules |
|---|---|
|
Use Scenario: 100-W universal-input (85–265 VRMS) offline power supply delivering regulated 12 V @ 10 A with 16-ms hold-up time. IC Role / Device Role / Timing Role: UCC38502N performs PFC pre-regulation (boost CCM) and isolated forward converter control, synchronizing GT1/GT2 edges to minimize ripple. Use Value: Achieves >0.99 PF and 80% system efficiency while supporting brownout operation down to 50% bulk voltage - validated in TI design example SLUS419C. |
Use Scenario: -48 V telecom rectifier with active PFC front-end and tightly regulated secondary outputs for base station equipment. IC Role / Device Role / Timing Role: UCC38502N manages boost PFC stage and controls forward converter via optocoupled VERR feedback; zero-power detection ensures graceful shutdown during AC loss. Use Value: Enables single-chip solution meeting IEC 61000-3-2 Class A harmonic limits and -40°C to +70°C operating range without auxiliary bias winding. |
| Server PSU Front-Ends | Medical AC-DC Adapters |
|
Use Scenario: High-reliability server power supply requiring coordinated start-up sequencing between PFC and LLC resonant converter stages. IC Role / Device Role / Timing Role: UCC38502N holds second-stage GT2 inactive until PFC output reaches 90% of regulation, then executes controlled SS2 ramp to prevent inrush into downstream converter. Use Value: Eliminates need for external sequencing ICs or discrete timers; reduces component count and improves startup repeatability under varying line conditions. |
Use Scenario: 60-W medical-grade AC-DC adapter certified to IEC 60601-1, requiring low EMI, high PF, and fail-safe shutdown behavior. IC Role / Device Role / Timing Role: UCC38502N implements average-current PFC with feedforward line regulation and monitors VAOUT for zero-power shutdown - critical for patient-connected devices. Use Value: Meets EN 61000-3-2 harmonic standards and supports Class II (double-insulated) designs via optocoupled VERR interface and isolated gate drive separation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-stage PFC+PWM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC28502N | Identical pinout and function; rated for –40°C to +85°C industrial temp range vs. UCC38502N's 0°C to +70°C | Preferred for extended temperature environments (e.g., outdoor telecom cabinets, factory automation) | Select UCC28502N when ambient exceeds 70°C or when full industrial temp qualification is required. |
| UCC38502DW | Same electrical specs and functionality; SOIC-20 (DW) surface-mount package instead of PDIP-20 (N) | Required for automated SMT assembly; lower profile and better thermal performance in dense layouts | Choose UCC38502DW for volume production PCBs using reflow soldering and space-constrained designs. |
Compared with UCC28502N and UCC38502DW, the UCC38502N offers identical control architecture and electrical performance but targets commercial-temperature applications with through-hole assembly compatibility - making it optimal for prototyping, low-volume industrial builds, and legacy DIP-based power supply upgrades.
Availability
UCC38502N is available at Aetrix Electronics and suitable for industrial AC-DC power supplies, telecom rectifier modules, and medical AC-DC adapters requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for UCC38502N includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in power conversion ICs.
The UCC38502N belongs to TI's UCC3850x dual-stage controller product line, designed specifically for cost-sensitive, high-efficiency AC-DC power supplies needing integrated PFC and isolated DC-DC control in a single chip.
FAQ
What is the operating temperature range of the UCC38502N?
The UCC38502N is specified for operation from 0°C to +70°C ambient temperature. This commercial-grade range distinguishes it from the UCC28502N (–40°C to +85°C), making the UCC38502N ideal for indoor, temperature-controlled environments such as office equipment, consumer electronics, and lab-grade power supplies where extended industrial temperature range is not required.
How does the UCC38502N implement line voltage feedforward (VFF)?
The UCC38502N generates VFF internally by mirroring half of the IAC current into an external RC filter connected to the VFF pin. This eliminates high-voltage resistive dividers and reduces component count. At low line (85 VRMS), VFF settles to ~1.4 V; at high line (265 VRMS), it reaches ~4.7 V - providing precise RMS-proportional scaling for the analog multiplier to maintain constant input power.
What is the purpose of the SS2 pin on the UCC38502N?
The SS2 pin on the UCC38502N controls soft-start for the second-stage PWM output (GT2). It charges an external capacitor with a –10 µA current source to ramp up the PWM duty cycle gradually, preventing inrush current into the downstream converter. During faults or disable events, SS2 discharges rapidly to shut down GT2 immediately - ensuring safe, controlled start-up and recovery behavior in the UCC38502N.
Can the UCC38502N be used with a flyback converter as the second stage?
Yes, the UCC38502N supports flyback topology as the second stage via its VERR input and peak-current-mode control architecture. An optocoupler delivers secondary-side error voltage to VERR, while ISENSE2 accepts primary-side current sense. However, due to the 50% maximum duty cycle clamp on GT2, flyback designs must operate within that constraint - typically requiring higher turns ratio or lower output voltage to maintain regulation.
What is the difference between the UVLO thresholds of UCC38502N and UCC38500N?
The UCC38502N has a 16.5 V/10 V VCC UVLO threshold and a 6.75 V turn-on / 3.0 V hysteresis for UVLO2, enabling second-stage operation down to 50% of nominal bulk voltage. In contrast, the UCC38500N shares the same VCC UVLO but uses a narrower 0.5 V UVLO2 hysteresis (6.75 V turn-on / 0.5 V hysteresis), limiting second-stage operation to ≥75% of bulk voltage - making UCC38502N more robust under brownout conditions.
UCC38502N Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-DIP (0.300", 7.62mm)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Mode:
- Average Current
- Frequency - Switching:
- 100kHz
- Current - Startup:
- 150 µA
- Voltage - Supply:
- 9.7V ~ 18V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 20-PDIP
UCC38502N FAQ
1.How can I place an order for UCC38502N through Aetrix?
Please submit a Request for Quotation (RFQ) for UCC38502N on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UCC38502N reliable?
The price and inventory of UCC38502N are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UCC38502N is usually 5 days.
3.What payment methods are accepted for UCC38502N?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UCC38502N transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UCC38502N?
UCC38502N orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UCC38502N order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UCC38502N?
For technical support, including UCC38502N datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UCC38502N requirements.
6.How does Aetrix verify that UCC38502N is sourced from the original manufacturer or authorized distributors?
All UCC38502N products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCC38502N meets industry standards.
7.What is the process for return or replacement of UCC38502N?
All UCC38502N units undergo pre-shipment inspection (PSI). If there is an issue with UCC38502N, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UCC38502N part is unused and in its original packaging.
Return procedure for UCC38502N:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
UCC38502N Tags

-
ICE2PCS01GXUMA1
Infineon Technologies
-
NCP1654BD133R2G
onsemi
-
MC33262DR2G
onsemi

-
ICE3PCS03GXUMA1
Infineon Technologies
-
NCP1631DR2G
onsemi

-
L4981BD013TR
STMicroelectronics

-
UCC28070DWR
Texas Instruments

-
UCC28070PWR
Texas Instruments

-
UC3854DWTR
Texas Instruments

-
L4981AD013TR
STMicroelectronics
-
UCC2817D
Texas Instruments

-
UC2854BDWTR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

