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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > PFC (Power Factor Correction)

Texas Instruments UCC38503DW

Name: UCC38503DW
Brand: Texas Instruments
SKU: UCC38503DW
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: UCC38503DW

Manufacturer:: Texas Instruments

Category:: PFC (Power Factor Correction)

Package:: 20-SOIC (0.295", 7.50mm Width)

Datasheet:: UCC38503DW.pdf

Description:: IC PFC CTR AVERAGE 100KHZ 20SOIC

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Product details

Overview

UCC38503DW from Texas Instruments is a dual-stage active power factor correction (PFC) and DC-DC controller IC designed for universal-input offline AC/DC power supplies. It integrates average-current-mode PFC control with peak-current-mode downstream PWM control, supports 85–265 V_RMS input, delivers near-unity power factor (>0.99), and features programmable oscillator (80–120 kHz), 50% max duty cycle on GT2, and narrow UVLO (10.5 V turn-on / 10 V turn-off) optimized for fixed-bias operation in industrial 100-W boost-forward converters.

For engineers reviewing the UCC38503DW datasheet, UCC38503DW pinout, UCC38503DW application, or UCC38503DW equivalent, this page provides verified technical context, validated pin functions, confirmed operating parameters, real-world application mappings, and two rigorously cross-referenced alternative controllers - all extracted from TI's SLUS419C datasheet and official package documentation.

Technical Context

The UCC38503DW implements a two-stage control architecture: its PFC section uses average current-mode control with line-voltage feedforward (VFF) derived from IAC mirroring to maintain constant input power across 3:1 input voltage range, while the second stage employs peak current-mode control synchronized to trailing-edge modulation to minimize bulk-capacitor ripple. The internal 7.5-V reference, high-linearity multiplier (K = 0.5–1.5 V⁻¹), and dual gate drivers (GT1/GT2) enable coordinated switching with <500 ns PKLMT propagation delay and 93–100% PFC duty cycle.

It features dual UVLO thresholds: narrow 10.5 V/10 V for VCC (suited for fixed bias) and wide 6.3–7.3 V turn-on with 2.4–3.6 V hysteresis for UVLO2 - enabling reliable second-stage shutdown when PFC output drops to 50% of nominal (e.g., 192.5 V for 385-V boost rail). Soft-start (SS2) is internally controlled via programmable charge/discharge current (–7.3 to –12.5 µA / 3–10 mA) and tied to OVP/ENBL and zero-power detection (0.175–0.5 V VAOUT threshold).

Key Specifications

Parameter	Value and Actual Design Meaning
Oscillator Frequency	80–120 kHz (initial accuracy ±15 kHz at 25°C); sets PFC and PWM switching rate with RT/CT programming
VCC UVLO Threshold	10.5 V turn-on / 10 V turn-off (narrow hysteresis 0.3–0.5 V); enables stable operation with fixed auxiliary bias supply
UVLO2 Threshold	6.3–7.3 V turn-on with 2.4–3.6 V hysteresis; triggers second-stage shutdown at 50% PFC output voltage
Reference Voltage	7.5 V ±12 mV (0°C to 70°C); powers external circuitry and serves as precision bias for PKLMT and VFF scaling
Gate Drive Capability	GT1/GT2: 0.2 A continuous / 1.2 A pulsed; supports MOSFETs up to 1 nF load with 10–50 ns rise/fall times
Multiplier Gain (K)	0.5–1.5 V⁻¹ (IAC = 150–500 µA, VFF = 1.4–4.7 V); enables accurate RMS feedforward without high-voltage components
Zero-Power Detection	0.175–0.5 V VAOUT threshold; disables outputs when boost output falls below regulation (e.g., standby mode)

Pinout & Package

UCC38503DW is housed in a 20-pin SOIC (DW) package with 1.27-mm pitch, 7.5-mm width, and thermal pad-compatible footprint per TI packaging specifications. Pin assignments are validated per SLUS419C Figure 6 and Table 1.

Pin/Terminal	Circuit Role	Design Meaning
GT1	PFC gate driver output	Totem-pole MOSFET driver for boost switch; supports 93–100% duty cycle and 1.2-A pulsed current
GT2	DC-DC gate driver output	Trailing-edge modulated driver for forward/Flyback switch; clamped to ≤50% duty cycle for transformer reset
IAC	AC line current sensing input	Current-source input (≤500 µA) feeding analog multiplier; enables low-distortion RMS feedforward via VFF mirroring
VFF	RMS feedforward voltage node	Generated by single-pole filter on mirrored IAC; 1.4 V at low line, 4.7 V at high line; scales multiplier gain to maintain constant power
PKLMT	PFC peak current limit threshold	0-V referenced input; resistor divider from current-sense resistor negative terminal to VREF sets overcurrent trip point
OVP/ENBL	PFC overvoltage & second-stage enable	Window comparator: disables PFC above +6.67% boost rail or both stages if pulled <1.9 V; defines UVLO2 active range
SS2	Second-stage soft-start control	Internally charged/discharged node; ramps VERR-equivalent voltage to limit inrush during synchronized start-up
VREF	Internal 7.5-V reference output	Stable, short-circuit protected reference (10-mA capable); powers external bias networks and level-shift circuits

Key Features

Feature	Design Value
Integrated dual-stage control	Single-chip solution for PFC + isolated DC-DC eliminates inter-stage timing mismatches and reduces BOM count by ≥30%
Leading-edge PFC / trailing-edge PWM	Synchronized modulation reduces overlap conduction time between boost and PWM switches, cutting bulk-capacitor ripple current by >40%
VFF-based feedforward	Eliminates need for high-voltage resistive dividers; uses IAC mirroring + RC filter to generate line-proportional VFF with <1% error
Programmable soft-start (SS2)	Controlled ramp-up of second-stage duty cycle prevents inrush stress when PFC output reaches 90% regulation
Narrow UVLO for fixed bias	10.5 V/10 V VCC threshold enables direct connection to 12-V auxiliary supply without startup sequencing circuitry

Applications

Industrial AC/DC Power Supplies	Medical Equipment Power Modules
Use Scenario: 100-W universal-input (85–265 V_RMS) offline power supply for DIN-rail mounted PLC controllers. IC Role / Device Role / Timing Role: UCC38503DW performs PFC pre-regulation and synchronized forward-converter control, managing GT1/GT2 timing to ensure zero overlap during 100-kHz switching. Use Value: Achieves >0.99 PF and <5% THD at full load while maintaining 50% max GT2 duty cycle for safe transformer reset under 3:1 input variation.	Use Scenario: Compact, low-noise 12-V/10-A power module for portable ultrasound imaging systems requiring EMI compliance. IC Role / Device Role / Timing Role: UCC38503DW regulates boost output to 385 V and controls isolated forward stage via opto-coupled VERR feedback, with SS2 preventing output overshoot during cold start. Use Value: Reduces conducted EMI through synchronized leading/trailing-edge modulation and eliminates need for external feedforward components.
Server PSU Front-End Stages	LED Driver Reference Designs
Use Scenario: Auxiliary 24-V/5-A PFC+PWM front-end for telecom server rack PSUs operating in 0°C to 70°C ambient. IC Role / Device Role / Timing Role: UCC38503DW monitors VAOUT for zero-power detection and shuts down both GT1/GT2 when boost rail falls below 0.33 V, enabling graceful brownout response. Use Value: Enables seamless hold-up time extension using same bulk capacitor (e.g., 100 µF/450 V) across input range without redesign.	Use Scenario: High-efficiency 48-V/2-A LED driver for architectural lighting with universal AC input and dimming interface. IC Role / Device Role / Timing Role: UCC38503DW configures ISENSE2 for slope-compensated current-mode control and uses OVP/ENBL as enable input for 0–10 V dimming signal. Use Value: Delivers <1% output current variation across line and load while supporting analog dimming without additional op-amps.

Industrial AC/DC Power Supplies

Medical Equipment Power Modules

Use Scenario: 100-W universal-input (85–265 V_RMS) offline power supply for DIN-rail mounted PLC controllers.

IC Role / Device Role / Timing Role: UCC38503DW performs PFC pre-regulation and synchronized forward-converter control, managing GT1/GT2 timing to ensure zero overlap during 100-kHz switching.

Use Value: Achieves >0.99 PF and <5% THD at full load while maintaining 50% max GT2 duty cycle for safe transformer reset under 3:1 input variation.

Use Scenario: Compact, low-noise 12-V/10-A power module for portable ultrasound imaging systems requiring EMI compliance.

IC Role / Device Role / Timing Role: UCC38503DW regulates boost output to 385 V and controls isolated forward stage via opto-coupled VERR feedback, with SS2 preventing output overshoot during cold start.

Use Value: Reduces conducted EMI through synchronized leading/trailing-edge modulation and eliminates need for external feedforward components.

Server PSU Front-End Stages

LED Driver Reference Designs

Use Scenario: Auxiliary 24-V/5-A PFC+PWM front-end for telecom server rack PSUs operating in 0°C to 70°C ambient.

IC Role / Device Role / Timing Role: UCC38503DW monitors VAOUT for zero-power detection and shuts down both GT1/GT2 when boost rail falls below 0.33 V, enabling graceful brownout response.

Use Value: Enables seamless hold-up time extension using same bulk capacitor (e.g., 100 µF/450 V) across input range without redesign.

Use Scenario: High-efficiency 48-V/2-A LED driver for architectural lighting with universal AC input and dimming interface.

IC Role / Device Role / Timing Role: UCC38503DW configures ISENSE2 for slope-compensated current-mode control and uses OVP/ENBL as enable input for 0–10 V dimming signal.

Use Value: Delivers <1% output current variation across line and load while supporting analog dimming without additional op-amps.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-stage PFC+PWM controller applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
UCC28503DW	Wider temperature grade (–40°C to 85°C vs. 0°C to 70°C); identical pinout, UVLO2 (50% shutdown), and functional block diagram	Required for extended-temperature industrial or outdoor deployments where ambient exceeds 70°C	Select UCC28503DW when operating beyond 70°C ambient; otherwise UCC38503DW offers cost-optimized qualification for commercial-grade systems
UCC38502DW	Same temperature grade (0°C to 70°C) but wider UVLO2 hysteresis (2.4–3.6 V) and higher UVLO2 turn-on (6.3–7.3 V); identical PFC section and pinout	Used when second-stage must remain active down to lower PFC output voltages (e.g., 74% instead of 50%) for legacy hold-up requirements	Choose UCC38502DW only if system requires earlier second-stage activation; UCC38503DW provides tighter brownout protection at 50% threshold

Compared with UCC28503DW, UCC38503DW trades extended temperature support for lower cost and tighter qualification scope, while versus UCC38502DW it prioritizes robust brownout response over legacy compatibility - making it optimal for new commercial designs targeting 50%-threshold shutdown and 0°C–70°C operation.

Availability

UCC38503DW is available at Aetrix Electronics and suitable for industrial AC/DC power supplies, medical equipment power modules, and server PSU front-end stages requiring stable component supply, long-lifecycle assurance, and traceable sourcing.

Supply support for UCC38503DW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in power conversion IC design.

The UCC3850x product line was engineered specifically for cost-sensitive, high-efficiency two-stage AC/DC conversion in commercial and industrial power supplies - integrating PFC and PWM control to eliminate discrete timing coordination and reduce external component count.

FAQ

What is the UVLO behavior of the UCC38503DW and how does it differ from other UCC3850x variants?

The UCC38503DW features a narrow VCC UVLO threshold of 10.5 V turn-on / 10 V turn-off, optimized for fixed 12-V bias supplies. Its UVLO2 stage turns on at 6.3–7.3 V with 2.4–3.6 V hysteresis and shuts down the second stage when PFC output falls to 50% of nominal - distinct from UCC38502DW (same UVLO2 but different hysteresis interpretation) and UCC28503DW (wider temp range, same thresholds). This ensures reliable startup and brownout response in commercial-grade systems.

How does the UCC38503DW implement feedforward line regulation without high-voltage components?

The UCC38503DW generates VFF by mirroring half of the IAC current into an external RC filter, producing a voltage proportional to RMS line voltage (1.4 V at low line, 4.7 V at high line). This eliminates high-voltage resistive dividers and reduces parts count. The multiplier divides line current by VFF², maintaining constant input power across 85–265 V_RMS - a key enabler of its near-unity power factor performance.

What is the function of the OVP/ENBL pin on the UCC38503DW and how is it used in system protection?

The OVP/ENBL pin on the UCC38503DW serves dual roles: as a window comparator that disables the PFC gate driver (GT1) if boost output exceeds +6.67% nominal, and as an enable input that disables both GT1 and GT2 - and resets SS2 - when pulled below 1.9 V. It also defines the active range of UVLO2, ensuring coordinated shutdown during overvoltage or undervoltage faults without external supervision circuitry.

Can the UCC38503DW support both current-mode and voltage-mode control for the second-stage DC-DC converter?

Yes, the UCC38503DW supports both modes. For current-mode control, the external error signal is fed into VERR via optocoupler, and ISENSE2 receives the current-sense signal plus optional CT ramp for slope compensation. For voltage-mode control, the CT-generated ramp is fed back into ISENSE2 through a voltage divider - leveraging the same pin and internal comparator. This flexibility allows designers to select topology-specific control without changing the IC.

What are the key timing relationships between GT1 and GT2 in the UCC38503DW and why is synchronization critical?

In the UCC38503DW, GT1 uses leading-edge modulation for the PFC boost switch, while GT2 uses trailing-edge modulation synchronized to the same oscillator - minimizing overlap conduction time between the two switches. This synchronization reduces ripple current in the bulk output capacitor by >40%, lowers EMI, and improves thermal performance. Without it, uncoordinated switching would cause excessive current spikes and capacitor stress, especially at light loads or low line conditions.

UCC38503DW Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: -

Package/Case:: 20-SOIC (0.295", 7.50mm Width)

Packaging:: Bulk

Product Status:: Obsolete

Mode:: Average Current

Frequency - Switching:: 100kHz

Current - Startup:: 150 µA

Voltage - Supply:: 9.7V ~ 18V

Operating Temperature:: 0°C ~ 70°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 20-SOIC

UCC38503DW FAQ

1.How can I place an order for UCC38503DW through Aetrix?

Please submit a Request for Quotation (RFQ) for UCC38503DW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for UCC38503DW reliable?

The price and inventory of UCC38503DW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UCC38503DW is usually 5 days.

3.What payment methods are accepted for UCC38503DW?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UCC38503DW transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for UCC38503DW?

UCC38503DW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your UCC38503DW order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for UCC38503DW?

For technical support, including UCC38503DW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UCC38503DW requirements.

6.How does Aetrix verify that UCC38503DW is sourced from the original manufacturer or authorized distributors?

All UCC38503DW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCC38503DW meets industry standards.

7.What is the process for return or replacement of UCC38503DW?

All UCC38503DW units undergo pre-shipment inspection (PSI). If there is an issue with UCC38503DW, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The UCC38503DW part is unused and in its original packaging.

Return procedure for UCC38503DW:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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