Texas Instruments UCC38503N

Overview

UCC38503N from Texas Instruments is a dual-stage power factor correction (PFC) and DC-DC controller IC for AC-DC power supplies. It integrates average-current-mode PFC control with peak-current-mode downstream PWM, supports 85–265 V_RMS universal input, delivers 7.5 V reference with ±12 mV accuracy over 0°C to 70°C, and features programmable 80–120 kHz oscillator frequency with 1% voltage stability. It enables high-efficiency two-stage converters in server PSUs and industrial power systems.

For engineers reviewing the UCC38503N datasheet, UCC38503N pinout, UCC38503N application, or UCC38503N equivalent, key selection criteria include its narrow UVLO threshold (10.5 V/10 V), wide PWM UVLO2 hysteresis (3.0 V), 50% max second-stage duty cycle clamp, and synchronized leading-edge (PFC) / trailing-edge (PWM) modulation to minimize bulk-capacitor ripple current.

Technical Context

The UCC38503N implements a two-stage control architecture: the PFC stage uses average-current-mode control with line-voltage feedforward (VFF) derived from IAC mirroring and a single-pole external filter, enabling constant input power across >3:1 input voltage range. Its multiplier accepts IAC up to 500 µA and outputs IMOUT with gain constant K = 0.5–1.5 V⁻¹.

The second-stage DC-DC section operates in peak-current mode using an externally generated error signal fed into VERR, with internal soft-start (SS2), programmable shutdown at 50% nominal bulk voltage, and 50% maximum duty cycle enforced by a 4.5 V internal clamp on VERR. Gate drivers GT1 and GT2 deliver 1.2 A pulsed current with <50 ns rise/fall times into 1 nF load.

Key Specifications

Pinout & Package

UCC38503N is housed in a 20-pin plastic DIP (N) package with 0.3-inch body width and through-hole mounting. Pin assignments are fully defined per TI SLUS419C Rev. November 2001.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-stage PFC + PWM controller applications.

Compared with UCC28503N, UCC38503N trades extended temperature rating for lower cost and simpler qualification in commercial applications; compared with UCC38503DW, it offers direct through-hole compatibility but requires manual soldering and occupies more board area.

Availability

UCC38503N is available at Aetrix Electronics and suitable for server power supplies, industrial AC-DC converters, and medical equipment PSUs requiring stable component supply and long-term obsolescence management.

Supply support for UCC38503N includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of power IC innovation.

The UCC3850x product line was designed specifically for cost-sensitive, high-efficiency two-stage AC-DC power conversion in commercial-grade applications, emphasizing integrated PFC+PWM control, feedforward-based line regulation, and robust start-up sequencing.

FAQ

What is the UVLO threshold configuration of the UCC38503N?

The UCC38503N features a narrow PFC UVLO threshold of 10.5 V turn-on / 9.7 V turn-off (0.5 V hysteresis), optimized for fixed-bias operation rather than bootstrap startup. Its second-stage UVLO2 has a 3.0 V hysteresis, enabling reliable shutdown down to 50% of nominal bulk voltage-distinct from UCC38500/501 variants with 0.3 V hysteresis. This configuration ensures stable operation in fixed-rail auxiliary supplies.

How does the UCC38503N implement line feedforward (VFF) without high-voltage components?

The UCC38503N generates VFF by mirroring the IAC current input (≤500 µA) to the VFF pin and using an external RC filter to produce a voltage proportional to RMS line voltage-1.4 V at low line and ~4.7 V at high line. This eliminates need for high-voltage resistive dividers, reducing part count, cost, and failure risk while maintaining accurate power regulation across 85–265 V_RMS input.

What is the purpose of the 4.5 V clamp on the VERR pin in the UCC38503N?

The 4.5 V internal clamp on the VERR pin of the UCC38503N directly enforces a maximum 50% duty cycle on GT2, ensuring safe transformer reset in forward and other isolated topologies. Unlike external duty-cycle limiting, this hardware clamp remains active across all operating conditions-including startup, overload, and line transients-preventing core saturation and MOSFET overstress without additional circuitry.

Can the UCC38503N support both voltage-mode and current-mode control of the second-stage DC-DC converter?

Yes, the UCC38503N supports both modes: current-mode control uses the externally generated error signal applied to VERR with slope compensation injected into ISENSE2, while voltage-mode control feeds the CT oscillator ramp back into ISENSE2 via a voltage divider. The datasheet confirms both configurations are validated, with current-mode being default for improved transient response and noise immunity.

What is the role of the PKLMT pin in the UCC38503N, and how is it configured?

The PKLMT pin in the UCC38503N serves as the PFC peak current limit threshold, referenced to 0 V. It requires a resistor divider from the negative side of the current-sense resistor to VREF to level-shift the sensed voltage, setting the overcurrent trip point. For example, with VREF = 7.5 V, a 10 kΩ/15 kΩ divider yields 4.5 V at PKLMT, corresponding to a 4.5 V × R_sense current limit-enabling precise, temperature-stable cycle-by-cycle protection.