Texas Instruments UCC3858N
- Part No.:
- UCC3858N
- Manufacturer:
- Texas Instruments
- Category:
- PFC (Power Factor Correction)
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
UCC3858N.pdf
- Description:
- POWER FACTOR CONTROLLER
- Quantity:
- Payment:

- Shipping:

Inventory:2,003
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Product details
Overview
UCC3858N from Texas Instruments is a high-efficiency, active power factor correction (PFC) controller IC designed for boost preregulators in low-to-medium-power AC/DC systems. It implements average current mode control to shape line current waveform to match line voltage, achieving near-unity power factor. Key confirmed parameters include 12V–18V VDD operating range, 100 µA startup supply current, leading-edge PWM modulation, programmable frequency foldback down to 25 kHz, and integrated RMS voltage detection via CRMS pin.
For engineers reviewing the UCC3858N datasheet, UCC3858N pinout, UCC3858N application, or UCC3858N equivalent, this page delivers verified technical context on light-load efficiency optimization, synchronization with downstream DC-DC converters, peak current limiting at MOUT, transconductance voltage error amplifier behavior, and design-critical timing relationships between FBL, FBM, CT, and RT pins.
Technical Context
The UCC3858N uses average current mode control with a transconductance voltage error amplifier (400–1000 µS gain) and a wide-bandwidth current amplifier to enforce sinusoidal input current. Its oscillator supports both free-running (100 kHz typical) and synchronized operation via SYNC pin, with leading-edge PWM output to reduce bulk capacitor ripple current when paired with trailing-edge downstream converters.
Frequency foldback is implemented by linearly scaling oscillator charging current based on VAO–FBL differential voltage, reducing switching frequency under light load while maintaining stability. An instantaneous reset path via FBM pin allows rapid exit from foldback mode using external circuitry tied to the downstream converter's error amplifier.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDD Range | 12 V to 18 V - defines minimum bootstrap supply voltage and maximum safe bias rail; UVLO turn-on at 12–15.5 V ensures reliable offline startup. |
| Startup Current | 100 µA typical - enables high-value trickle-charge resistors, minimizing standby losses in auxiliary supplies. |
| Oscillator Frequency | 80–120 kHz (total variation) - set by RT/CT network; foldback reduces minimum to 25–30 kHz to cut core and switching losses at light load. |
| Reference Voltage | 7.5 V ±2.5% over temperature - used for feedback divider biasing and internal overvoltage protection threshold reference. |
| Peak Current Limit Threshold | 350–550 mV at MOUT - sets cycle-by-cycle current limit without external comparator; hysteresis of 100–200 mV prevents oscillation. |
| RMS Detection Accuracy | No external 2-pole filter required - internal peak detector and CRMS capacitor integration eliminate second-harmonic distortion in VRMS signal, improving THD <3%. |
| Gate Drive Output | 7 Ω pull-up / 3.5 Ω pull-down - supports fast MOSFET switching (20–25 ns rise/fall) with external series resistor ≥5 Ω for ringing suppression. |
Pinout & Package
UCC3858N is housed in a 16-pin plastic dual in-line package (PDIP-N), with 0.3-inch body width and standard through-hole mounting. Thermal resistance θJA is 65°C/W (typical), requiring adequate PCB copper area for >1 W dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (CA–) | Current amplifier inverting input | Accepts sensed current signal from RSENSE; operates down to GND for zero-duty-cycle capability. |
| 2 (CAO) | Current amplifier output | Drives PWM comparator; rail-to-rail swing enables full duty-cycle control and precise current regulation. |
| 3 (CRMS) | RMS voltage integration node | Connects to external capacitor (75–90 nF); internal IAC mirroring charges it each half-cycle for accurate line-voltage feedforward. |
| 4 (CT) | Oscillator timing capacitor | Timing node for ramp generation; discharge current set by RT; determines base switching frequency per f = 0.814/(RTCT). |
| 5 (FBL) | Frequency foldback level select | Sets VAO threshold for foldback initiation; pulling below 0.5 V disables IC entirely. |
| 6 (FBM) | Minimum frequency reference | Sets lowest foldback frequency via RFBM; pulled low (<1.5 V) forces immediate return to nominal frequency. |
| 7 (GND) | Power and signal reference | Return path for CT discharge, gate drive sink, and all analog circuits; requires short, low-inductance trace to bypass caps. |
| 8 (IAC) | AC line current input | Current-mode multiplier input; accepts 20–100 µA; needs ≤330 pF bypass for noise immunity. |
| 9 (MOUT) | Multiplier output / current amp non-inverting input | High-impedance node combining multiplier current and sense voltage; used for peak current limiting at –0.5 V. |
| 10 (OUT) | Gate driver output | Totem-pole DMOS stage driving external MOSFET gate; rated for 500 mA pulsed, requires series resistor ≥5 Ω. |
| 11 (RT) | Oscillator timing resistor | Sets oscillator discharge current (IDIS = 3/RT); works with CT to define free-running frequency and foldback slope. |
| 12 (SYNC) | Oscillator synchronization input | Accepts rising-edge sync pulse from downstream converter; resets CT ramp to align PFC and DC-DC switching edges. |
| 13 (VA–) | Voltage amplifier inverting input | Connected to output voltage divider; triggers overvoltage shutdown if >3.15 V; sets regulation point for VOUT. |
| 14 (VAO) | Voltage amplifier output | Transconductance amplifier output (0.3–6.3 V swing); controls PWM duty and initiates foldback when falling below FBL. |
| 15 (VREF) | 7.5 V precision reference | Supplies bias to external circuitry (≤10 mA); disabled when VDD < UVLO; requires 0.1 µF ceramic bypass to GND. |
| 16 (VDD) | Positive supply input | Power pin accepting 12–18 V; must be bypassed with ≥0.1 µF ceramic cap directly to GND to handle gate-drive current spikes. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable frequency foldback | Reduces switching frequency linearly as load drops, cutting core loss and diode conduction loss without compromising regulation. |
| Leading-edge PWM modulation | Enables optimal ripple cancellation when synchronized with trailing-edge downstream converters, lowering bulk capacitor RMS current by ~50%. |
| Integrated RMS voltage detection | Eliminates external 2-pole filter; improves line transient response 6× and removes second-harmonic distortion in input current waveform. |
| Cycle-by-cycle peak current limiting | Uses MOUT node voltage (–0.5 V threshold) for fast, accurate overcurrent protection without added sensing components. |
| Low quiescent current architecture | 100 µA startup and 2–5 mA operating current enable efficient auxiliary supply design and extended hold-up time at light loads. |
Applications
| Server Power Supplies | LED Driver Front-Ends |
|---|---|
Use Scenario: 300–500 W AC/DC front-end in 1U rack servers requiring >95% efficiency at 20% load and EN61000-3-2 Class C compliance. IC Role / Device Role / Timing Role: UCC3858N serves as the active PFC controller, regulating boost stage to deliver stable 385 V DC bus while enforcing sinusoidal input current synchronized to line voltage. Use Value: Frequency foldback maintains >92% efficiency at 10% load; leading-edge PWM + SYNC reduces bulk capacitor stress and extends lifetime by lowering ΔT. | Use Scenario: 150 W constant-current LED driver for commercial lighting with universal 90–264 VAC input and tight THD limits. IC Role / Device Role / Timing Role: UCC3858N configures the boost PFC stage preceding a flyback or LLC controller, delivering regulated high-voltage DC bus with <5% THD. Use Value: Integrated RMS detection eliminates filter drift errors; CRMS-based feedforward ensures consistent power factor >0.98 across full input range without recalibration. |
| Industrial Motor Drives | Medical AC/DC Adapters |
Use Scenario: 200 W variable-speed drive for HVAC blowers where EMI reduction and light-load efficiency are critical for fan speed modulation. IC Role / Device Role / Timing Role: UCC3858N controls interleaved or single-phase boost PFC to supply clean DC link for inverter stage, synchronized to downstream PWM via SYNC pin. Use Value: Synchronization cuts conducted EMI peaks by 10–15 dB; foldback minimizes audible noise at low speeds by avoiding audio-frequency switching. | Use Scenario: 65 W medical-grade AC/DC adapter certified to IEC 60601-1, requiring low leakage current, high reliability, and no derating below 25°C ambient. IC Role / Device Role / Timing Role: UCC3858N implements isolated PFC stage with undervoltage lockout (13.5 V turn-on) and overvoltage shutdown (3.15 V at VA–) for fail-safe operation. Use Value: 7.5 V VREF powers optocoupler bias and feedback circuitry; low 100 µA startup current enables compact, transformerless auxiliary supply design. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar active PFC controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UC3854BDW | Fixed 100 kHz oscillator; no frequency foldback; no integrated RMS detection; requires external 2-pole VRMS filter. | Lacks light-load efficiency optimization; higher THD at low line; less robust line transient response. | Choose UC3854BDW only if legacy design reuse is required and foldback/RMS features are unnecessary. |
| UCC28070DR | Continuous conduction mode (CCM) PFC controller with digital current sense; 65 kHz fixed frequency; no SYNC pin; no CRMS-based feedforward. | Designed for higher-power (>300 W) applications; lacks analog RMS integration and leading-edge PWM flexibility. | Prefer UCC28070DR for new high-power designs needing digital control headroom, but not for UCC3858N's light-load or synchronization use cases. |
Compared with UC3854BDW and UCC28070DR, the UCC3858N uniquely combines analog RMS feedforward, programmable frequency foldback, and SYNC-enabled leading-edge PWM-making it the only option among the three that simultaneously optimizes light-load efficiency, THD performance, and ripple-current reduction in sub-300 W PFC stages.
Availability
UCC3858N is available at Aetrix Electronics and suitable for server power supplies, LED driver front-ends, industrial motor drives, medical AC/DC adapters, and telecom rectifiers requiring stable component supply despite its obsolete status.
Supply support for UCC3858N includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog, embedded processing, and logic solutions for industrial, automotive, and communications markets.
The UCC3858N belongs to TI's legacy Unitrode PFC controller product line, engineered specifically for cost-sensitive, high-efficiency AC/DC front-ends where light-load operation, THD compliance, and board-level integration are primary design constraints.
FAQ
What is the operating temperature range for the UCC3858N?
The UCC3858N is specified for operation from 0°C to +70°C ambient temperature. This range is explicitly defined in the Electrical Characteristics table and applies to all key parameters including oscillator accuracy, reference voltage, and amplifier gains. The device's junction temperature rating extends to +150°C, but sustained operation above +70°C ambient requires careful thermal design due to its PDIP package's 65°C/W θJA. Derating curves are not provided in the datasheet, so thermal margin must be validated per application.
How does the UCC3858N implement frequency foldback, and what pins control it?
The UCC3858N implements frequency foldback by reducing the CT ramp charging current as the VAO voltage falls below the level set at the FBL pin. The difference between VAO and FBL regulates a subtractive current (ICsub) that lowers effective charge current into CT. Minimum frequency is set by resistor RFBM between FBM and VREF; pulling FBM below 1.5 V forces immediate exit from foldback. Thus, FBL and FBM are the dedicated control pins for initiating and overriding foldback in the UCC3858N.
Can the UCC3858N be synchronized to an external clock, and how is it configured?
Yes, the UCC3858N supports synchronization via its SYNC pin. A rising-edge pulse applied to SYNC resets the CT ramp, aligning the UCC3858N's switching edge with the downstream converter's clock. For reliable operation, the SYNC signal must be clean, fast-rising (<100 ns), and referenced to UCC3858N's GND. The free-running frequency must be set lower than the sync frequency using RT and CT values. This configuration is confirmed in Figure 3a and Application Note UDG-97120-1 for the UCC3858N.
What is the purpose of the CRMS pin on the UCC3858N, and what capacitor value is recommended?
The CRMS pin on the UCC3858N connects to an external capacitor that integrates mirrored IAC current over each AC half-cycle to generate an accurate RMS voltage representation. This eliminates the need for an external 2-pole filter and improves line transient response. For 50 Hz line, a 90 nF capacitor is recommended; for 60 Hz, 75 nF is optimal. These values ensure VCRMS reaches ~1 V at low line (80 VAC) and ~3.5 V at high line (265 VAC), as specified in the UCC3858N application section.
Does the UCC3858N provide overvoltage protection, and how is it triggered?
Yes, the UCC3858N provides internal overvoltage protection. It monitors the voltage at the VA– pin - which is connected to the output voltage divider - and terminates PWM output if VA– exceeds 3.15 V. This corresponds to a typical output overvoltage threshold of ~400 V for a standard 385 V DC bus with common resistor ratios. The protection is hardwired and does not require external components, making it a reliable fail-safe feature in the UCC3858N.
UCC3858N Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Bulk
- Product Status:
- Active
- Mode:
- Average Current
- Frequency - Switching:
- 100kHz
- Current - Startup:
- -
- Voltage - Supply:
- 12V ~ 18V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-PDIP
UCC3858N FAQ
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Please submit a Request for Quotation (RFQ) for UCC3858N on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UCC3858N?
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6.How does Aetrix verify that UCC3858N is sourced from the original manufacturer or authorized distributors?
All UCC3858N products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCC3858N meets industry standards.
7.What is the process for return or replacement of UCC3858N?
All UCC3858N units undergo pre-shipment inspection (PSI). If there is an issue with UCC3858N, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UCC3858N part is unused and in its original packaging.
Return procedure for UCC3858N:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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