My Inquiry
My Account
Texas Instruments UCC3957M-3
- Part No.:
- UCC3957M-3
- Manufacturer:
- Texas Instruments
- Category:
- Battery Management
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
UCC3957M-3.pdf
- Description:
- IC BATT PROT LI-ION 3-4CL 16SSOP
- Quantity:
- Payment:
- Shipping:
Inventory:2,775
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
UCC3957M-3 from Texas Instruments is a BiCMOS lithium-ion battery pack protector IC for three- or four-cell stacks, featuring 4.25 V to 4.35 V overvoltage threshold (typ. 4.30 V), two-tier overcurrent protection with user-programmable blanking times, and 3.5 µA sleep-mode supply current. It drives external P-channel MOSFETs for independent charge/discharge control in portable power tools and medical battery packs.
For engineers reviewing the UCC3957M-3 datasheet, UCC3957M-3 pinout, UCC3957M-3 application, or UCC3957M-3 equivalent, key selection considerations include its 16-pin SSOP package, cell-count programmability via CLCNT pin, smart discharge functionality during overcharge hysteresis, and compatibility with 0.025 Ω current-sense resistors for 6 A / 15 A tiered fault detection.
Technical Context
The UCC3957M-3 implements a continuous internal state machine that monitors individual cell voltages using flying-capacitor sampling across AN1–AN4 inputs, comparing them against a highly accurate internal reference. Its overvoltage threshold is factory-trimmed to 4.25–4.35 V (typ. 4.30 V) and undervoltage threshold to 2.5–2.7 V (typ. 2.6 V).
It delivers dual-tier overcurrent protection: first-tier trip at 150 mV (6 A with 0.025 Ω shunt) initiates hiccup mode with CDLY1-controlled on-time; second-tier trip at 375 mV (15 A) triggers extended off-time controlled by CDLY2. Smart discharge activates when BATLO voltage exceeds 15 mV, enabling discharge-only conduction through the charge FET during overcharge hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Overvoltage Threshold | 4.25 V to 4.35 V (typ. 4.30 V); sets precise cell upper limit for charge cutoff in Li-ion 3S/4S packs. |
| Undervoltage Threshold | 2.5 V to 2.7 V (typ. 2.6 V); prevents deep discharge damage to individual cells during pack operation. |
| Sleep Current | 3.5 µA typical; enables multi-year shelf life in stored battery packs without significant self-discharge. |
| Supply Range | 6.5 V to 20 V on VDD; supports full stack voltage of 3×Li-ion (11.1 V) or 4×Li-ion (14.8 V) plus margin. |
| First-Tier OC Threshold | 120–190 mV (typ. 150 mV); detects moderate overload (e.g., 6 A @ 0.025 Ω) before short-circuit escalation. |
| Second-Tier OC Threshold | 275–450 mV (typ. 375 mV); triggers fast shutdown for hard shorts (e.g., 15 A @ 0.025 Ω) with µs-level response. |
| Smart Discharge Threshold | 4–25 mV on BATLO (typ. 15 mV); enables safe discharge path through charge FET body diode only when load current >0.6 A. |
Pinout & Package
The UCC3957M-3 is housed in a 16-pin SSOP (DBQ) package with 0.65 mm pitch, moisture sensitivity level 2, and RoHS-compliant green finish (Pb-free, no Sb/Br).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD (1) | Power input | Connects to top of battery stack; supplies 6.5–20 V to internal regulators and logic. |
| CLCNT (2) | Cell-count configuration | High = 3-cell mode; low = 4-cell mode; internal pull-down ensures default 4S operation. |
| WU (3) | Wake-up input | Detects charger presence during sleep mode; threshold 50–750 mV above VDD. |
| AN1–AN3 (4–6) | Cell voltage sense taps | Interface to inter-cell nodes; enable per-cell monitoring via flying capacitor sampling. |
| AN4 (7) | Reference node | Common connection point for bottom of stack, current-sense resistor, and bypass caps. |
| BATLO (8) | Current-sense input | Measures voltage drop across external shunt; determines discharge current magnitude and direction. |
| CHGEN (9) | Charge-enable control | Must be pulled high to DVDD/AVDD to permit charging; weak internal pulldown holds off by default. |
| CDLY1 (10) | First-tier delay timing | Capacitor to AN4 sets blanking time (30–70 ms typ.) before hiccup mode initiation. |
| DCHG (13) | Discharge FET gate driver | Drives high-side P-MOSFET gate; high = block discharge; low = allow discharge. |
| CHG (12) | Charge FET level-shift driver | Drives N-MOSFET gate to control high-side P-MOSFET; low = block charge; high = allow charge. |
| CDLY2 (14) | Second-tier delay timing | Capacitor to AN4 extends blanking time (100–600 µs typ.) for severe overcurrent events. |
| DVDD (16) | Digital supply bypass | Nominally 7.3 V; requires 0.1 µF capacitor to AN4 for stable digital core operation. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable cell count | Single CLCNT pin selects 3-cell or 4-cell operation without external components or firmware change. |
| Two-tier overcurrent protection | Separate thresholds and timing capacitors (CDLY1/CDLY2) enable surge-tolerant short-circuit response. |
| Smart discharge during overcharge | Enables discharge-only conduction through charge FET body diode when load current >0.6 A, reducing power loss. |
| Loss-of-sense wire detection | Internal current sources detect open AN1–AN3 connections and prevent unsafe charging. |
| Low-power sleep mode | 3.5 µA typical quiescent current extends battery shelf life while retaining wake-on-charge capability. |
Applications
| Power Tools | Medical Portable Devices |
|---|---|
|
Use Scenario: Cordless drill/driver battery packs subject to high pulse currents and mechanical shock-induced cell imbalance. IC Role / Device Role / Timing Role: Real-time per-cell voltage monitoring and independent charge/discharge FET control to prevent overcharge/overdischarge during aggressive duty cycles. Use Value: Extends usable cycle life by >25% versus basic protectors through precise 4.30 V overvoltage threshold and smart discharge during hysteresis. |
Use Scenario: Rechargeable battery modules in portable ultrasound or infusion pumps requiring FDA-grade reliability and zero false shutdowns. IC Role / Device Role / Timing Role: Fault-tolerant protection with open-wire detection and dual-tier overcurrent response to avoid interruption during critical therapy delivery. Use Value: Eliminates risk of unexpected shutdown during high-current motor bursts via 15 A second-tier short-circuit trip with <600 µs blanking. |
| Consumer Drones | Industrial Handheld Scanners |
|
Use Scenario: 4S Li-ion packs powering brushless motors with rapid acceleration/deceleration causing large di/dt transients. IC Role / Device Role / Timing Role: High-speed cell sampling (4–11.5 ms period) and slew-rate-limited DCHG output to manage inductive kick at FET turn-off. Use Value: Prevents FET avalanche failure during emergency braking by limiting voltage undershoot via coordinated DCHG timing and external clamp diode support. |
Use Scenario: Ruggedized barcode scanners used in warehouses with frequent hot-swap battery replacement and ESD exposure. IC Role / Device Role / Timing Role: Wake-up pin (WU) tolerance to >20 V transient inputs and robust ANx input protection against miswiring or ESD events. Use Value: Ensures field-replaceable batteries remain functional after 10,000+ hot-swap cycles without calibration drift or latch-up. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar lithium-ion battery pack protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| BQ77PL90001RGER | Integrated 4S analog front-end with built-in FET drivers; supports up to 16 cells via daisy-chain; higher BOM cost. | Targeted at scalable multi-pack systems requiring communication bus (I²C/SMBus); not pin-compatible. | Select for new designs needing telemetry and configurable protection thresholds via firmware. |
| MP2672GQ-Z | Monolithic 3S/4S protector with integrated charge/discharge FETs; 2.5 µA sleep current; no external shunt required. | Optimized for space-constrained consumer devices; lacks smart discharge and open-wire detection. | Select when board area is critical and application does not require body-diode discharge optimization. |
Compared with BQ77PL90001RGER and MP2672GQ-Z, the UCC3957M-3 offers superior thermal efficiency in high-current discharge via smart discharge, deterministic analog timing for safety-critical response, and proven field reliability in industrial power tools - without communication overhead or monolithic integration trade-offs.
Availability
UCC3957M-3 is available at Aetrix Electronics and suitable for power tools, medical portable devices, consumer drones, and industrial handheld scanners requiring stable component supply and long-term lifecycle support.
Supply support for UCC3957M-3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in precision analog ICs.
The UCC3957M-3 belongs to TI's battery management IC portfolio designed specifically for high-reliability, discrete-FET-based lithium-ion protection in industrial and professional equipment where analog determinism and thermal resilience are critical.
FAQ
What is the overvoltage threshold setting for UCC3957M-3?
The UCC3957M-3 has a factory-trimmed normal-to-overcharge voltage threshold of 4.25 V to 4.35 V, with a typical value of 4.30 V. This precise threshold ensures reliable charge termination for 3S or 4S lithium-ion battery packs without premature cutoff or cell stress. The UCC3957M-3 achieves this accuracy using a highly stable internal voltage reference and laser trimming during production.
How does UCC3957M-3 implement smart discharge during overcharge?
The UCC3957M-3 monitors the BATLO pin voltage to detect discharge current flow. When the voltage exceeds 15 mV (corresponding to >0.6 A with a 0.025 Ω sense resistor), it re-enables the CHG output to allow discharge-only conduction through the charge FET's body diode. This reduces power dissipation from ~1 W to ~20 mW in typical 1 A loads. The UCC3957M-3 uses this feature exclusively during overcharge hysteresis to preserve battery energy.
Can UCC3957M-3 support both three-cell and four-cell battery configurations?
Yes, the UCC3957M-3 supports both configurations via the CLCNT pin: tying CLCNT high (to DVDD or AVDD) configures 3-cell operation, while tying it low (to AN4) selects 4-cell mode. The pin has an internal pull-down, so an unconnected CLCNT defaults to 4S. This flexibility allows one UCC3957M-3 design to serve multiple battery platforms without hardware revision.
What is the purpose of the CDLY1 and CDLY2 pins on UCC3957M-3?
CDLY1 sets the blanking time for the first-tier overcurrent response (30–70 ms typical), preventing nuisance trips during capacitive load charging. CDLY2 controls the blanking time for the second-tier response (100–600 µs typical), enabling ultra-fast shutdown for hard shorts. Both pins connect to AN4 via external capacitors, allowing designers to tune protection timing precisely for their specific load profile. The UCC3957M-3 relies on these pins to deliver differentiated response to moderate surges versus catastrophic faults.
Does UCC3957M-3 provide protection against broken cell-sense connections?
Yes, the UCC3957M-3 includes open-wire detection: if any AN1, AN2, or AN3 sense line becomes disconnected, internal weak current sources cause the connected cells to appear overcharged, blocking further charging. This prevents dangerous overvoltage conditions in partially sensed packs. The UCC3957M-3 implements this function entirely in analog hardware, ensuring fail-safe behavior without software dependency or timing delays.
UCC3957M-3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Function:
- Battery Protection
- Battery Chemistry:
- Lithium Ion
- Number of Cells:
- 3 ~ 4
- Fault Protection:
- Over Current, Over/Under Voltage
- Interface:
- -
- Operating Temperature:
- -20°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SSOP
UCC3957M-3 FAQ
1.How can I place an order for UCC3957M-3 through Aetrix?
Please submit a Request for Quotation (RFQ) for UCC3957M-3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UCC3957M-3 reliable?
The price and inventory of UCC3957M-3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UCC3957M-3 is usually 5 days.
3.What payment methods are accepted for UCC3957M-3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UCC3957M-3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UCC3957M-3?
UCC3957M-3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UCC3957M-3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UCC3957M-3?
For technical support, including UCC3957M-3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UCC3957M-3 requirements.
6.How does Aetrix verify that UCC3957M-3 is sourced from the original manufacturer or authorized distributors?
All UCC3957M-3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCC3957M-3 meets industry standards.
7.What is the process for return or replacement of UCC3957M-3?
All UCC3957M-3 units undergo pre-shipment inspection (PSI). If there is an issue with UCC3957M-3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UCC3957M-3 part is unused and in its original packaging.
Return procedure for UCC3957M-3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
UCC3957M-3 Tags
-
BQ29700DSER
Texas Instruments
-
S-8241ABKMC-GBKT2G
ABLIC Inc.
-
S-8241ABPMC-GBPT2G
ABLIC Inc.
-
BQ27427YZFR
Texas Instruments
-
BQ27426YZFR
Texas Instruments
-
STC3117IJT
STMicroelectronics
-
STC3115IJT
STMicroelectronics
-
BQ76925RGER
Texas Instruments
-
NPM1100-QDAA-R
Nordic Semiconductor ASA
-
BQ27441DRZR-G1A
Texas Instruments
-
STC3115AIQT
STMicroelectronics
-
S-8252AAL-M6T1U
ABLIC Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
