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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Supervisors

Texas Instruments UCD9080RHBR

Name: UCD9080RHBR
Brand: Texas Instruments
SKU: UCD9080RHBR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: UCD9080RHBR

Manufacturer:: Texas Instruments

Category:: Supervisors

Package:: 32-VFQFN Exposed Pad

Datasheet:: UCD9080RHBR.pdf

Description:: IC SUPERVISOR 8 CHANNEL 32VQFN

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Product details

Overview

UCD9080RHBR from Texas Instruments is an 8-channel power-supply sequencer and monitor IC designed for precise control of voltage rail startup, shutdown, and fault response in complex multi-rail systems. It operates from a single 3.3-V supply, provides 3.2-mV resolution analog monitoring of eight rails sampled every 50 µs, and supports configurable digital outputs (EN1–EN8, GPO1–GPO4) with Schmitt-trigger inputs and programmable polarity. It is used in telecom switches, servers, and networking equipment requiring deterministic power sequencing.

For engineers reviewing the UCD9080RHBR datasheet, UCD9080RHBR pinout, UCD9080RHBR application, or UCD9080RHBR equivalent, key selection criteria include per-rail UV/OV threshold configurability, parent-child rail dependency logic, I²C slave interface timing compliance (10–100 kHz), retention of configuration for 100 years, and support for both internal 2.5-V and external VCC-referenced ADC operation.

Technical Context

The UCD9080RHBR implements a dual-stage monitoring architecture: an analog front-end with 10-bit SAR ADC and selectable 2.5-V internal or 3.3-V external reference, coupled with a digital sequencing engine that supports time-based, regulation-based, and voltage-threshold-based enable triggers. Each of the eight MONx inputs has ≤20 kΩ source impedance requirement to sustain >20-kHz sampling rate.

Its I²C interface operates in standard-mode only (10–100 kHz), uses 7-bit addressing (0x60–0x6F), and requires external pull-ups on SDA/SCL. All EN/GPO pins default to Schmitt-trigger inputs during reset and support active-high/active-low configuration; EN8/ADDR1/GPO1 is multiplexed across three functions, requiring careful external resistor network design for address latching and output use.

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage	3.0–3.6 V - Operates from single 3.3-V rail; brownout detection activates at VCC ≤1.71 V with 70–180 mV hysteresis.
Rail Monitoring Channels	8 independent MON inputs (MON1–MON8) - Supports simultaneous sampling of eight voltage rails with 3.2-mV resolution.
ADC Reference Options	Internal 2.5-V ±17.4 mV or external VCC (3.3 V) ±6.8 mV - Choice affects rail measurement accuracy and eliminates need for external reference IC.
Sequencing Flexibility	Time-based, parent-rail regulation, or voltage-threshold triggers - Enables hierarchical startup (e.g., 3.3-V rail must regulate before enabling 1.2-V core).
Digital Outputs	8 ENx outputs + 4 GPOs (multiplexed with ADDR1–ADDR4) - Configurable polarity; EN8 shares pin with ADDR1 and GPO1.
I²C Interface	Standard-mode slave (10–100 kHz), 7-bit address (0x60–0x6F), no general-call support - Compatible with TI C2000™, TMS320™ DSPs, and 3.3-V microcontrollers.
Configuration Retention	100-year nonvolatile storage - Configuration survives power cycles without external EEPROM or battery backup.

Pinout & Package

UCD9080RHBR is housed in a 32-pin QFN package (RHB) with 5-mm × 5-mm body, 0.5-mm pitch, and exposed thermal pad. Pin 1 is located at bottom-left corner when marking side faces up and notch/pin-1 indicator is at top-left.

Pin/Terminal	Circuit Role	Design Meaning
VSS (Pin 1)	Ground reference	Primary return path for analog/digital circuits; must be low-inductance connection to system ground plane.
XIN (Pin 3)	Oscillator input	Internally tied to VCC; must be connected to 3.3 V to enable internal oscillator for ADC timing.
RST (Pin 5)	Reset input	Active-low asynchronous reset; initiates full sequencer reinitialization and forces all EN/GPO into high-Z state for ~4–5 ms.
MON1–MON8 (Pins 6–9, 15–19, 25)	Analog voltage monitoring inputs	High-impedance (±50 nA leakage) inputs accepting 0–VREF range; require ≤20 kΩ source impedance for full 20-kHz sampling rate.
EN1–EN7 (Pins 10–14, 23–24)	Rail enable outputs	Configurable active-high/low digital outputs driving external DC/DC enable pins; default to Schmitt-trigger inputs during reset.
EN8/ADDR1/GPO1 (Pin 25)	Multiplexed terminal	Latched as I²C address bit A1 during reset; configurable as rail enable (EN8), GPO1, or address select-only one function active at a time.
ADDR2/GPO2 (Pin 26)	I²C address / GPO	Same dual-function behavior as ADDR1; externally pulled to define I²C address bits A2–A4 during reset, then usable as GPO2–GPO4 post-reset.
SCL (Pin 22)	I²C clock line	Open-drain input/output requiring external 3.3-V pull-up; supports standard-mode timing (tLOW ≥4.7 µs, tHIGH ≥4 µs).
SDA (Pin 21)	I²C data line	Open-drain bidirectional bus line requiring external 3.3-V pull-up; supports combined-format reads with repeated START.
ROSC (Pin 32)	Oscillator frequency adjust	Connect 100-kΩ pullup to VCC to set nominal 100-kHz internal oscillator frequency for stable ADC sampling.

Key Features

Feature	Design Value
Per-rail UV/OV threshold programming	Independent undervoltage and overvoltage limits settable for each MONx channel via I²C registers, enabling granular fault detection.
Parent-child rail dependency logic	Each rail can be configured to shut down dependent rails upon sustained fault (e.g., 3.3-V rail failure disables all downstream 1.2-V/1.8-V supplies).
Four configurable general-purpose outputs	GPO1–GPO4 (shared with ADDR1–ADDR4) support sequencing, reset assertion, or status signaling-programmable polarity and timing alignment with rail enables.
Automatic register address increment	I²C read/write transactions auto-increment register pointer (e.g., reading RAIL1H at 0x00 advances to RAIL1L at 0x01), accelerating bulk monitoring of all eight rails.
100-year configuration retention	All sequencer settings-including timing delays, thresholds, dependencies, and GPO states-are stored in on-chip nonvolatile memory without external components.

Applications

Telecom Switches	Servers
Use Scenario: High-density line cards with 12+ voltage rails including CPU core, memory, PHY, and management power domains. IC Role / Device Role / Timing Role: Centralized sequencer enforcing strict startup order (e.g., 12-V bias → 3.3-V aux → 1.8-V I/O → 1.2-V core) and detecting rail collapse within 50 µs. Use Value: Prevents latch-up and hot-plug damage by ensuring proper power-up sequence and providing timestamped fault logs for root-cause analysis.	Use Scenario: Dual-socket x86 server motherboards with redundant 12-V, 5-V, 3.3-V, 1.8-V, and 1.2-V rails feeding CPUs, DIMMs, PCIe slots, and BMC. IC Role / Device Role / Timing Role: Monitors all critical rails simultaneously while coordinating enable timing across multiple VRMs; triggers graceful shutdown on sustained OV/UV events. Use Value: Eliminates need for discrete supervisors and timers, reducing BOM count and PCB area while improving system reliability through deterministic fault response.
Networking Equipment	Test Equipment
Use Scenario: 10G/25G Ethernet switches with PoE controllers, SERDES supplies, and FPGA I/O banks requiring tight regulation windows. IC Role / Device Role / Timing Role: Enforces regulation-based sequencing (e.g., 3.3-V auxiliary must stabilize before enabling 1.0-V SERDES), monitors glitch duration per rail, and logs timestamps for sustained faults. Use Value: Ensures signal integrity by preventing SERDES lock failure due to premature power-on and enables field diagnostics via I²C-accessible alarm history.	Use Scenario: Automated test equipment (ATE) with programmable DUT power supplies, calibration references, and safety interlocks. IC Role / Device Role / Timing Role: Sequences DUT power rails in precise order, asserts GPOs to enable calibration circuitry or engage safety relays, and reports rail health to host controller via I²C. Use Value: Reduces test setup time by automating power sequencing and improves repeatability by eliminating manual power-on steps and human error.

Telecom Switches

Servers

Use Scenario: High-density line cards with 12+ voltage rails including CPU core, memory, PHY, and management power domains.

IC Role / Device Role / Timing Role: Centralized sequencer enforcing strict startup order (e.g., 12-V bias → 3.3-V aux → 1.8-V I/O → 1.2-V core) and detecting rail collapse within 50 µs.

Use Value: Prevents latch-up and hot-plug damage by ensuring proper power-up sequence and providing timestamped fault logs for root-cause analysis.

Use Scenario: Dual-socket x86 server motherboards with redundant 12-V, 5-V, 3.3-V, 1.8-V, and 1.2-V rails feeding CPUs, DIMMs, PCIe slots, and BMC.

IC Role / Device Role / Timing Role: Monitors all critical rails simultaneously while coordinating enable timing across multiple VRMs; triggers graceful shutdown on sustained OV/UV events.

Use Value: Eliminates need for discrete supervisors and timers, reducing BOM count and PCB area while improving system reliability through deterministic fault response.

Networking Equipment

Test Equipment

Use Scenario: 10G/25G Ethernet switches with PoE controllers, SERDES supplies, and FPGA I/O banks requiring tight regulation windows.

IC Role / Device Role / Timing Role: Enforces regulation-based sequencing (e.g., 3.3-V auxiliary must stabilize before enabling 1.0-V SERDES), monitors glitch duration per rail, and logs timestamps for sustained faults.

Use Value: Ensures signal integrity by preventing SERDES lock failure due to premature power-on and enables field diagnostics via I²C-accessible alarm history.

Use Scenario: Automated test equipment (ATE) with programmable DUT power supplies, calibration references, and safety interlocks.

IC Role / Device Role / Timing Role: Sequences DUT power rails in precise order, asserts GPOs to enable calibration circuitry or engage safety relays, and reports rail health to host controller via I²C.

Use Value: Reduces test setup time by automating power sequencing and improves repeatability by eliminating manual power-on steps and human error.

Equivalent & Alternatives

The following parts are listed as comparable options for similar power-supply sequencing applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
UCD90100RGZR	12-channel sequencer with PMBus interface, 16-kV ESD rating, and enhanced rail dependency matrix; requires external 32.768-kHz crystal for timestamping.	Supports higher channel count and PMBus v1.2 commands (e.g., STORE_DEFAULT_ALL); suited for next-gen servers needing finer-grained telemetry.	Select UCD90100RGZR when scaling beyond eight rails or requiring PMBus compatibility and extended diagnostic logging.
TPS65400RGER	Integrated 6-channel PMIC with buck controllers, LDOs, and sequencer; fixed internal topology; no MONx flexibility or I²C-configurable thresholds.	Targeted at cost-sensitive embedded applications where integrated regulation + sequencing is preferred over discrete monitoring.	Choose TPS65400RGER only when combining regulation and sequencing in one package is mandatory and rail count ≤6.

Compared with UCD9080RHBR, UCD90100RGZR offers greater scalability and protocol depth but adds complexity and cost; TPS65400RGER reduces component count but sacrifices monitoring precision, configurability, and channel count-making UCD9080RHBR optimal for mid-channel-count, high-flexibility, I²C-based sequencing in telecom and enterprise infrastructure.

Availability

UCD9080RHBR is available at Aetrix Electronics and suitable for telecom switches, servers, and networking equipment requiring stable component supply, long-lifecycle support, and guaranteed traceability for industrial and infrastructure deployments.

Supply support for UCD9080RHBR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions with emphasis on reliability, longevity, and industrial-grade performance.

The UCD9080RHBR belongs to TI's Power Management Unit (PMU) sequencer family, engineered specifically for deterministic, software-configurable power sequencing in high-availability systems where rail coordination, fault logging, and I²C-based remote monitoring are critical.

FAQ

What is the primary function of the UCD9080RHBR in a power system?

The UCD9080RHBR serves as an 8-channel power-supply sequencer and monitor IC that controls the startup/shutdown order of voltage rails, monitors rail voltages with 3.2-mV resolution every 50 µs, detects undervoltage/overvoltage events, and executes configurable responses-including rail shutdown and GPO assertion-via its I²C interface. Its role is central to system reliability in telecom switches and servers.

Does the UCD9080RHBR require an external clock or memory to operate?

No, the UCD9080RHBR requires neither external clock nor memory. It uses an internal 100-kHz oscillator (configured via ROSC pin with 100-kΩ pullup to VCC) for ADC timing and stores all configuration parameters in on-chip nonvolatile memory with 100-year retention. No external EEPROM, crystal, or timing source is needed for basic sequencing and monitoring functionality.

How does the UCD9080RHBR handle I²C address configuration?

The UCD9080RHBR samples the logic levels of four dedicated pins (EN8/ADDR1, ADDR2, ADDR3, ADDR4) during device reset to determine its 7-bit I²C slave address (0x60–0x6F). External pull-up/pull-down resistors must be used-no internal biasing is provided. After reset, those same pins become configurable GPOs, enabling reuse without additional GPIO resources.

Can the UCD9080RHBR monitor voltage rails exceeding 3.3 V?

Yes, the UCD9080RHBR can monitor rails above 3.3 V using external resistor divider networks on MONx inputs. The device accepts 0–VREF input range, so with VCC (3.3 V) selected as reference, dividers must scale higher voltages (e.g., 12 V) to ≤3.3 V. Source impedance must remain ≤20 kΩ to maintain 20-kHz sampling rate; buffer amplifiers may be required for high-resistance dividers.

What happens to EN and GPO pins during device reset?

During reset-triggered by RST pin low, power-on, or sequencer fault-all ENx and GPOx pins revert to Schmitt-trigger inputs with defined threshold voltages (VIT+ = 1.5–1.9 V, VIT− = 0.9–1.3 V). External resistor networks must bias each pin to the correct logic level (≥1.9 V for active-low, ≤0.9 V for active-high) during reset to ensure predictable post-reset behavior of the UCD9080RHBR sequencer.

UCD9080RHBR Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: -

Package/Case:: 32-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: Sequencer

Number of Voltages Monitored:: 8

Voltage - Threshold:: Adjustable/Selectable

Output:: -

Reset:: Active High/Active Low

Reset Timeout:: 2µs Minimum

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 32-VQFN (5x5)

UCD9080RHBR FAQ

1.How can I place an order for UCD9080RHBR through Aetrix?

Please submit a Request for Quotation (RFQ) for UCD9080RHBR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for UCD9080RHBR reliable?

The price and inventory of UCD9080RHBR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UCD9080RHBR is usually 5 days.

3.What payment methods are accepted for UCD9080RHBR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UCD9080RHBR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for UCD9080RHBR?

UCD9080RHBR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your UCD9080RHBR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for UCD9080RHBR?

For technical support, including UCD9080RHBR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UCD9080RHBR requirements.

6.How does Aetrix verify that UCD9080RHBR is sourced from the original manufacturer or authorized distributors?

All UCD9080RHBR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCD9080RHBR meets industry standards.

7.What is the process for return or replacement of UCD9080RHBR?

All UCD9080RHBR units undergo pre-shipment inspection (PSI). If there is an issue with UCD9080RHBR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The UCD9080RHBR part is unused and in its original packaging.

Return procedure for UCD9080RHBR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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