Texas Instruments UCD9090RGZR
- Part No.:
- UCD9090RGZR
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
UCD9090RGZR.pdf
- Description:
- IC SUPERVISOR 10 CHANNEL 48VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:830
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Product details
Overview
UCD9090RGZR from Texas Instruments is a 10-rail PMBus/I²C-addressable power-supply sequencer and monitor featuring a 12-bit ADC (2.5 V ±0.5% internal reference), 400 μs per-rail sampling, closed-loop margining for all 10 rails, and support for ACPI-compliant pin-selected rail states. It integrates 23 GPIOs - including 10 PWM-capable outputs (FPWM1–8, PWM1–2) - and enables precise sequencing, fault logging, and system health reporting in multi-rail server and telecom power systems.
For engineers reviewing the UCD9090RGZR datasheet, UCD9090RGZR pinout, UCD9090RGZR application, or UCD9090RGZR equivalent, this device is selected for high-reliability power management where deterministic sequencing, real-time voltage monitoring, closed-loop margining, PMBus-based configuration, and cascaded multi-device coordination are required.
Technical Context
The UCD9090RGZR implements a deterministic, time- and event-driven sequencing engine with Boolean logic builder for up to 10 GPOs, enabling programmable fault responses and state transitions based on GPI inputs, POWER_GOOD flags, or rail status. Its 12-bit ADC samples all 10 monitored rails every 400 μs with input ranges of 0–2.5 V (MON1–MON10) and 0.2–2.5 V (MON11).
It supports dual-mode control: PMBus slave operation (100 kHz/400 kHz, compliant with PMBus v1.1) and pin-based logic using up to 8 configurable GPIs. Margining is implemented via 8 FPWM outputs (15.26 kHz–125 MHz) and 2 dedicated PWM outputs (0.93 Hz–7.81 MHz), each driving external DACs or error amplifiers for closed-loop voltage adjustment.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Rails monitored | 10 independent voltage rails (MON1–MON10), sampled every 400 μs for real-time health assessment |
| ADC resolution & reference | 12-bit SAR ADC with 2.5 V ±0.5% internal reference (0°C–125°C), enabling ±12.2 mV absolute voltage accuracy |
| PWM margining outputs | 10 total: 8 FPWM (15.26 kHz–125 MHz) + 2 PWM (0.93 Hz–7.81 MHz), supporting analog trim of DC-DC feedback nodes |
| GPIO count & flexibility | 23 GPIOs: 8 configurable as GPIs, 10 as GPOs with Boolean logic builder, plus JTAG pins usable as GPIOs |
| Communication interface | PMBus v1.1 / I²C / SMBus slave (100/400 kHz), with ALERT, CNTRL, ADDR0/ADDR1, and full command support including MFR_SPECIFIC |
| Fault logging | Nonvolatile flash stores up to 30 timestamped fault entries with peak-value capture per rail for failure analysis |
| Operating temperature | –40°C to +110°C ambient, with junction limit of 125°C and thermal resistance RθJA = 25°C/W (VQFN-48) |
Pinout & Package
UCD9090RGZR is housed in a 48-pin VQFN package (7.0 mm × 7.0 mm) with exposed thermal pad tied to ground. The package supports high-density PCB layout and efficient heat dissipation in multi-rail power management applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| MON1–MON10 | Analog monitor input | 0–2.5 V rail voltage sensing inputs; 12-bit ADC channels with 8 MΩ input impedance |
| MON11 | Analog monitor input | 0.2–2.5 V extended-range input for bias-sensitive rails or temperature sensors |
| FPWM1–FPWM8 | PWM output / GPIO | Configurable high-frequency margining outputs (15.26 kHz–125 MHz) or general-purpose I/O |
| PWM1 / PWM2 | PWM output / GPI | Low-frequency margining or system timing outputs (0.93 Hz–7.81 MHz) with GPI fallback mode |
| PMBus_CLK / DATA / ALERT / CNTRL | PMBus interface | Standard SMBus-compatible bus interface with open-drain ALERT (active-low) and address selection via ADDR0/ADDR1 |
| GPIO1–GPIO21 (excl. JTAG) | General-purpose I/O | 23 total GPIOs; up to 8 usable as GPIs for Boolean logic inputs, up to 10 as GPOs with state machines |
| TCK/TDO/TDI/TMS/TRST | JTAG boundary scan | IEEE 1149.1-compliant test interface; TDI/TMS pulled up to VDD via 10-kΩ resistors; TRST pulled to ground |
| V33A / V33D / DVSS / AVSS1 / AVSS2 | Power supply & ground | Separate analog (3.3 V) and digital (3.3 V) supplies with dedicated analog/digital ground planes for noise isolation |
Key Features
| Feature | Design Value |
|---|---|
| Closed-loop margining for 10 rails | Enables four-corner testing and dynamic voltage trimming via FPWM/PWM outputs driving external DACs or error amps |
| ACPI-compliant pin-selected rail states | Uses up to 3 GPIs to define 8 discrete power states (e.g., S0–S5), supporting low-power modes without host intervention |
| Nonvolatile fault & peak logging | Stores 30+ timestamped fault records with rail-specific OV/UV/warning details in on-chip flash for post-failure diagnostics |
| Cascadable multi-device architecture | Supports synchronization and dependency chaining across multiple UCD9090RGZR units for >10-rail systems |
| Boolean logic builder for GPOs | Each of 10 GPOs accepts programmable logic combining GPIs, POWER_GOOD, faults, and other system flags for custom response |
| Multi-phase PWM clock generator | Generates synchronized clock outputs (15.26 kHz–125 MHz) to align switching frequencies of multiple DC-DC converters |
Applications
| Server Power Sequencing | Telecom Line Card Monitoring |
|---|---|
Use Scenario: Sequencing 10+ voltage rails (12 V, 3.3 V, 1.8 V, 0.8 V) for CPU, memory, FPGA, and I/O in 1U/2U rack servers. IC Role / Device Role / Timing Role: Centralized sequencer and monitor enforcing turn-on/off order, timing dependencies, and POWER_GOOD handshaking per ACPI spec. Use Value: Prevents latch-up and inrush damage by ensuring strict monotonic ramping and inter-rail timing compliance. |
Use Scenario: Real-time monitoring of DC-DC outputs, temperature, and current on high-density telecom line cards with hot-swap capability. IC Role / Device Role / Timing Role: System health controller logging OV/UV faults, triggering WDOG reset or SYSTEM_RESET on critical failures. Use Value: Enables predictive maintenance and field-failure root-cause analysis via nonvolatile peak/fault logging. |
| Industrial PLC Power Management | Network Switch Fabric Power Control |
Use Scenario: Managing isolated 24 V, 5 V, 3.3 V, and 1.2 V rails in ruggedized programmable logic controllers with wide temperature range. IC Role / Device Role / Timing Role: Fault-resilient sequencer with watchdog timer and cascaded reset propagation across modular backplane slots. Use Value: Ensures deterministic recovery after brownout or overvoltage events without host CPU involvement. |
Use Scenario: Coordinating power-up of switch ASIC, SerDes, PHY, and management MCU in multi-chip network switches. IC Role / Device Role / Timing Role: Multi-phase PWM clock generator synchronizing switching regulators to reduce EMI; margining for voltage tolerance validation. Use Value: Lowers radiated emissions and validates rail stability across process/voltage/temperature corners during production test. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power-supply sequencer and monitor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCD90120ARGCR | 12-rail capacity, integrated 10-bit ADC, no FPWM outputs; uses internal DACs for margining instead of PWM | Lacks high-frequency FPWM margining; better suited for cost-sensitive, lower-channel-count systems without closed-loop trim needs | Select UCD90120ARGCR when rail count exceeds 10 but margining frequency <100 kHz suffices and BOM simplification is prioritized |
| LM9926PWR | 6-rail sequencer with 10-bit ADC, no PMBus, only I²C; no margining, no Boolean logic, no cascading | Targeted at entry-level industrial applications requiring basic sequencing only - no fault logging or advanced control | Choose LM9926PWR only for simple 6-rail systems lacking PMBus infrastructure, margining, or cascading requirements |
Compared with UCD9090RGZR, UCD90120ARGCR offers higher rail count but sacrifices FPWM-based closed-loop margining fidelity and timing resolution, while LM9926PWR provides minimal sequencing without monitoring depth, fault intelligence, or system-level coordination features essential for enterprise-grade power management.
Availability
UCD9090RGZR is available at Aetrix Electronics and suitable for server motherboard design, telecom line card manufacturing, industrial PLC development, and network switch power subsystem integration requiring stable component supply, long-lifecycle availability, and traceable sourcing.
Supply support for UCD9090RGZR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and power management technologies, with leadership in high-reliability industrial and communications ICs.
The UCD9090RGZR belongs to TI's Fusion Digital Power™ sequencer family, designed specifically for complex, multi-rail power systems in servers, networking gear, and industrial automation where deterministic sequencing, real-time monitoring, and field-diagnostic capability are mandatory.
FAQ
What is the primary function of the UCD9090RGZR in a power system?
The UCD9090RGZR serves as a centralized 10-rail power-supply sequencer and monitor. It enforces precise turn-on/turn-off sequences, continuously samples rail voltages via its 12-bit ADC, logs faults in nonvolatile memory, and performs closed-loop margining using its 10 PWM outputs. In systems like servers or telecom equipment, the UCD9090RGZR ensures safe, repeatable power-up and robust fault response without host processor involvement.
Does the UCD9090RGZR support both PMBus and pin-based control?
Yes, the UCD9090RGZR supports dual-mode control: as a PMBus v1.1 slave for host-driven configuration and monitoring, and via up to 8 GPIOs configured as GPIs for autonomous, pin-based sequencing and state transitions. Its Boolean logic builder allows each of 10 GPOs to respond to combinations of GPIs, POWER_GOOD signals, and fault flags - enabling ACPI-compliant low-power states even without PMBus communication.
How many voltage rails can the UCD9090RGZR monitor and sequence simultaneously?
The UCD9090RGZR monitors and sequences up to 10 independent voltage rails using its MON1–MON10 analog inputs. Each rail supports programmable undervoltage/overvoltage warning and fault thresholds, power-good detection, turn-on/off delays, and dependency-based sequencing. An additional MON11 input supports extended-range sensing but is not counted among the 10 sequenced rails.
What is the role of FPWM outputs in the UCD9090RGZR?
The UCD9090RGZR includes eight FPWM outputs (FPWM1–FPWM8) operating from 15.26 kHz to 125 MHz, used primarily for closed-loop margining of DC-DC converter outputs. These outputs drive external DACs or error amplifier inputs to dynamically adjust rail voltages during production test or in-field calibration. Unlike standard PWMs, FPWMs provide high-frequency precision essential for accurate voltage trimming without introducing low-frequency ripple.
Can multiple UCD9090RGZR devices be synchronized in one system?
Yes, the UCD9090RGZR supports cascading via dedicated GPIOs to coordinate sequencing and fault response across multiple units. This enables scalable power management for systems requiring more than 10 rails - for example, large-scale servers or modular telecom chassis - while maintaining synchronized timing, shared watchdog behavior, and unified fault propagation through the cascade chain.
UCD9090RGZR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Sequencer
- Number of Voltages Monitored:
- 10
- Voltage - Threshold:
- Adjustable/Selectable
- Output:
- -
- Reset:
- Active Low
- Reset Timeout:
- 2µs Minimum
- Operating Temperature:
- -40°C ~ 110°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-VQFN (7x7)
UCD9090RGZR FAQ
1.How can I place an order for UCD9090RGZR through Aetrix?
Please submit a Request for Quotation (RFQ) for UCD9090RGZR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UCD9090RGZR reliable?
The price and inventory of UCD9090RGZR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UCD9090RGZR is usually 5 days.
3.What payment methods are accepted for UCD9090RGZR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UCD9090RGZR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UCD9090RGZR?
UCD9090RGZR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UCD9090RGZR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UCD9090RGZR?
For technical support, including UCD9090RGZR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UCD9090RGZR requirements.
6.How does Aetrix verify that UCD9090RGZR is sourced from the original manufacturer or authorized distributors?
All UCD9090RGZR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCD9090RGZR meets industry standards.
7.What is the process for return or replacement of UCD9090RGZR?
All UCD9090RGZR units undergo pre-shipment inspection (PSI). If there is an issue with UCD9090RGZR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UCD9090RGZR part is unused and in its original packaging.
Return procedure for UCD9090RGZR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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