NXP Semiconductors UDA1380HN/N2,118

Overview

UDA1380HN/N2,118 from NXP Semiconductors is a stereo audio coder-decoder IC with 24-bit ADC/DAC data path, 2.4–3.6 V supply, I²S/MSB/LSB serial interface support, and integrated headphone driver capable of 35 mW into 16 Ω - designed for MiniDisc, CD, and MP3 portable audio playback and recording systems.

For engineers reviewing the UDA1380HN/N2,118 datasheet, UDA1380HN/N2,118 pinout, UDA1380HN/N2,118 application, or UDA1380HN/N2,118 equivalent, this page delivers verified functional architecture, validated clocking modes (SYSCLK or WSPLL), confirmed analog front-end configuration (stereo line + mono mic with LNA/VGA), and real-world power management behavior across record/playback/power-down states.

Technical Context

The UDA1380HN/N2,118 implements dual-domain clocking: ADC supports 8–55 kHz sampling via SYSCLK (256fs–768fs) or WSPLL-recovered WSI; DAC supports 8–100 kHz using either domain independently. Its decimation filter includes digital AGC with attack/decay control and DC cancellation, while the interpolation filter integrates cosine roll-off soft mute, de-emphasis (32/44.1/48/96 kHz), and independent bass/treble tone control.

Analog signal paths are fully configurable: stereo line input with PGA (0–24 dB in 3 dB steps), mono microphone input with 29 dB LNA plus 0–30 dB VGA (2 dB steps), and dual output stages - single-ended line outputs plus a capacitorless stereo headphone driver with short-circuit protection status reporting via L3/I²C bus.

Key Specifications

Pinout & Package

HVQFN32 package (5 × 5 × 0.85 mm, no leads, 32-terminal thermal-enhanced quad flat); exposed thermal pad (VSSA(HP)) for improved heat dissipation in portable audio applications.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar stereo audio codec applications.

Compared with AK4552VN and TLV320AIC23BPW, UDA1380HN/N2,118 uniquely integrates a capacitorless 16 Ω headphone driver with short-circuit protection and a dedicated 29 dB LNA+VGA mic front-end - reducing total BOM count by ≥4 passive components and enabling true single-chip portable audio recording/playback.

Availability

UDA1380HN/N2,118 is available at Aetrix Electronics and suitable for portable audio players, MiniDisc recorders, and CD transports requiring stable component supply, long-lifecycle availability, and automotive-grade reliability validation.

Supply support for UDA1380HN/N2,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and consumer electronics.

The UDA1380 product line was engineered specifically for portable digital audio applications - integrating high-fidelity ADC/DAC, low-power headphone drive, and flexible digital audio interfaces to enable compact, battery-efficient MD/CD/MP3 devices.

FAQ

What is the maximum sampling frequency supported by the ADC in UDA1380HN/N2,118?

The ADC in UDA1380HN/N2,118 supports sampling frequencies from 8 kHz to 55 kHz. It does not support DVD-Audio sampling rates (e.g., 96 kHz or 192 kHz). This range is optimized for MiniDisc, CD, and MP3 applications where 44.1 kHz and 48 kHz are standard. The datasheet explicitly states that DVD audio is unsupported on the ADC side, though DAC playback extends to 100 kHz.

Does UDA1380HN/N2,118 require external DC-blocking capacitors for headphone output?

No, UDA1380HN/N2,118 does not require external DC-blocking capacitors for its headphone outputs. It features a capacitorless architecture using VREF(HP) as a bias reference, allowing direct connection to 16 Ω headphones. This eliminates two large electrolytic capacitors per channel, reducing PCB area and cost. Performance data confirms 60 dB THD+N into 16 Ω with no external caps.

How does the AGC function in UDA1380HN/N2,118 operate during microphone recording?

The AGC in UDA1380HN/N2,118 dynamically adjusts microphone gain to maintain consistent output level during speech recording. It operates within the decimation filter path, bypassing digital volume control when enabled. Attack/decay time and target level are programmable via L3/I²C registers. The AGC requires the DC cancellation filter to be enabled (SKIP_DCFIL = 0) to prevent offset-induced distortion.

Can UDA1380HN/N2,118 operate with different sample rates for ADC and DAC simultaneously?

Yes, UDA1380HN/N2,118 supports independent sample rates for ADC and DAC. The ADC can run from 8–55 kHz using SYSCLK or WSPLL, while the DAC operates from 8–100 kHz using either clock source. For example, the ADC may sample microphone input at 16 kHz while the DAC plays back MP3 audio at 44.1 kHz - both domains active concurrently without resampling.

What control interfaces does UDA1380HN/N2,118 support, and how are they selected?

UDA1380HN/N2,118 supports both L3-bus and I²C-bus interfaces. Selection is hardware-controlled via the SEL_L3_IIC pin: logic high enables L3-bus mode; logic low enables I²C-bus mode. Both interfaces operate at 400 kHz (I²C) or equivalent L3 timing, providing identical register access to all functions including volume, tone control, AGC, and power management.