NXP Semiconductors UJA1075ATW/5V0/1J
- Part No.:
- UJA1075ATW/5V0/1J
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 32-TSSOP (0.240", 6.10mm Width) Exposed Pad
- Datasheet:
-
UJA1075ATW/5V0/1J.pdf
- Description:
- IC INTFACE SPECIALIZED 32HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
UJA1075ATW/5V0/1J from NXP Semiconductors is a high-speed CAN/LIN core System Basis Chip (SBC) designed for automotive Electronic Control Units. It integrates a ISO 11898-2/5-compliant CAN transceiver, LIN 2.2A/SAE J2602 transceiver, 5 V ±2 % main voltage regulator (V1) delivering up to 250 mA, dedicated 5 V CAN transceiver regulator (V2), and SPI interface - all in HTSSOP32 package. It enables controlled microcontroller startup and supports remote flash programming via CAN.
For engineers reviewing the UJA1075ATW/5V0/1J datasheet, UJA1075ATW/5V0/1J pinout, UJA1075ATW/5V0/1J application, or UJA1075ATW/5V0/1J equivalent, this SBC delivers verified automotive-grade power management, bus wake-up detection (CAN/LIN/local), limp-home safety output, and programmable watchdog with independent oscillator - critical for ECU reliability under cranking (VBAT ≥4.5 V) and transient immunity (±58 V bus pins).
Technical Context
The UJA1075ATW/5V0/1J implements a state-machine-based system controller managing Off/Standby/Normal/Sleep/Overtemp modes with deterministic transitions triggered by VBAT thresholds, wake events, or register writes. Its dual-regulator architecture isolates V1 (microcontroller supply) from V2 (CAN transceiver supply), enabling independent undervoltage monitoring (90 % V1 reset threshold, 90 % V2 warning) and cranking operation down to 4.5 V (V1) and 5.5 V (V2).
SPI communication uses full-duplex 16-bit framing with register-mapped control (WD_and_Status, Mode_Control, Int_Control), supporting read-only access and status reporting. The integrated watchdog operates in Window/Timeout/Off modes with configurable period (8–4096 ms), triggered by register writes or disabled via WDOFF pin - independent of V1/V2 via on-chip oscillator.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CAN Compliance | ISO 11898-2:2003 and ISO 11898-5:2006 - ensures interoperability with TJA1042 and robust high-speed bus operation. |
| LIN Compliance | LIN 2.2A and SAE J2602 - guarantees protocol compatibility across LIN 1.0–2.2A versions and automotive subsystem integration. |
| V1 Regulator Output | 5 V ±2 %, 250 mA max - powers MCU and peripherals; supports external PNP extension for thermal distribution during sustained load. |
| V2 Regulator Output | 5 V dedicated supply for internal CAN transceiver - electrically isolated from V1 to improve EMC and enable independent fault handling. |
| Wake-up Sources | CAN bus activity, LIN bus activity, WAKE1/WAKE2 inputs - enables low-power Standby/Sleep modes with full wake capability and source identification. |
| Bus Pin Protection | ±58 V short-circuit proof, ±8 kV HBM ESD, ISO 7637-3 transient immunity - meets automotive harsh environment requirements without external protection. |
| Package | HTSSOP32 (6.1 mm × 11 mm, 0.65 mm pitch, exposed pad) - provides low thermal resistance for reliable operation at junction temperatures up to 150 °C. |
Pinout & Package
Package: HTSSOP32 (SOT549-1), thermally enhanced plastic thin shrink small outline package with 32 leads, 6.1 mm body width, 0.65 mm lead pitch, and exposed die pad soldered to PCB ground for optimal thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| V1 (Pin 4) | Main microcontroller supply output | 5 V ±2 % regulated output; supports external PNP transistor via VEXCTRL/VEXCC for current scaling and thermal sharing. |
| V2 (Pin 20) | Dedicated CAN transceiver supply | 5 V output isolated from V1; can be disabled to reduce power or allow external regulation of CAN PHY. |
| RXDC/TXDC (Pins 14/13) | CAN data interface | Digital-level signals connecting to MCU's CAN controller; require no level-shifting when interfaced with standard CAN peripherals. |
| RXDL/TXDL (Pins 5/3) | LIN data interface | Direct connection to MCU's LIN controller; DLIN (Pin 26) integrates termination diode for simplified LIN bus design. |
| WAKE1/WAKE2 (Pins 18/19) | Local wake-up inputs | Analog inputs with programmable sampling (16/64 ms) and bias control (WBIAS, Pin 28); support switch-based wake detection in Standby mode. |
| LIMP (Pin 17) | Limp-home safety output | Active-low open-drain output that activates hardware fail-safe circuits (e.g., mechanical valve hold-open) during Overtemp or critical failure. |
| SPLIT (Pin 24) | CAN common-mode stabilization | Output driving external split termination resistor to suppress recessive-level ringing and improve signal integrity on long CAN buses. |
| INTN (Pin 7) | Interrupt notification | Active-low push-pull output signaling V1/V2 undervoltage, CAN/LIN/wake events, or power-on - configurable per interrupt source. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated dual-bus transceivers | Single-chip replacement for discrete CAN + LIN PHYs, reducing BOM count and PCB area while ensuring protocol compliance and bus fault tolerance. |
| Independent V1/V2 regulators | Enables simultaneous operation of MCU and CAN transceiver under varying battery conditions (e.g., cranking), with separate undervoltage flags for diagnostics. |
| Programmable watchdog with on-chip oscillator | Eliminates need for external timing components; supports Window mode for safety-critical timing validation and Timeout mode for flexible recovery intervals. |
| Full SPI register interface | 16-bit full-duplex SPI with read-only access allows real-time status monitoring (e.g., wake source, regulator health) without altering configuration during debug or runtime. |
| Limp-home output with overtemperature activation | Hardware-driven LIMP assertion during Overtemp mode ensures fail-operational behavior without MCU intervention - critical for ASIL-B/C systems. |
| Automotive-grade EMC & protection | ±58 V bus pin ruggedness, ±8 kV HBM ESD, and ISO 7637-3 transient immunity meet OEM requirements for under-hood deployment without added protection circuitry. |
Applications
| Body Control Module (BCM) | Engine Control Unit (ECU) |
|---|---|
|
Use Scenario: Centralized power and communication management for door locks, lighting, and window controls in modern vehicles. IC Role / Device Role / Timing Role: Core SBC providing regulated 5 V supply to MCU, CAN interface to vehicle backbone, and LIN interface to local sensors/actuators. Use Value: Enables ultra-low standby current (<100 µA) with bus wake-up, eliminating need for separate wake controllers and reducing quiescent power in always-on modules. |
Use Scenario: Power and communication hub in gasoline/diesel engine management systems requiring robust operation during cold cranking. IC Role / Device Role / Timing Role: Ensures controlled MCU startup, monitors V1/V2 under dynamic battery conditions (4.5–16 V), and supports remote firmware updates via CAN. Use Value: Maintains 5 V V1 output down to 4.5 V VBAT and provides overtemperature shutdown with LIMP activation - meeting ISO 16750-2 cranking and thermal stress requirements. |
| Advanced Driver Assistance Systems (ADAS) Sensor Hub | Electric Power Steering (EPS) Control Unit |
|
Use Scenario: Aggregation node for radar, camera, and ultrasonic sensors communicating over LIN subnets and CAN backbone. IC Role / Device Role / Timing Role: Supplies 5 V to sensor interface MCU, routes LIN commands to distributed sensors, and relays diagnostic data via CAN. Use Value: Integrated LIN transceiver with low-slope mode (10.4 kbit/s) minimizes EMI near sensitive RF receivers, improving sensor signal integrity. |
Use Scenario: Safety-critical steering assist module requiring fail-operational behavior during thermal overload or power faults. IC Role / Device Role / Timing Role: Delivers stable 5 V to torque-control MCU, monitors CAN bus health, and asserts LIMP output to hold motor in safe position during Overtemp. Use Value: Hardware LIMP activation independent of MCU software state satisfies ASIL-B functional safety requirements for EPS fail-safe operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar core SBC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TJA1043TK/0Z | Single high-speed CAN transceiver only; no LIN, no regulators, no watchdog - requires external power management and LIN PHY. | Used where CAN-only connectivity suffices and system-level power architecture is already defined (e.g., multi-rail PMIC designs). | Select when CAN interface isolation is prioritized over integration; not suitable as drop-in replacement due to missing LIN/V1/V2/SPI functions. |
| UJA1169ATW/5V0/1J | Successor SBC with enhanced CAN FD support, higher V1 current (350 mA), improved watchdog flexibility, and extended temperature range (−40 °C to 150 °C). | Targeted at next-gen ADAS/EPS platforms requiring CAN FD bandwidth and extended thermal margin beyond UJA1075A's 125 °C max junction. | Choose for new designs needing CAN FD or higher current; UJA1075ATW/5V0/1J remains valid for legacy CAN 2.0B systems with cost-sensitive BOMs. |
Compared with TJA1043TK/0Z, UJA1075ATW/5V0/1J consolidates power, CAN, LIN, and safety logic into one IC - reducing component count and board space. Against UJA1169ATW/5V0/1J, it offers proven qualification for established CAN 2.0B ECUs at lower unit cost and smaller footprint, though without CAN FD or extended thermal rating.
Availability
UJA1075ATW/5V0/1J is available at Aetrix Electronics and suitable for automotive body control modules, engine control units, ADAS sensor hubs, and electric power steering systems requiring stable component supply across production lifecycles.
Supply support for UJA1075ATW/5V0/1J includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in automotive-grade analog and mixed-signal ICs.
The UJA1075ATW/5V0/1J belongs to NXP's System Basis Chip product line, engineered specifically to replace discrete power, interface, and safety components in automotive ECUs - enabling compact, reliable, and standards-compliant electronic control units.
FAQ
What is the primary function of the UJA1075ATW/5V0/1J in an automotive ECU?
The UJA1075ATW/5V0/1J serves as a core System Basis Chip integrating high-speed CAN and LIN transceivers, dual voltage regulators (5 V V1 for MCU, 5 V V2 for CAN PHY), SPI interface, programmable watchdog, and safety features like limp-home output. It replaces multiple discrete components to manage power sequencing, bus communication, wake-up, and fault response in automotive ECUs - directly enabling controlled microcontroller startup and robust operation under cranking and transient conditions.
Does the UJA1075ATW/5V0/1J support CAN FD or only classical CAN?
The UJA1075ATW/5V0/1J supports only classical high-speed CAN (CAN 2.0B) compliant with ISO 11898-2:2003 and ISO 11898-5:2006. It does not support CAN FD. Its CAN transceiver is interoperable with TJA1042 but lacks the bit-rate switching and extended data length capabilities of CAN FD transceivers. For CAN FD requirements, NXP recommends the UJA1169ATW/5V0/1J as a functional successor.
How does the UJA1075ATW/5V0/1J handle battery cranking conditions?
The UJA1075ATW/5V0/1J maintains stable 5 V V1 output down to 4.5 V VBAT and V2 output down to 5.5 V VBAT, complying with ISO 7637 and ISO 16750-2 cranking profiles. Its regulators feature undervoltage warnings at 90 % nominal output and reset at 90 % or 70 % V1, allowing MCU firmware to initiate graceful shutdown before brownout. This ensures continuous operation during engine start-up when battery voltage dips sharply.
Can the UJA1075ATW/5V0/1J be used without an external PNP transistor?
Yes, the UJA1075ATW/5V0/1J operates fully functional without an external PNP transistor: its integrated V1 regulator delivers up to 250 mA at 5 V ±2 %. The external PNP option (controlled via VEXCTRL/VEXCC pins) is optional and intended only to extend current capability and distribute thermal load during sustained high-current operation - not required for baseline functionality or datasheet-specified ratings.
What safety features does the UJA1075ATW/5V0/1J provide for automotive applications?
The UJA1075ATW/5V0/1J includes overtemperature shutdown with automatic LIMP output assertion, programmable watchdog with Window/Timeout modes and independent oscillator, bidirectional RSTN with configurable power-on reset length, and interrupt-driven fault reporting (V1/V2 undervoltage, wake sources). These features collectively support ASIL-B compliance in systems like EPS and BCM by enabling fail-safe responses independent of MCU software execution.
UJA1075ATW/5V0/1J Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 32-TSSOP (0.240", 6.10mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Applications:
- -
- Interface:
- CAN, LIN
- Voltage - Supply:
- 4.5V ~ 28V
- Supplier Device Package:
- 32-HTSSOP
- Grade:
- Automotive
- Qualification:
- -
- Mounting Type:
- Surface Mount
UJA1075ATW/5V0/1J FAQ
1.How can I place an order for UJA1075ATW/5V0/1J through Aetrix?
Please submit a Request for Quotation (RFQ) for UJA1075ATW/5V0/1J on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UJA1075ATW/5V0/1J reliable?
The price and inventory of UJA1075ATW/5V0/1J are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UJA1075ATW/5V0/1J is usually 5 days.
3.What payment methods are accepted for UJA1075ATW/5V0/1J?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UJA1075ATW/5V0/1J transactions.
Note: Certain payment methods may incur a processing fee.
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UJA1075ATW/5V0/1J orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UJA1075ATW/5V0/1J order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UJA1075ATW/5V0/1J?
For technical support, including UJA1075ATW/5V0/1J datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UJA1075ATW/5V0/1J requirements.
6.How does Aetrix verify that UJA1075ATW/5V0/1J is sourced from the original manufacturer or authorized distributors?
All UJA1075ATW/5V0/1J products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UJA1075ATW/5V0/1J meets industry standards.
7.What is the process for return or replacement of UJA1075ATW/5V0/1J?
All UJA1075ATW/5V0/1J units undergo pre-shipment inspection (PSI). If there is an issue with UJA1075ATW/5V0/1J, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UJA1075ATW/5V0/1J part is unused and in its original packaging.
Return procedure for UJA1075ATW/5V0/1J:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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