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NXP Semiconductors UJA1075TW/5V0,112
- Part No.:
- UJA1075TW/5V0,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 32-TSSOP (0.240", 6.10mm Width) Exposed Pad
- Datasheet:
-
UJA1075TW/5V0,112.pdf
- Description:
- IC INTFACE SPECIALIZED 32HTSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:2,152
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Product details
Overview
UJA1075TW/5V0,112 from NXP Semiconductors is a core System Basis Chip (SBC) integrating high-speed CAN and LIN transceivers, dual voltage regulators (V1 = 5 V / 250 mA, V2 = 5 V), SPI interface, advanced watchdog, two local wake-up inputs, and limp home output - designed for automotive ECU power and communication management in engine control, body electronics, and chassis modules.
For engineers reviewing the UJA1075TW/5V0,112 datasheet, UJA1075TW/5V0,112 pinout, UJA1075TW/5V0,112 application, or UJA1075TW/5V0,112 equivalent, this page delivers verified functional architecture, automotive-grade EMC/ESD specs (±8 kV HBM, ±58 V short-circuit proof), ISO 11898-2/5 and LIN 2.1 compliance, thermal shutdown behavior, and HTSSOP32 package-level design constraints.
Technical Context
The UJA1075TW/5V0,112 implements a state-machine-based system controller managing Off/Standby/Normal/Sleep/Overtemp modes with configurable MC bits, supports full-duplex SPI (16-bit, SCSN/SCK/SDI/SDO) for register access and diagnostics, and features independent V1/V2 regulators - V1 supplies microcontroller at 5 V ±3 % with undervoltage warning at 90 % and reset at 90 % or 70 %, while V2 powers the CAN transceiver separately.
Its CAN transceiver includes SPLIT pin for recessive bus stabilization and floating bus pins when powered off; LIN transceiver integrates DLIN termination diode and low-slope mode (10.4 kbit/s) for optimized EMC; watchdog uses on-chip oscillator and supports Window/Timeout/Off modes with programmable period (8–4096 ms) via NWP bits in WD_and_Status register.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CAN Standard | ISO 11898-2 and ISO 11898-5 compliant high-speed CAN transceiver with SPLIT pin and floating bus capability during power-off |
| LIN Standard | LIN 2.1, SAE J2602, and backward-compatible with LIN 2.0/LIN 1.3; integrated DLIN termination diode and selectable low-slope mode |
| V1 Regulator | 5 V ±3 % output, 250 mA max, with external PNP support; undervoltage warning at 90 %, reset at 90 % or 70 % of nominal |
| V2 Regulator | 5 V dedicated regulator for internal CAN transceiver; undervoltage warning at 90 %; switchable OFF to enable V1 or external supply |
| Watchdog | Programmable Window/Timeout/Off modes; clocked by on-chip oscillator; default period 128 ms; trigger resets timer on any WD_and_Status register write |
| Wake-up Sources | CAN bus activity, LIN bus activity, WAKE1/WAKE2 inputs with configurable sampling (16 ms or 64 ms), and cyclic wake-up interrupt |
| Package | HTSSOP32 (SOT549-1), 6.1 mm × 11 mm, 0.65 mm pitch, exposed die pad for PCB thermal dissipation |
Pinout & Package
HTSSOP32 package (SOT549-1) with 32 leads, 6.1 mm body width, 0.65 mm lead pitch, and exposed die pad thermally connected to PCB ground or left floating per design requirements.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BAT (32) | Battery input | Primary supply input (4.5 V–27 V); supports ISO 7637-3 transient protection and cranking down to 4.5 V |
| V1 (4) | Main regulator output | 5 V ±3 % supply for microcontroller and peripherals; supports external PNP extension via VEXCTRL/VEXCC |
| V2 (20) | CAN transceiver regulator | Dedicated 5 V output for internal CAN PHY; can be disabled to reduce quiescent current |
| RSTN (6) | Bidirectional reset I/O | Active-low reset signal with programmable pulse length; supports variable POR timing for diverse MCU families |
| INTN (7) | Interrupt output | Open-drain interrupt signaling V1/V2 undervoltage, CAN/LIN/wake-up events, and power-on status |
| WAKE1 (18), WAKE2 (19) | Local wake-up inputs | Configurable edge-sensitive inputs with WBIAS bias control and 16/64 ms sampling windows |
| LIMP (17) | Limp home output | Active-low output driven LOW during overtemperature or critical fault to activate fail-safe hardware |
| SPI (9–12) | Serial Peripheral Interface | Full-duplex interface (SDI/SDO/SCK/SCSN) for configuration, status readback, and diagnostic register access |
Key Features
| Feature | Design Value |
|---|---|
| Integrated CAN + LIN transceivers | Eliminates discrete transceiver components and reduces BOM count while maintaining ISO 11898-2/5 and LIN 2.1 compliance |
| Scalable V1 regulator with PNP extension | Delivers 250 mA at 5 V with optional external PNP transistor to distribute heat across PCB and avoid localized thermal stress |
| Independent V2 regulator | Isolates CAN transceiver power from microcontroller supply, improving EMC immunity and enabling selective CAN shutdown |
| Advanced low-power modes | Standby (V1 active, CAN/LIN in Lowpower/Off), Sleep (V1/V2 off, wake detection active), and Off (zero current draw below Vth(det)poff) |
| Comprehensive fault reporting | Real-time status flags for V1/V2 undervoltage, wake source detection, temperature, and interrupt sources via SPI-accessible registers |
| Automotive-grade robustness | ±8 kV HBM ESD, ±6 kV IEC 61000-4-2, ±58 V short-circuit proof bus pins, and ISO 7637-3 transient protection on BAT/CAN/LIN |
Applications
| Engine Control Unit (ECU) | Body Control Module (BCM) |
|---|---|
Use Scenario: Centralized power and communication management for diesel/gasoline engine ECUs requiring CAN-based sensor/actuator networking and LIN-controlled auxiliary subsystems. IC Role / Device Role / Timing Role: Core SBC providing regulated 5 V supply to MCU, high-speed CAN interface to engine controller network, and LIN interface to throttle valve, coolant pump, and intake manifold actuators. Use Value: Enables single-chip integration of power, CAN, and LIN functions - reducing board space, improving startup reliability, and supporting ISO 26262 ASIL-B ready system architecture. |
Use Scenario: Power and bus management in vehicle body electronics including door modules, lighting controllers, and HVAC interfaces. IC Role / Device Role / Timing Role: Supplies 5 V to body MCU, handles CAN messaging for central gateway coordination, and manages LIN sub-networks for window lifters, seat position sensors, and mirror controls. Use Value: Delivers low-quiescent-current Standby/Sleep modes (< 100 µA) essential for battery-sensitive applications, with wake-up via LIN/CAN/local switches and limp-home activation during thermal faults. |
| Chassis Control System | Advanced Driver Assistance Systems (ADAS) Sensor Hub |
Use Scenario: Safety-critical chassis domain controller managing ABS, ESC, and electronic stability systems with redundant communication paths. IC Role / Device Role / Timing Role: Provides fault-tolerant 5 V supply, CAN interface for real-time actuator commands, and watchdog supervision with windowed timeout to detect MCU lockup. Use Value: Overtemperature shutdown and LIMP output ensure fail-operational behavior; V1/V2 separation prevents CAN bus disruption during MCU brownout events. |
Use Scenario: Consolidated sensor interface hub aggregating radar, camera, and ultrasonic data via CAN and distributing control signals over LIN to peripheral actuators. IC Role / Device Role / Timing Role: Acts as power manager and bus bridge - supplying 5 V to imaging processor, routing CAN messages between ADAS ECU and gateway, and controlling LIN-based lens focus or heater elements. Use Value: SPI-configurable wake-up thresholds and interrupt masking allow precise power-state coordination across heterogeneous sensor subsystems without MCU intervention. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar core SBC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TJA1042TK/3 | Standalone high-speed CAN transceiver only; no LIN, regulators, SPI, or watchdog; ISO 11898-2/5 compliant; 5 V supply required externally | Requires external LIN transceiver, voltage regulators, and system supervisor ICs - increases BOM count and layout complexity | Select when only CAN physical layer is needed and full SBC integration is unnecessary |
| UJA1076TW/5V0,112 | Pin-compatible upgrade with enhanced watchdog (cyclic wake-up in Timeout mode), extended V1 current capability (300 mA), and improved LIN ESD rating (±12 kV HBM) | Supports higher-current MCUs and more demanding EMC environments; retains identical HTSSOP32 footprint and SPI register map | Choose for new designs requiring higher reliability margins and future-proofing against evolving OEM EMC requirements |
Compared with TJA1042TK/3, UJA1075TW/5V0,112 consolidates seven discrete functions into one package, reducing PCB area and qualification effort; versus UJA1076TW/5V0,112, it offers proven field reliability at lower cost but lacks extended current and ESD headroom for next-gen platforms.
Availability
UJA1075TW/5V0,112 is available at Aetrix Electronics and suitable for automotive engine control units, body control modules, and chassis control systems requiring stable component supply, long-term lifecycle support, and AEC-Q100 qualified sourcing.
Supply support for UJA1075TW/5V0,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in automotive-grade analog and mixed-signal ICs.
The UJA1075TW/5V0,112 belongs to NXP's System Basis Chip product line, engineered specifically for automotive ECU consolidation - integrating power regulation, CAN/LIN communication, safety monitoring, and low-power management into a single AEC-Q100 qualified device.
FAQ
What is the primary function of the UJA1075TW/5V0,112 in an automotive ECU?
The UJA1075TW/5V0,112 serves as a core System Basis Chip that replaces discrete power, communication, and supervision components in automotive ECUs. It integrates a high-speed CAN transceiver, LIN transceiver, 5 V/250 mA main regulator (V1), dedicated 5 V CAN regulator (V2), SPI interface, advanced watchdog, wake-up inputs, and limp home output - all in a single HTSSOP32 package. Its role is to manage controlled system startup, provide fault-resilient power, and enable robust multi-bus communication for microcontrollers in engine, body, and chassis domains.
Does the UJA1075TW/5V0,112 include a built-in watchdog, and how is it configured?
Yes, the UJA1075TW/5V0,112 includes a programmable watchdog with Window, Timeout, and Off modes, clocked by an on-chip oscillator independent of V1/V2. Configuration is performed via the WD_and_Status register using the WMC bit (watchdog mode control) and NWP bits (nominal watchdog period, ranging from 8 ms to 4096 ms). The default period is 128 ms. Watchdog triggering occurs on any write to the WD_and_Status register, and it supports automatic re-enable after interrupts. Pin WDOFF provides hardware disable capability.
How does the UJA1075TW/5V0,112 handle power supply during engine cranking conditions?
The UJA1075TW/5V0,112 supports engine cranking with V1 regulator operation down to 4.5 V and V2 regulator operation down to 5.5 V, complying with ISO 7637-2 Pulse 4/4b and ISO 16750-2 specifications. Its V1 undervoltage warning activates at 90 % of nominal (4.5 V), and reset can be set to trigger at either 90 % (4.5 V) or 70 % (3.5 V) of nominal output. This ensures reliable microcontroller operation and controlled reset behavior even under severe battery dip conditions typical during cold-start cranking.
Can the UJA1075TW/5V0,112 supply external transceivers, and how is current extended beyond 250 mA?
Yes, the UJA1075TW/5V0,112's V1 regulator is explicitly designed to supply not only the microcontroller but also peripheral circuitry and external transceivers. Current beyond 250 mA is supported by connecting an external PNP transistor controlled via VEXCTRL (base drive) and monitored via VEXCC (collector current sense). The threshold for PNP activation is configurable (50 mA or 85 mA rising, 15 mA or 50 mA falling) using the PDC bit in the Mode_Control register, enabling scalable thermal distribution across the PCB.
What automotive standards does the UJA1075TW/5V0,112 comply with for EMC and reliability?
The UJA1075TW/5V0,112 complies with multiple automotive standards: ISO 11898-2 and ISO 11898-5 for high-speed CAN, LIN 2.1 and SAE J2602 for LIN, ±8 kV HBM and ±6 kV IEC 61000-4-2 ESD protection on CAN/LIN/wake pins, ±58 V short-circuit proof bus pins, and ISO 7637-3 transient protection on BAT/CAN/LIN lines. It is AEC-Q100 qualified and designed for operation across –40 °C to +150 °C junction temperature, with overtemperature shutdown and thermal hysteresis for safe recovery.
UJA1075TW/5V0,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 32-TSSOP (0.240", 6.10mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Obsolete
- Applications:
- -
- Interface:
- CAN, LIN
- Voltage - Supply:
- 4.5V ~ 28V
- Supplier Device Package:
- 32-HTSSOP
- Grade:
- Automotive
- Qualification:
- -
- Mounting Type:
- Surface Mount
UJA1075TW/5V0,112 FAQ
1.How can I place an order for UJA1075TW/5V0,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for UJA1075TW/5V0,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UJA1075TW/5V0,112 reliable?
The price and inventory of UJA1075TW/5V0,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UJA1075TW/5V0,112 is usually 5 days.
3.What payment methods are accepted for UJA1075TW/5V0,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UJA1075TW/5V0,112 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UJA1075TW/5V0,112?
UJA1075TW/5V0,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UJA1075TW/5V0,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UJA1075TW/5V0,112?
For technical support, including UJA1075TW/5V0,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UJA1075TW/5V0,112 requirements.
6.How does Aetrix verify that UJA1075TW/5V0,112 is sourced from the original manufacturer or authorized distributors?
All UJA1075TW/5V0,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UJA1075TW/5V0,112 meets industry standards.
7.What is the process for return or replacement of UJA1075TW/5V0,112?
All UJA1075TW/5V0,112 units undergo pre-shipment inspection (PSI). If there is an issue with UJA1075TW/5V0,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UJA1075TW/5V0,112 part is unused and in its original packaging.
Return procedure for UJA1075TW/5V0,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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