NXP Semiconductors UJA1076ATW/3V3,112
- Part No.:
- UJA1076ATW/3V3,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 32-TSSOP (0.240", 6.10mm Width) Exposed Pad
- Datasheet:
-
UJA1076ATW/3V3,112.pdf
- Description:
- IC INTFACE SPECIALIZED 32HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,433
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
UJA1076ATW/3V3,112 from NXP Semiconductors is a high-speed CAN core System Basis Chip (SBC) integrating a 3.3 V/250 mA microcontroller voltage regulator (V1), a dedicated 5 V CAN transceiver supply (V2), ISO 11898-2/5-compliant high-speed CAN transceiver, SPI interface, dual local wake-up inputs, and limp home output - designed for automotive ECU power management and network interface consolidation.
For engineers reviewing the UJA1076ATW/3V3,112 datasheet, UJA1076ATW/3V3,112 pinout, UJA1076ATW/3V3,112 application, or UJA1076ATW/3V3,112 equivalent, this page delivers verified functional architecture, regulator accuracy (±2 %), thermal shutdown behavior, watchdog timing modes (128 ms default), and HTSSOP32 package-level design constraints critical for automotive ECU start-up sequencing and fail-safe operation.
Technical Context
The UJA1076ATW/3V3,112 implements a state-machine-based system controller managing Off/Standby/Normal/Sleep/Overtemp mode transitions triggered by VBAT thresholds, wake events, or register-controlled MC bits. Its dual-regulator architecture isolates V1 (3.3 V, ±2 %, 250 mA) for MCU/peripherals from V2 (5 V) for the CAN transceiver - enabling independent undervoltage detection (90 % Vuvd) and cranking resilience down to 4.5 V (V1) and 5.5 V (V2).
SPI communication uses full-duplex 16-bit framing with register-mapped control (WD_and_Status, Mode_Control, Int_Control), while the CAN transceiver supports bus-floating in Off mode, SPLIT pin for recessive level stabilization, and ±58 V short-circuit protection on CANH/CANL - all compliant with ISO 7637-3 transient immunity and IEC 61000-4-2 ±6 kV ESD.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| V1 Output Voltage | 3.3 V ±2 % - powers microcontroller and peripherals with precision regulation under load and cranking (VBAT ≥ 4.5 V) |
| V1 Max Current | 250 mA - scalable via external PNP transistor with programmable activation threshold (50/85 mA) |
| V2 Output Voltage | 5 V - dedicated low-dropout supply for integrated CAN transceiver; switchable off to reduce quiescent current |
| CAN Compliance | ISO 11898-2:2003 & ISO 11898-5:2006 - interoperable with TJA1042; supports high-speed (up to 1 Mbps) bus communication |
| Watchdog Default Period | 128 ms - configurable via NWP bits (8–4096 ms); operates in Window/Timeout/Off modes with independent on-chip oscillator |
| Package | HTSSOP32 (SOT549-1) - 6.1 mm × 11 mm, 0.65 mm pitch, exposed die pad for thermal dissipation |
| Wake-up Inputs | WAKE1 & WAKE2 - analog inputs with selectable 16 ms/64 ms sampling; support biasing via WBIAS pin |
| Limp Home Output | LIMP - active-low open-drain output signaling critical system fault to external safety hardware |
Pinout & Package
HTSSOP32 package (SOT549-1) with 32 leads, 6.1 mm body width, 0.65 mm lead pitch, and thermally enhanced exposed die pad soldered to PCB ground per datasheet recommendation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BAT (Pin 32) | Battery supply input | Primary power source for SBC; enables operation down to 4.5 V (V1) and 5.5 V (V2) during cranking |
| V1 (Pin 4) | Main regulator output | 3.3 V ±2 % supply for MCU and peripherals; supports external PNP extension via VEXCTRL/VEXCC |
| V2 (Pin 20) | CAN transceiver regulator output | 5 V dedicated supply; independently switchable and monitored for undervoltage warning |
| RSTN (Pin 6) | Bidirectional reset I/O | Drives LOW during power-on, watchdog overflow, or overtemperature; supports variable POR length for MCU compatibility |
| INTN (Pin 7) | Interrupt output | Active-low signal indicating V1/V2 undervoltage, CAN/local wake-up, cyclic, or power-on events |
| EN (Pin 8) | Enable output | Drives HIGH in Normal mode when ENC = 1; controls external safety-critical hardware enable logic |
| SDI/SDO/SCK/SCSN (Pins 9–12) | SPI interface | Full-duplex 16-bit serial link for configuration, status readback, and diagnostic register access |
| TXDC/RXDC (Pins 13–14) | CAN controller interface | Digital connection to MCU's CAN controller; isolated from bus-side CANH/CANL pins |
| CANH/CANL (Pins 21–22) | CAN bus physical layer | High-speed differential bus interface with ±58 V short-circuit protection and ISO 7637-3 transient immunity |
| SPLIT (Pin 24) | CAN common-mode stabilizer | Output driving external 60 Ω resistor to stabilize recessive bus level and reduce ringing |
| WAKE1/WAKE2 (Pins 18–19) | Local wake-up inputs | Analog wake sources with programmable sampling window (16/64 ms) and WBIAS bias control |
| LIMP (Pin 17) | Limp home output | Active-low open-drain output asserting during Overtemp mode or software-triggered limp home sequence |
| WDOFF (Pin 16) | Watchdog disable input | Hardware override: HIGH disables watchdog regardless of WMC setting; triggers immediate reset if toggled in Normal/Standby |
Key Features
| Feature | Design Value |
|---|---|
| Integrated CAN ECU functions | Combines transceiver, dual regulators, watchdog, SPI, wake-up logic, and limp home in single HTSSOP32 package - eliminates discrete BOM components and reduces PCB area |
| Automotive-grade EMC & ESD | ±6 kV IEC 61000-4-2 ESD on CAN/wake pins; ±8 kV HBM; ISO 7637-3 transient protection; optimized bus topology for reduced ringing |
| Intelligent power sequencing | Controlled Off→Standby→Normal mode transitions with VBAT threshold detection, safe reset generation, and overtemperature shutdown with LIMP assertion |
| Scalable 3.3 V regulator | V1 delivers 250 mA at ±2 % accuracy; external PNP extension distributes heat across PCB and avoids thermal hotspots in high-current ECUs |
| Fail-safe diagnostics | Register-accessible status flags (V1S/V2S/WLS1/WLS2), interrupt masking per source, and bidirectional RSTN enable robust fault detection and recovery |
| Remote flash programming support | Enables firmware updates over CAN bus without physical tooling - critical for OTA updates in connected vehicle architectures |
Applications
| Body Control Module (BCM) | Engine Control Unit (ECU) |
|---|---|
|
Use Scenario: Centralized power and communication management for door locks, lighting, and climate actuators in 12 V automotive platforms. IC Role / Device Role / Timing Role: Core SBC providing regulated 3.3 V MCU supply, isolated 5 V CAN transceiver power, and wake-up detection from LIN or sensor inputs. Use Value: Eliminates discrete LDOs, transceivers, and watchdog ICs - reducing BOM count by ≥7 components while maintaining ISO 11898-2 compliance and cranking resilience. |
Use Scenario: Power management and CAN interface for engine timing, fuel injection, and emissions control systems requiring fail-safe operation. IC Role / Device Role / Timing Role: Ensures controlled MCU start-up, monitors V1/V2 undervoltage during cranking, and asserts LIMP output upon overtemperature or critical fault. Use Value: Guarantees deterministic reset behavior and limp-home activation under fault conditions - meeting ASIL-B functional safety requirements without external supervision. |
| Advanced Driver Assistance Systems (ADAS) Sensor Hub | Electric Power Steering (EPS) ECU |
|
Use Scenario: Consolidated power and CAN interface for radar, camera, and ultrasonic sensor fusion modules in Zonal Architecture. IC Role / Device Role / Timing Role: Supplies 3.3 V to sensor processing MCU, powers CAN transceiver for vehicle network integration, and enables low-power Standby mode with bus wake-up. Use Value: Achieves <100 µA standby current with full wake-up capability - extending battery life in always-on ADAS domains while supporting remote firmware updates. |
Use Scenario: Safety-critical steering assist control unit requiring redundant power monitoring and fail-operational behavior. IC Role / Device Role / Timing Role: Delivers stable 3.3 V MCU supply with ±2 % accuracy, independent V2 for CAN, and hardware-enforced limp home via LIMP pin during thermal runaway. Use Value: Meets ISO 26262 ASIL-C requirements through dual undervoltage monitors, overtemperature shutdown, and hardware-controlled safety outputs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar CAN SBC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TJA1043TK/3 | 3.3 V V1 regulator (250 mA), identical HTSSOP32 package, but lacks external PNP extension and has no LIMP output | Targeted at cost-sensitive ECUs where limp home functionality is handled externally; no VEXCTRL/VEXCC pins | Select when simplified power architecture suffices and external safety logic already exists |
| UJA1075ATW/3V3,112 | Same 3.3 V V1 regulator and HTSSOP32 package, but omits watchdog (no W suffix) and has no WDOFF pin or WD_and_Status register | Used in non-safety-critical modules where software-managed reset suffices; no hardware watchdog windowing or cyclic wake-up | Select when watchdog independence is unnecessary and BOM cost reduction is prioritized over ASIL-B readiness |
Compared with TJA1043TK/3 and UJA1075ATW/3V3,112, the UJA1076ATW/3V3,112 uniquely integrates limp home output, external PNP regulator extension, and programmable watchdog with window mode - making it the only option among the three qualified for ASIL-B-compliant power management in safety-critical ECUs.
Availability
UJA1076ATW/3V3,112 is available at Aetrix Electronics and suitable for automotive Body Control Modules, Engine Control Units, ADAS sensor hubs, and Electric Power Steering ECUs requiring stable component supply across extended temperature ranges (−40 °C to +150 °C) and long lifecycle commitments.
Supply support for UJA1076ATW/3V3,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications - with deep expertise in CAN, SBC, and functional safety architectures.
The UJA1076ATW/3V3,112 belongs to NXP's System Basis Chip product line, engineered specifically to consolidate power management, communication interface, and safety monitoring functions into a single automotive-qualified IC for ECU miniaturization and ASIL-B compliance.
FAQ
What is the nominal output voltage and accuracy of the main regulator (V1) in UJA1076ATW/3V3,112?
The UJA1076ATW/3V3,112 features a 3.3 V main voltage regulator (V1) with ±2 % output accuracy across temperature and load conditions. This precision ensures reliable operation of connected microcontrollers and peripherals, especially during battery cranking events where VBAT drops to 4.5 V - a key requirement for automotive ECU certification per ISO 16750-2.
Does UJA1076ATW/3V3,112 support external extension of its V1 regulator current capability?
Yes, the UJA1076ATW/3V3,112 supports external current extension of its 3.3 V V1 regulator using an external PNP transistor connected via VEXCTRL (base control) and VEXCC (collector current sense) pins. The activation threshold is programmable (50 mA or 85 mA), enabling thermal load distribution across the PCB - a critical feature for high-current ECUs where on-die dissipation must be minimized.
How does the watchdog function in UJA1076ATW/3V3,112 differ from basic timeout-only implementations?
The UJA1076ATW/3V3,112 watchdog supports Window, Timeout, and Off modes - with Window mode requiring trigger events within a defined time window (first half of period) to prevent reset. This prevents both early and late software hangs, unlike simple timeout watchdogs. Its default 128 ms period is configurable (8–4096 ms), and it uses an independent on-chip oscillator, ensuring reliability even if V1/V2 are unstable.
What safety-critical outputs does UJA1076ATW/3V3,112 provide for automotive fail-operational design?
The UJA1076ATW/3V3,112 provides two hardware-enforced safety outputs: EN (enable) for controlling external safety-critical circuitry and LIMP (limp home) - an active-low open-drain output asserted during overtemperature events or software-triggered faults. Both are directly tied to internal fault monitors and require no MCU intervention, fulfilling ASIL-B requirements for autonomous fault response.
Is UJA1076ATW/3V3,112 compatible with ISO 11898-5 for fault-tolerant CAN networks?
Yes, the UJA1076ATW/3V3,112 high-speed CAN transceiver is explicitly compliant with both ISO 11898-2:2003 and ISO 11898-5:2006 standards. ISO 11898-5 defines fault-tolerant physical layer requirements for automotive CAN, including bus-off recovery, dominant timeout, and improved electromagnetic compatibility - all supported by the UJA1076ATW/3V3,112 transceiver architecture.
UJA1076ATW/3V3,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 32-TSSOP (0.240", 6.10mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Applications:
- -
- Interface:
- SPI Serial
- Voltage - Supply:
- 4.5V ~ 28V
- Supplier Device Package:
- 32-HTSSOP
- Grade:
- Automotive
- Qualification:
- -
- Mounting Type:
- Surface Mount
UJA1076ATW/3V3,112 FAQ
1.How can I place an order for UJA1076ATW/3V3,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for UJA1076ATW/3V3,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UJA1076ATW/3V3,112 reliable?
The price and inventory of UJA1076ATW/3V3,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UJA1076ATW/3V3,112 is usually 5 days.
3.What payment methods are accepted for UJA1076ATW/3V3,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UJA1076ATW/3V3,112 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UJA1076ATW/3V3,112?
UJA1076ATW/3V3,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UJA1076ATW/3V3,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UJA1076ATW/3V3,112?
For technical support, including UJA1076ATW/3V3,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UJA1076ATW/3V3,112 requirements.
6.How does Aetrix verify that UJA1076ATW/3V3,112 is sourced from the original manufacturer or authorized distributors?
All UJA1076ATW/3V3,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UJA1076ATW/3V3,112 meets industry standards.
7.What is the process for return or replacement of UJA1076ATW/3V3,112?
All UJA1076ATW/3V3,112 units undergo pre-shipment inspection (PSI). If there is an issue with UJA1076ATW/3V3,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UJA1076ATW/3V3,112 part is unused and in its original packaging.
Return procedure for UJA1076ATW/3V3,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
UJA1076ATW/3V3,112 Tags

-
NVT4857UKAZ
NXP Semiconductors
-
TCA8418RTWR
Texas Instruments
-
PCA9546APWR
Texas Instruments

-
MD0100N8-G
Microchip Technology

-
PCA9548APW,118
NXP Semiconductors

-
PCA9540BDP,118
NXP Semiconductors

-
PCA9548APWR
Texas Instruments

-
PCA9546APW,118
NXP Semiconductors

-
PTN3360DBS,518
NXP Semiconductors

-
PCA9546ABS,118
NXP Semiconductors

-
PCA9518PWR
Texas Instruments

-
PCA9545APW,118
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

