NXP Semiconductors UJA1076ATW/5V0/1J
- Part No.:
- UJA1076ATW/5V0/1J
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 32-TSSOP (0.240", 6.10mm Width) Exposed Pad
- Datasheet:
-
UJA1076ATW/5V0/1J.pdf
- Description:
- IC INTFACE SPECIALIZED 32HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,793
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
UJA1076ATW/5V0/1J from NXP Semiconductors is a high-speed CAN core System Basis Chip (SBC) integrating a ISO 11898-2/5-compliant CAN transceiver, 5 V/250 mA main voltage regulator (V1), dedicated 5 V CAN transceiver regulator (V2), SPI interface, dual local wake-up inputs, and limp home output - designed for automotive ECU power and communication management in engine control, body electronics, and ADAS modules.
For engineers reviewing the UJA1076ATW/5V0/1J datasheet, UJA1076ATW/5V0/1J pinout, UJA1076ATW/5V0/1J application, or UJA1076ATW/5V0/1J equivalent, this page delivers verified functional architecture, regulator accuracy (±2 %), watchdog timing modes (Window/Timeout/Off), thermal shutdown behavior, and HTSSOP32 package-level design constraints critical for automotive-grade system startup, diagnostics, and fail-safe operation.
Technical Context
The UJA1076ATW/5V0/1J implements a state-machine-based system controller managing Off/Standby/Normal/Sleep/Overtemp mode transitions triggered by VBAT thresholds, wake events, or register-controlled MC bits. Its CAN transceiver features SPLIT output for recessive bus stabilization and ±58 V short-circuit protection on CANH/CANL.
Power management includes dual regulators: V1 (5 V, ±2 %, 250 mA, extendable with external PNP) and V2 (5 V, CAN-only supply, switchable), both supporting cranking conditions (V1 down to 4.5 V, V2 down to 5.5 V per ISO 7637). The watchdog uses an independent on-chip oscillator and supports programmable periods (8–4096 ms) via NWP bits.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CAN Standard | ISO 11898-2:2003 and ISO 11898-5:2006 compliant high-speed CAN physical layer |
| Main Regulator (V1) | 5 V output, ±2 % accuracy, 250 mA max, extendable with external PNP transistor for thermal distribution |
| CAN Regulator (V2) | 5 V dedicated output for internal transceiver; switchable off; operates down to 5.5 V VBAT during cranking |
| Watchdog Modes | Window, Timeout, and Off modes; programmable period (8–4096 ms); independent on-chip oscillator clock source |
| SPI Interface | Full-duplex 16-bit SPI with read-only register access; SCSN active-low, SCK idle-low timing |
| Thermal Protection | Overtemperature shutdown with hysteresis; LIMP output driven LOW upon activation; recovery requires T < Tth(rel)otp |
| ESD Protection | ±8 kV HBM and ±6 kV IEC 61000-4-2 on CANH/CANL and WAKE1/WAKE2 pins |
Pinout & Package
UJA1076ATW/5V0/1J is housed in a 32-pin HTSSOP32 package (6.1 mm × 11 mm, 0.65 mm pitch, exposed die pad) optimized for automotive thermal and EMC performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| V1 | Main microcontroller supply output | 5 V regulated output (±2 %), powers MCU and peripherals; supports external PNP extension via VEXCTRL/VEXCC |
| RSTN | Bidirectional reset I/O | Drives LOW during power-on, watchdog overflow, or overtemperature; accepts variable-length reset pulse from MCU |
| INTN | Interrupt output | Active-low open-drain signal indicating V1/V2 undervoltage, wake-up, cyclic, or power-on events |
| EN | Enable output | Drives HIGH in Normal mode when ENC = 1; used to control external safety-critical hardware |
| SDI/SDO/SCK/SCSN | SPI interface signals | Full-duplex communication with MCU; SCSN enables register reads without write side effects |
| TXDC/RXDC | CAN logic interface | Digital input/output connecting MCU's CAN controller to internal transceiver; isolates logic from bus faults |
| CANH/CANL | CAN bus physical interface | High-speed differential bus terminals with ±58 V short-circuit tolerance and ISO 7637-3 transient protection |
| WAKE1/WAKE2 | Local wake-up inputs | Analog inputs with configurable sampling (16/64 ms) via WBIAS; support wake detection with bias control |
| LIMP | Limp home output | Active-low output activated during Overtemp mode or software-triggered limp home sequence |
| V2 | CAN transceiver supply | Dedicated 5 V regulator output; independent of V1; improves EMC by decoupling CAN bus power |
| SPLIT | CAN common-mode stabilization | Output connected to external 4.7 nF capacitor to stabilize recessive bus level and reduce ringing |
| WDOFF | Watchdog disable input | Hardware override: HIGH disables watchdog regardless of WMC setting; triggers immediate reset if changed in Normal/Standby |
Key Features
| Feature | Design Value |
|---|---|
| Integrated CAN ECU functions | Combines transceiver, dual regulators, watchdog, SPI, wake-up inputs, and limp home output in one HTSSOP32 package - eliminates discrete BOM items and reduces PCB footprint |
| Automotive-grade reliability | Meets ISO 7637-3 transient immunity, ±8 kV HBM/±6 kV IEC ESD on bus/wake pins, and overtemperature shutdown with automatic limp home activation |
| Intelligent power sequencing | Controlled startup from Off → Standby → Normal modes; V1 powers MCU before CAN activation; V2 can be disabled to minimize quiescent current |
| Flexible wake-up architecture | Dual analog wake inputs with selectable sampling time (16/64 ms), WBIAS bias control, and wake-source detection reported via SPI status registers |
| Diagnostic-ready SPI interface | 16-bit full-duplex SPI with read-only register access, interrupt status reporting (WI1/WI2/CWI/POSI), and configurable undervoltage warning/reset thresholds |
Applications
| Engine Control Unit (ECU) | Body Control Module (BCM) |
|---|---|
Use Scenario: Real-time monitoring and actuation in gasoline/diesel engine management systems under harsh thermal and electrical conditions. IC Role / Device Role / Timing Role: Core SBC providing controlled MCU power-up, CAN network interface, watchdog supervision, and limp home signaling during fault conditions. Use Value: Ensures deterministic startup sequence, maintains CAN communication during cranking (VBAT ≥ 4.5 V), and activates fail-safe hardware via LIMP output upon overtemperature. |
Use Scenario: Centralized control of lighting, door locks, windows, and HVAC in passenger vehicles with low-power standby requirements. IC Role / Device Role / Timing Role: Power manager and CAN interface enabling ultra-low sleep current (< 100 µA), wake-on-CAN/local switch, and regulated 5 V supply for microcontroller and sensors. Use Value: Reduces system quiescent current in Sleep mode while retaining full wake capability; V2 regulator isolation improves CAN EMC performance in noisy body networks. |
| Advanced Driver Assistance Systems (ADAS) | Electric Power Steering (EPS) |
Use Scenario: Sensor fusion and camera/radar module coordination requiring robust CAN communication and fault-tolerant power delivery. IC Role / Device Role / Timing Role: High-integrity SBC delivering stable 5 V MCU supply, precise watchdog timing (Window mode), and diagnostic SPI reporting for ASIL-B relevant subsystems. Use Value: ±2 % V1 regulation and programmable watchdog window ensure timing-critical firmware execution; INTN signaling enables rapid fault response within functional safety chains. |
Use Scenario: Safety-critical steering assist systems demanding continuous power integrity, CAN bus availability, and immediate fault escalation. IC Role / Device Role / Timing Role: System basis chip supplying MCU and CAN transceiver, detecting overtemperature events, and asserting LIMP output to initiate mechanical fallback mode. Use Value: Overtemperature shutdown with hysteresis and LIMP activation provides hardware-level fail-safe path; ±58 V CANH/CANL tolerance withstands load dump transients in 12 V EPS systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar CAN SBC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TJA1043TK/0Z | Single-chip high-speed CAN transceiver only (no regulators, no watchdog, no SPI); 5 V supply required externally | Lacks integrated power management and diagnostics; suitable only where MCU power and supervision are handled separately | Select when system already includes discrete regulators/watchdog and only CAN physical layer integration is needed |
| UJA1075ATW/5V0/1J | Same SBC family but lacks watchdog (no 'W' suffix); identical pinout, regulators, CAN transceiver, and SPI interface | Cannot provide cyclic wake-up or windowed timeout supervision; unsuitable for ASIL-B or safety-critical boot sequences | Choose only for cost-sensitive non-safety applications where watchdog functionality is omitted by design |
Compared with TJA1043TK/0Z and UJA1075ATW/5V0/1J, the UJA1076ATW/5V0/1J uniquely integrates full ECU power + communication + supervision in one package - enabling simplified layout, reduced component count, and certified automotive diagnostics without external supervision circuitry.
Availability
UJA1076ATW/5V0/1J is available at Aetrix Electronics and suitable for engine control units, body control modules, ADAS domain controllers, and electric power steering systems requiring stable component supply across automotive production lifecycles.
Supply support for UJA1076ATW/5V0/1J includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in CAN, SBC, and functional safety architectures.
The UJA1076ATW/5V0/1J belongs to NXP's Core System Basis Chip product line, engineered specifically for automotive electronic control units needing integrated high-speed CAN, robust power management, and fail-safe diagnostics in compact HTSSOP packages.
FAQ
What is the primary function of the UJA1076ATW/5V0/1J in an automotive ECU?
The UJA1076ATW/5V0/1J serves as a core System Basis Chip that integrates high-speed CAN communication, 5 V/250 mA microcontroller power regulation, dedicated CAN transceiver supply, SPI-based diagnostics, watchdog supervision, and limp home fail-safe signaling - replacing multiple discrete components in automotive ECUs such as engine control or body modules. Its design ensures controlled startup, cranking resilience, and fault-aware operation critical for ISO 26262-relevant systems.
Does the UJA1076ATW/5V0/1J support both 3.3 V and 5 V microcontroller supplies?
No - the UJA1076ATW/5V0/1J is the 5 V variant of the UJA1076A family, as indicated by the "/5" in its ordering code. It delivers a fixed 5 V ±2 % output on pin V1. The 3.3 V version is designated UJA1076ATW/3V0/1J. Both share identical pinout, SPI interface, CAN transceiver, and watchdog functionality, but regulator output voltage is hardware-defined per part number and not configurable.
How does the watchdog in the UJA1076ATW/5V0/1J operate in Window mode?
In Window mode, the UJA1076ATW/5V0/1J watchdog requires a trigger event within a defined time window - specifically between ttrig(wd)1 and ttrig(wd)2 after timer start. Triggering before ttrig(wd)1 or after ttrig(wd)2 causes an immediate system reset. This behavior enforces strict firmware execution timing and prevents runaway code. The default watchdog period is 128 ms, programmable from 8 ms to 4096 ms via NWP bits in the WD_and_Status register.
Can the UJA1076ATW/5V0/1J operate during automotive battery cranking conditions?
Yes - the UJA1076ATW/5V0/1J is designed for automotive cranking: its V1 regulator maintains regulation down to 4.5 V VBAT, and V2 operates down to 5.5 V VBAT, both compliant with ISO 7637-2 pulse 4 requirements. During cranking, the SBC remains in Standby or Normal mode, sustaining CAN communication and MCU supply without brownout or reset, provided external capacitors meet recommended values per the datasheet.
What is the role of the SPLIT pin on the UJA1076ATW/5V0/1J?
The SPLIT pin on the UJA1076ATW/5V0/1J outputs a stabilized common-mode voltage for the CAN bus, intended to be connected to a 4.7 nF capacitor between CANH and CANL. This configuration actively stabilizes the recessive bus level, reducing signal ringing and electromagnetic emissions - especially beneficial in long or unterminated CAN networks found in chassis and powertrain applications.
UJA1076ATW/5V0/1J Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 32-TSSOP (0.240", 6.10mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Applications:
- -
- Interface:
- SPI Serial
- Voltage - Supply:
- 4.5V ~ 28V
- Supplier Device Package:
- 32-HTSSOP
- Grade:
- Automotive
- Qualification:
- -
- Mounting Type:
- Surface Mount
UJA1076ATW/5V0/1J FAQ
1.How can I place an order for UJA1076ATW/5V0/1J through Aetrix?
Please submit a Request for Quotation (RFQ) for UJA1076ATW/5V0/1J on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UJA1076ATW/5V0/1J reliable?
The price and inventory of UJA1076ATW/5V0/1J are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UJA1076ATW/5V0/1J is usually 5 days.
3.What payment methods are accepted for UJA1076ATW/5V0/1J?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UJA1076ATW/5V0/1J transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UJA1076ATW/5V0/1J?
UJA1076ATW/5V0/1J orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UJA1076ATW/5V0/1J order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UJA1076ATW/5V0/1J?
For technical support, including UJA1076ATW/5V0/1J datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UJA1076ATW/5V0/1J requirements.
6.How does Aetrix verify that UJA1076ATW/5V0/1J is sourced from the original manufacturer or authorized distributors?
All UJA1076ATW/5V0/1J products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UJA1076ATW/5V0/1J meets industry standards.
7.What is the process for return or replacement of UJA1076ATW/5V0/1J?
All UJA1076ATW/5V0/1J units undergo pre-shipment inspection (PSI). If there is an issue with UJA1076ATW/5V0/1J, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UJA1076ATW/5V0/1J part is unused and in its original packaging.
Return procedure for UJA1076ATW/5V0/1J:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
UJA1076ATW/5V0/1J Tags

-
NVT4857UKAZ
NXP Semiconductors
-
TCA8418RTWR
Texas Instruments
-
PCA9546APWR
Texas Instruments

-
MD0100N8-G
Microchip Technology

-
PCA9548APW,118
NXP Semiconductors

-
PCA9540BDP,118
NXP Semiconductors

-
PCA9548APWR
Texas Instruments

-
PCA9546APW,118
NXP Semiconductors

-
PTN3360DBS,518
NXP Semiconductors

-
PCA9546ABS,118
NXP Semiconductors

-
PCA9518PWR
Texas Instruments

-
PCA9545APW,118
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

