NXP Semiconductors UJA1076ATW/5V0WD,1
- Part No.:
- UJA1076ATW/5V0WD,1
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 32-TSSOP (0.240", 6.10mm Width) Exposed Pad
- Datasheet:
-
UJA1076ATW/5V0WD,1.pdf
- Description:
- IC INTFACE SPECIALIZED 32HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,028
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
UJA1076ATW/5V0WD,1 from NXP Semiconductors is a high-speed CAN core System Basis Chip (SBC) integrating a ISO 11898-2/5-compliant CAN transceiver, 5 V/250 mA main voltage regulator (V1), dedicated 5 V CAN transceiver regulator (V2), SPI interface, dual local wake-up inputs, limp home output, and advanced watchdog with window/timeout/off modes. It replaces discrete ECU power, communication, and safety functions in automotive body control modules.
For engineers reviewing the UJA1076ATW/5V0WD,1 datasheet, UJA1076ATW/5V0WD,1 pinout, UJA1076ATW/5V0WD,1 application, or UJA1076ATW/5V0WD,1 equivalent, key selection criteria include its HTSSOP32 package, 5 V V1 regulator with external PNP extension capability, ±58 V short-circuit protected CANH/CANL pins, 16-bit SPI for diagnostics, and ISO 7637-3 transient-protected bus interface.
Technical Context
The UJA1076ATW/5V0WD,1 implements a state-machine-based system controller managing Off/Standby/Normal/Sleep/Overtemp modes with deterministic transitions triggered by VBAT thresholds, wake events, or thermal conditions. Its CAN transceiver features SPLIT output for recessive bus stabilization and true floating bus pins during power-off.
Power management includes dual independent regulators: V1 (5 V, ±2 % accuracy, 250 mA, undervoltage warning at 90 %, reset at 90 % or 70 %) and V2 (5 V, switchable, undervoltage warning only). The watchdog uses an on-chip oscillator and supports programmable periods (8–4096 ms) with configurable window timing and automatic re-enable on interrupt.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CAN Standard | ISO 11898-2:2003 and ISO 11898-5:2006 compliant high-speed CAN physical layer |
| Main Regulator (V1) | 5 V output, ±2 % accuracy, 250 mA max, supports external PNP transistor for thermal distribution |
| CAN Regulator (V2) | Dedicated 5 V supply for integrated CAN transceiver; independently switchable |
| Watchdog | Programmable window/timeout/off modes; default period 128 ms; on-chip oscillator clock source |
| SPI Interface | 16-bit full-duplex interface with read-only register access and chip-select control |
| Wake-up Inputs | Two analog wake-up pins (WAKE1/WAKE2) with selectable 16 ms or 64 ms sampling via WBIAS |
| ESD Protection | ±8 kV HBM and ±6 kV IEC 61000-4-2 on CAN and wake-up pins |
| Short-Circuit Tolerance | CANH/CANL pins rated ±58 V short-circuit proof per ISO 7637-3 |
Pinout & Package
Package: HTSSOP32 (SOT549-1), 6.1 mm × 11 mm, 0.65 mm pitch, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BAT (32) | Battery supply input | Primary power source; enables operation down to 4.5 V during cranking (ISO 7637/16750-2) |
| V1 (4) | Main microcontroller supply output | 5 V regulated output; ±2 % accuracy; supports external PNP for current scaling and thermal relief |
| V2 (20) | CAN transceiver supply output | Dedicated 5 V regulator; independent of V1; improves EMC and allows CAN operation during V1 brownout |
| RSTN (6) | Reset input/output | Bidirectional active-low reset; variable power-on reset length supports diverse MCU timing requirements |
| INTN (7) | Interrupt output | Open-drain signal indicating V1/V2 undervoltage, CAN/local wake-up, cyclic, or power-on events |
| EN (8) | Enable output | Drives external safety-critical hardware; controlled via Mode_Control register bit ENC |
| SDI/SDO/SCK/SCSN (9–12) | SPI interface signals | Full-duplex 16-bit communication path for configuration, status reporting, and diagnostics |
| TXDC/RXDC (13–14) | CAN controller data interface | Digital connection to MCU's CAN controller; isolates logic-level signaling from bus-side transceiver |
| CANH/CANL (21–22) | CAN bus differential pair | High-speed CAN physical layer interface; ±58 V short-circuit tolerant; ISO 7637-3 transient protected |
| SPLIT (24) | CAN common-mode stabilization | Output for external 60 Ω resistor to stabilize recessive bus level and reduce ringing |
| WAKE1/WAKE2 (18–19) | Local wake-up inputs | Analog inputs with programmable sampling; support low-current standby monitoring of mechanical switches |
| LIMP (17) | Limp home activation output | Active-low signal to engage fail-safe hardware (e.g., reduced-power mode) during critical system faults |
| WDOFF (16) | Watchdog disable input | Hardware override: HIGH disables watchdog regardless of register settings; used for debug or safe boot |
| WBIAS (28) | Wake bias control output | Provides bias current to external wake-up transistor; sampling time selectable (16 ms or 64 ms) |
| VEXCTRL/VEXCC (31–29) | External PNP transistor interface | VEXCTRL drives base; VEXCC monitors collector current - enables precise current threshold control for thermal sharing |
Key Features
| Feature | Design Value |
|---|---|
| Integrated CAN transceiver + dual regulators + watchdog + SPI | Reduces BOM count and PCB area vs. discrete solutions; eliminates inter-component timing mismatches |
| Independent V1 and V2 regulation | Enables CAN bus activity even when microcontroller supply (V1) is unstable or shut down |
| Programmable watchdog with on-chip oscillator | Eliminates need for external timing components; ensures reliable reset behavior under voltage or temperature stress |
| True floating CAN bus pins in Off mode | Prevents battery drain and unintended bus loading when system is powered off |
| LIMP output with overtemperature shutdown | Activates fail-safe hardware upon thermal fault or severe system error - meets ASIL-B functional safety intent |
| ±58 V short-circuit protected CANH/CANL | Withstands load dump and jump-start transients without external protection components |
Applications
| Body Control Module (BCM) | Engine Control Unit (ECU) |
|---|---|
|
Use Scenario: Centralized power and communication management for door locks, lighting, wipers, and HVAC actuators. IC Role / Device Role / Timing Role: Core SBC providing regulated 5 V supply to MCU, CAN interface to vehicle network, and wake-up detection from door handle sensors. Use Value: Enables ultra-low standby current (< 100 µA) with full wake-up capability via CAN or local inputs - critical for battery life in always-on systems. |
Use Scenario: Power and interface management for engine management MCU in gasoline/diesel powertrain applications. IC Role / Device Role / Timing Role: Supplies 5 V/250 mA to engine MCU and peripherals; delivers robust CAN connectivity with ±58 V bus tolerance for harsh under-hood environments. Use Value: Maintains CAN communication during cranking (VBAT ≥ 4.5 V) and survives ISO 7637-2 pulse 5a load dump - reduces need for external TVS diodes. |
| Advanced Driver Assistance Systems (ADAS) Sensor Hub | Electric Power Steering (EPS) Control Unit |
|
Use Scenario: Consolidated power and CAN interface for radar, camera, and ultrasonic sensor clusters. IC Role / Device Role / Timing Role: Provides stable 5 V V1 for sensor fusion MCU and isolated V2 for CAN transceiver; supports remote flash programming via CAN bus. Use Value: SPI-based diagnostics and detailed status reporting (V1/V2/wake-up/CAN flags) enable predictive maintenance and field firmware updates. |
Use Scenario: Safety-critical power and communication interface for EPS motor control MCU. IC Role / Device Role / Timing Role: Delivers ASIL-B-aligned functionality via LIMP output, overtemperature shutdown, and programmable watchdog with window mode. Use Value: LIMP output activates mechanical fallback steering mode upon internal fault detection - satisfies ISO 26262 functional safety requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed CAN SBC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TJA1043T/CM,118 | Single-chip CAN transceiver only; no integrated regulators, watchdog, or SPI; requires external power management | Lacks system-level integration; suitable only where discrete power ICs already exist and board space permits | Select when cost sensitivity outweighs integration benefits and existing design uses separate regulators/watchdog |
| UJA1075ATW/5V0WD,1 | Same pinout and feature set but lacks SPLIT pin; no recessive bus stabilization capability | Lower EMC performance in noisy bus topologies; not recommended for long harnesses or high-node-count networks | Choose only if SPLIT functionality is unused and legacy compatibility with UJA1075 layout is required |
Compared with TJA1043T/CM,118 and UJA1075ATW/5V0WD,1, the UJA1076ATW/5V0WD,1 uniquely combines full ECU power management, CAN transceiver, and diagnostic interfaces in one HTSSOP32 package - reducing component count, improving startup reliability, and enabling limp-home fail-safe behavior without external logic.
Availability
UJA1076ATW/5V0WD,1 is available at Aetrix Electronics and suitable for automotive body control modules, engine control units, ADAS sensor hubs, and electric power steering systems requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for UJA1076ATW/5V0WD,1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on automotive, industrial, IoT, and communication infrastructure applications, with deep expertise in secure connectivity and embedded processing.
The UJA1076A family is designed as automotive-grade System Basis Chips to consolidate power, communication, and safety functions in Electronic Control Units - targeting ASIL-B functional safety compliance and robust operation in harsh vehicle environments.
FAQ
What is the primary function of the UJA1076ATW/5V0WD,1 in an automotive ECU?
The UJA1076ATW/5V0WD,1 serves as a core System Basis Chip that integrates a high-speed CAN transceiver, 5 V/250 mA microcontroller regulator (V1), dedicated 5 V CAN transceiver regulator (V2), SPI interface, watchdog, wake-up inputs, and limp home output. It replaces multiple discrete components in automotive ECUs to simplify design, improve reliability, and ensure controlled system startup and fail-safe behavior - all within a single HTSSOP32 package.
Does the UJA1076ATW/5V0WD,1 support remote firmware updates over CAN?
Yes, the UJA1076ATW/5V0WD,1 explicitly supports remote flash programming via the CAN bus as stated in its product data sheet. This capability relies on its integrated high-speed CAN transceiver and SPI interface, which allows the host microcontroller to manage bootloader operations while maintaining full network connectivity and diagnostic visibility during update sequences.
What is the purpose of the SPLIT pin on the UJA1076ATW/5V0WD,1?
The SPLIT pin on the UJA1076ATW/5V0WD,1 provides a dedicated output to stabilize the recessive common-mode voltage on the CAN bus. When connected to a 60 Ω resistor between CANH and CANL, it reduces bus ringing and improves signal integrity - especially in longer harnesses or multi-node networks. This feature is absent in the pin-compatible UJA1075 variant and directly enhances electromagnetic compatibility.
How does the UJA1076ATW/5V0WD,1 handle thermal faults?
Upon detecting die temperature exceeding the overtemperature protection activation threshold (Tth(act)otp), the UJA1076ATW/5V0WD,1 enters Overtemp mode: V1 and V2 regulators shut down, CAN transceiver goes high-impedance, RSTN is driven LOW, and the LIMP pin is activated (driven LOW) to trigger fail-safe hardware. Exit occurs only after temperature drops below the release threshold (Tth(rel)otp), followed by automatic entry into Standby mode and system reset.
Can the UJA1076ATW/5V0WD,1 operate during automotive cranking conditions?
Yes, the UJA1076ATW/5V0WD,1 is designed to maintain operation during cranking: its V1 regulator functions down to VBAT = 4.5 V, and V2 operates down to VBAT = 5.5 V - both compliant with ISO 7637 and ISO 16750-2. This ensures uninterrupted CAN communication and microcontroller supply even during engine start, when battery voltage dips significantly.
UJA1076ATW/5V0WD,1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 32-TSSOP (0.240", 6.10mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Applications:
- -
- Interface:
- SPI Serial
- Voltage - Supply:
- 4.5V ~ 28V
- Supplier Device Package:
- 32-HTSSOP
- Grade:
- Automotive
- Qualification:
- -
- Mounting Type:
- Surface Mount
UJA1076ATW/5V0WD,1 FAQ
1.How can I place an order for UJA1076ATW/5V0WD,1 through Aetrix?
Please submit a Request for Quotation (RFQ) for UJA1076ATW/5V0WD,1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UJA1076ATW/5V0WD,1 reliable?
The price and inventory of UJA1076ATW/5V0WD,1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UJA1076ATW/5V0WD,1 is usually 5 days.
3.What payment methods are accepted for UJA1076ATW/5V0WD,1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UJA1076ATW/5V0WD,1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UJA1076ATW/5V0WD,1?
UJA1076ATW/5V0WD,1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UJA1076ATW/5V0WD,1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UJA1076ATW/5V0WD,1?
For technical support, including UJA1076ATW/5V0WD,1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UJA1076ATW/5V0WD,1 requirements.
6.How does Aetrix verify that UJA1076ATW/5V0WD,1 is sourced from the original manufacturer or authorized distributors?
All UJA1076ATW/5V0WD,1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UJA1076ATW/5V0WD,1 meets industry standards.
7.What is the process for return or replacement of UJA1076ATW/5V0WD,1?
All UJA1076ATW/5V0WD,1 units undergo pre-shipment inspection (PSI). If there is an issue with UJA1076ATW/5V0WD,1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UJA1076ATW/5V0WD,1 part is unused and in its original packaging.
Return procedure for UJA1076ATW/5V0WD,1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
UJA1076ATW/5V0WD,1 Tags

-
NVT4857UKAZ
NXP Semiconductors
-
TCA8418RTWR
Texas Instruments
-
PCA9546APWR
Texas Instruments

-
MD0100N8-G
Microchip Technology

-
PCA9548APW,118
NXP Semiconductors

-
PCA9540BDP,118
NXP Semiconductors

-
PCA9548APWR
Texas Instruments

-
PCA9546APW,118
NXP Semiconductors

-
PTN3360DBS,518
NXP Semiconductors

-
PCA9546ABS,118
NXP Semiconductors

-
PCA9518PWR
Texas Instruments

-
PCA9545APW,118
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

