NXP Semiconductors UJA1076TW/5V0/WD:1
- Part No.:
- UJA1076TW/5V0/WD:1
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 32-TSSOP (0.240", 6.10mm Width) Exposed Pad
- Datasheet:
-
UJA1076TW/5V0/WD:1.pdf
- Description:
- IC INTFACE SPECIALIZED 32HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,375
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
UJA1076TW/5V0/WD:1 from NXP Semiconductors is a high-speed CAN core System Basis Chip (SBC) integrating a 5 V/250 mA microcontroller regulator, ISO 11898-2/5-compliant CAN transceiver, advanced window/timeout watchdog with on-chip oscillator, SPI interface, dual local wake-up inputs, and limp-home output - designed for automotive ECU power management and network interface consolidation.
For engineers reviewing the UJA1076TW/5V0/WD:1 datasheet, UJA1076TW/5V0/WD:1 pinout, UJA1076TW/5V0/WD:1 application, or UJA1076TW/5V0/WD:1 equivalent, key selection criteria include its HTSSOP32 package with exposed die pad, V1/V2 dual-regulator architecture, programmable watchdog timing (8–4096 ms), CAN bus floating behavior in Off mode, and support for remote flash programming via CAN.
Technical Context
The UJA1076TW/5V0/WD:1 implements a state-machine-based system controller managing five operational modes (Off, Standby, Normal, Sleep, Overtemp) with deterministic transitions triggered by VBAT thresholds, wake events, or register writes. Its CAN transceiver features SPLIT pin stabilization, ±58 V short-circuit protection, and independent 5 V V2 regulator decoupled from V1.
Power management includes dual wake-up inputs (WAKE1/WAKE2) with configurable sampling (16/64 ms), WBIAS-controlled external biasing, and VEXCTRL/VEXCC pins enabling PNP-assisted current scaling up to >250 mA with thermal distribution across PCB. The watchdog operates in Window, Timeout, or Off modes using an internal oscillator independent of V1/V2 supplies.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CAN Standard | ISO 11898-2 and ISO 11898-5 compliant high-speed physical layer |
| V1 Regulator Output | 5 V ±2 %, 250 mA max; supports external PNP transistor for thermal load sharing |
| V2 Regulator Output | 5 V dedicated supply for integrated CAN transceiver; switchable off |
| Watchdog Modes | Window, Timeout, and Off; programmable period (8–4096 ms) via NWP bits |
| SPI Interface | Full-duplex 16-bit interface with read-only register access and chip-select control |
| Wake-up Inputs | Two local inputs (WAKE1/WAKE2) with detectable source identification and bias control (WBIAS) |
| Limp-home Output | Dedicated LIMP pin driven LOW during overtemperature or critical fault for fail-safe hardware activation |
Pinout & Package
Package: HTSSOP32 (SOT549-1), 6.1 mm × 11 mm body, 0.65 mm pitch, exposed die pad for thermal dissipation (electrically isolated, may be left floating or connected to GND).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| V1 (Pin 4) | Main microcontroller supply output | 5 V regulated output; undervoltage warning at 90 %, reset at 90 % or 70 % nominal |
| RSTN (Pin 6) | Bidirectional reset I/O | Drives microcontroller reset; variable power-on pulse length supports diverse MCU timing requirements |
| INTN (Pin 7) | Interrupt output | Signals V1/V2 undervoltage, CAN/local wake-up, cyclic, and power-on events; individually maskable |
| EN (Pin 8) | Global enable output | Controls safety-critical external hardware; driven HIGH in Normal mode per ENC bit setting |
| SDI/SDO/SCK/SCSN (Pins 9–12) | SPI interface signals | Full-duplex communication with microcontroller; supports status read-back without register modification |
| TXDC/RXDC (Pins 13–14) | CAN data interface | Direct connection to MCU's CAN controller; enables CAN protocol handling without external logic |
| WDOFF (Pin 16) | Watchdog disable control | Hardware override: HIGH disables watchdog regardless of register settings; triggers software reset |
| LIMP (Pin 17) | Limp-home activation output | Driven LOW during overtemperature or critical fault to engage fail-safe subsystems |
| WAKE1/WAKE2 (Pins 18–19) | Local wake-up inputs | Detect external switch closures; support wake-source identification and synchronized sampling via WBIAS |
| V2 (Pin 20) | CAN transceiver supply | Independent 5 V regulator; improves EMC and allows CAN operation even if V1 is disabled |
| CANH/CANL (Pins 21–22) | CAN bus differential pair | ±58 V short-circuit protected; floating when powered off; supports bus wake-up detection in Lowpower mode |
| SPLIT (Pin 24) | CAN common-mode stabilization | Stabilizes recessive bus level; reduces reflections and improves signal integrity on unterminated buses |
| WBIAS (Pin 28) | Wake bias control | Provides bias current to external wake-up switches; sampling time selectable (16/64 ms) via WBC bit |
| VEXCTRL/VEXCC (Pins 31–29) | External PNP transistor interface | VEXCTRL drives base; VEXCC monitors collector current; enables scalable current delivery beyond 250 mA |
| BAT (Pin 32) | Battery input supply | Operates down to 4.5 V (cranking); protected per ISO 7637-3 transients and ±8 kV HBM ESD |
Key Features
| Feature | Design Value |
|---|---|
| Integrated CAN transceiver + dual regulators | Eliminates discrete CAN PHY, LDOs, and watchdog ICs - reduces BOM count and board area in automotive ECUs |
| Programmable watchdog with on-chip oscillator | Enables deterministic system recovery without external timing components; immune to V1/V2 supply noise |
| Separate V2 regulator for CAN transceiver | Decouples CAN bus power from microcontroller supply - maintains bus wake-up capability during V1 brownout |
| SPLIT pin for recessive-level stabilization | Reduces bus ringing and improves EMC margin on long or unterminated CAN networks without external resistors |
| WBIAS-controlled wake-up biasing | Minimizes standby current draw from wake switches while maintaining reliable edge detection across temperature |
| LIMP output with overtemperature linkage | Activates mechanical or electrical fail-safes immediately upon thermal shutdown - meets ASIL-B functional safety expectations |
Applications
| Body Control Module (BCM) | Engine Control Unit (ECU) |
|---|---|
Use Scenario: Centralized power and communication management for door locks, lighting, and climate actuators in 12 V vehicle architectures. IC Role / Device Role / Timing Role: Core SBC providing regulated 5 V supply to MCU, CAN interface to vehicle network, and wake-up response to key fob or sensor inputs. Use Value: Enables ultra-low standby current (< 100 µA) with full CAN bus wake-up detection and limp-home activation during thermal fault. | Use Scenario: Power sequencing and fault monitoring for gasoline/diesel engine controllers operating under cranking (4.5 V) and load-dump (≥27 V) conditions. IC Role / Device Role / Timing Role: Ensures controlled MCU startup, monitors V1/V2 undervoltage, detects CAN bus faults, and asserts LIMP output during overtemperature events. Use Value: Maintains CAN communication and microcontroller operation down to 4.5 V battery voltage while delivering 250 mA with ±2 % regulation accuracy. |
| Transmission Control Unit (TCU) | Advanced Driver Assistance Systems (ADAS) Sensor Hub |
Use Scenario: High-reliability power and network interface for automatic transmission controllers requiring fail-operational behavior during CAN bus faults. IC Role / Device Role / Timing Role: Integrates watchdog supervision, dual-voltage regulation, and CAN transceiver with SPLIT pin stabilization for robust bus signaling. Use Value: Supports ISO 11898-5 partial networking; enables bus wake-up detection even when V2 is switched off to reduce quiescent current. | Use Scenario: Consolidated power and communication interface for radar/camera fusion modules requiring low EMI and precise voltage stability. IC Role / Device Role / Timing Role: Supplies 5 V to imaging processor and sensors, provides CAN FD-ready physical layer, and reports detailed status via SPI for diagnostic logging. Use Value: Delivers ±2 % V1 regulation and ±6 kV IEC 61000-4-2 ESD protection on CANH/CANL - meeting stringent ADAS EMC requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive SBC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TJA1042TK/3 | Standalone high-speed CAN transceiver only; no regulators, watchdog, or SPI interface | Requires external LDO, watchdog IC, and power management logic - increases BOM and layout complexity | Select when only CAN PHY functionality is needed and system-level power management is handled elsewhere |
| UJA1075TW/5V0/WD | Same SBC family but lacks SPLIT pin and has reduced wake-up pin ESD rating (±4 kV vs. ±8 kV HBM) | Lower EMC robustness on CAN bus; less suitable for high-noise engine bay environments | Select only for cost-sensitive non-engine-bay applications where SPLIT stabilization is not required |
Compared with TJA1042TK/3 and UJA1075TW/5V0/WD, the UJA1076TW/5V0/WD:1 delivers full ECU consolidation - reducing component count by ≥4 ICs while adding SPLIT-based bus stabilization and higher wake-pin ESD immunity essential for under-hood deployment.
Availability
UJA1076TW/5V0/WD:1 is available at Aetrix Electronics and suitable for automotive body control modules, engine control units, and transmission control units requiring stable component supply, long-term lifecycle assurance, and AEC-Q100-compliant sourcing.
Supply support for UJA1076TW/5V0/WD:1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in CAN, SBC, and automotive power management ICs.
The UJA1076TW/5V0/WD:1 belongs to NXP's System Basis Chip product line, engineered specifically to replace discrete ECU power, interface, and supervision functions with a single AEC-Q100-qualified device for 12 V automotive platforms.
FAQ
What is the primary function of the UJA1076TW/5V0/WD:1 in an automotive ECU?
The UJA1076TW/5V0/WD:1 serves as a core System Basis Chip that integrates a high-speed CAN transceiver, 5 V/250 mA microcontroller regulator (V1), dedicated 5 V CAN transceiver regulator (V2), advanced watchdog, SPI interface, dual wake-up inputs, and limp-home output. It replaces multiple discrete components in automotive ECUs, enabling consolidated power management, network interfacing, and system supervision - all within a single HTSSOP32 package. This integration reduces board space, BOM count, and design complexity while ensuring compliance with ISO 11898-2/5 and automotive transient standards.
Does the UJA1076TW/5V0/WD:1 support remote firmware updates over CAN?
Yes, the UJA1076TW/5V0/WD:1 supports remote flash programming via the CAN bus. Its integrated high-speed CAN transceiver complies with ISO 11898-2 and ISO 11898-5, enabling robust communication for bootloader execution and firmware updates without requiring physical access to the ECU. The SBC maintains full wake-up capability during low-power states, allowing it to respond to CAN messages even in Standby or Sleep modes - a critical requirement for over-the-air (OTA) update architectures in modern vehicles.
How does the SPLIT pin on the UJA1076TW/5V0/WD:1 improve CAN bus performance?
The SPLIT pin on the UJA1076TW/5V0/WD:1 stabilizes the recessive common-mode voltage on the CAN bus, reducing signal reflections and electromagnetic emissions - especially on unterminated or long bus segments. Unlike passive resistor networks, SPLIT provides active stabilization that adapts to bus loading and temperature variations. This feature directly improves signal integrity and EMC performance, allowing the UJA1076TW/5V0/WD:1 to meet stringent automotive emission standards without additional external components, unlike alternatives such as the UJA1075TW/5V0/WD which lacks this pin.
Can the UJA1076TW/5V0/WD:1 operate during engine cranking conditions?
Yes, the UJA1076TW/5V0/WD:1 is explicitly designed to operate during engine cranking, supporting battery voltages as low as 4.5 V on the BAT pin - compliant with ISO 7637-3 Pulse 4/4b and ISO 16750-2 specifications. Its V1 regulator maintains ±2 % accuracy and delivers up to 250 mA even under these low-input conditions, ensuring uninterrupted microcontroller operation. The V2 regulator sustains CAN transceiver functionality down to 5.5 V, preserving bus wake-up capability during cranking-induced dips.
What is the role of the WBIAS pin on the UJA1076TW/5V0/WD:1?
The WBIAS pin on the UJA1076TW/5V0/WD:1 provides a controlled bias current to external wake-up switches (e.g., door handle sensors or ignition key readers), enabling low-current operation while maintaining reliable wake detection. It supports two sampling intervals - 16 ms or 64 ms - selected via the WBC bit in the Mode_Control register. This programmable timing minimizes average current draw in Standby mode, extending battery life in always-on automotive systems without compromising responsiveness to legitimate wake events.
UJA1076TW/5V0/WD:1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 32-TSSOP (0.240", 6.10mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- -
- Interface:
- SPI Serial
- Voltage - Supply:
- 4.5V ~ 28V
- Supplier Device Package:
- 32-HTSSOP
- Grade:
- Automotive
- Qualification:
- -
- Mounting Type:
- Surface Mount
UJA1076TW/5V0/WD:1 FAQ
1.How can I place an order for UJA1076TW/5V0/WD:1 through Aetrix?
Please submit a Request for Quotation (RFQ) for UJA1076TW/5V0/WD:1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UJA1076TW/5V0/WD:1 reliable?
The price and inventory of UJA1076TW/5V0/WD:1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UJA1076TW/5V0/WD:1 is usually 5 days.
3.What payment methods are accepted for UJA1076TW/5V0/WD:1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UJA1076TW/5V0/WD:1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UJA1076TW/5V0/WD:1?
UJA1076TW/5V0/WD:1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UJA1076TW/5V0/WD:1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UJA1076TW/5V0/WD:1?
For technical support, including UJA1076TW/5V0/WD:1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UJA1076TW/5V0/WD:1 requirements.
6.How does Aetrix verify that UJA1076TW/5V0/WD:1 is sourced from the original manufacturer or authorized distributors?
All UJA1076TW/5V0/WD:1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UJA1076TW/5V0/WD:1 meets industry standards.
7.What is the process for return or replacement of UJA1076TW/5V0/WD:1?
All UJA1076TW/5V0/WD:1 units undergo pre-shipment inspection (PSI). If there is an issue with UJA1076TW/5V0/WD:1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UJA1076TW/5V0/WD:1 part is unused and in its original packaging.
Return procedure for UJA1076TW/5V0/WD:1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
UJA1076TW/5V0/WD:1 Tags

-
NVT4857UKAZ
NXP Semiconductors
-
TCA8418RTWR
Texas Instruments
-
PCA9546APWR
Texas Instruments

-
MD0100N8-G
Microchip Technology

-
PCA9548APW,118
NXP Semiconductors

-
PCA9540BDP,118
NXP Semiconductors

-
PCA9548APWR
Texas Instruments

-
PCA9546APW,118
NXP Semiconductors

-
PTN3360DBS,518
NXP Semiconductors

-
PCA9546ABS,118
NXP Semiconductors

-
PCA9518PWR
Texas Instruments

-
PCA9545APW,118
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

