My Inquiry
My Account
NXP Semiconductors UJA1079TW/3V3/WD:1
- Part No.:
- UJA1079TW/3V3/WD:1
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 32-TSSOP (0.240", 6.10mm Width) Exposed Pad
- Datasheet:
-
UJA1079TW/3V3/WD:1.pdf
- Description:
- IC INTFACE SPECIALIZED 32HTSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,381
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
UJA1079TW/3V3/WD from NXP Semiconductors is a LIN 2.1–compliant System Basis Chip (SBC) integrating a 3.3 V/250 mA voltage regulator, advanced window/timeout watchdog with on-chip oscillator, full-duplex SPI interface, dual local wake-up inputs, and limp-home output - designed for automotive ECU power management and LIN sub-bus control in body electronics modules.
For engineers reviewing the UJA1079TW/3V3/WD datasheet, UJA1079TW/3V3/WD pinout, UJA1079TW/3V3/WD application, or UJA1079TW/3V3/WD equivalent, this page delivers verified functional architecture, thermal-aware regulator behavior, LIN bus fault tolerance (±58 V short-circuit proof), ISO 7637-3 transient protection, and precise watchdog timing modes - all critical for fail-safe automotive subsystem design.
Technical Context
The UJA1079TW/3V3/WD implements a state-machine-based system controller managing Off/Standby/Normal/Sleep/Overtemp mode transitions triggered by VBAT thresholds, LIN activity, local wake events, or temperature excursions. Its LIN transceiver supports low-slope mode (10.4 kbit/s) for EMC optimization and includes integrated DLIN termination diode.
Power management combines V1 regulation (3.3 V ±2 % for master, ±3 % for slave), external PNP transistor support with programmable activation thresholds (50/85 mA), and undervoltage detection at 90 % nominal with selectable reset threshold (90 % or 70 %). The watchdog operates in Window, Timeout, or Off modes with default 128 ms period and independent on-chip oscillator timing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| LIN Compliance | LIN 2.1, SAE J2602, backward compatible with LIN 2.0 and LIN 1.3 - ensures interoperability across automotive LIN networks |
| Voltage Regulator Output | 3.3 V ±2 % (master), ±3 % (slave); 250 mA max - powers microcontroller and peripherals with precision under cranking (VBAT ≥ 4.5 V) |
| Watchdog Modes | Window, Timeout, Off; programmable period (8–4096 ms); on-chip oscillator clock source - enables deterministic safety monitoring without external timing components |
| SPI Interface | Full-duplex 16-bit; SCSN/SCK/SDI/SDO signals; register read/write access - provides bidirectional configuration, status reporting, and diagnostics to host MCU |
| Wake-up Capability | Two dedicated WAKE1/WAKE2 inputs with configurable sampling (16/64 ms), bias control (WBIAS), and interrupt generation - supports ultra-low-power standby with reliable event detection |
| Protection Features | ±58 V short-circuit proof LIN pin; ±8 kV HBM / ±6 kV IEC 61000-4-2 ESD; ISO 7637-3 transient immunity - sustains operation in harsh automotive electrical environments |
| Thermal Package | HTSSOP32 (SOT549-1); 6.1 mm × 11 mm; exposed die pad - enables efficient PCB heat dissipation for continuous 250 mA operation |
Pinout & Package
Package: HTSSOP32 (SOT549-1), 32-pin thermally enhanced thin shrink small outline package with 0.65 mm pitch and exposed die pad for PCB thermal conduction.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BAT (Pin 32) | Battery supply input | Accepts 4.5–27 V automotive battery range; powers internal circuitry and enables operation during cranking |
| V1 (Pin 4) | Regulated output | 3.3 V supply for MCU and peripherals; supports external PNP extension via VEXCTRL/VEXCC pins |
| RSTN (Pin 6) | Bidirectional reset | Drives LOW on undervoltage/watchdog/system faults; accepts external reset; configurable pulse width |
| INTN (Pin 7) | Interrupt output | Active-low signal indicating V1 UV, LIN/local wake, cyclic, or power-on events - enables MCU event-driven response |
| EN (Pin 8) | Global enable output | Fail-safe control signal to enable/disable safety-critical hardware in Normal mode per Mode_Control register |
| LIMP (Pin 17) | Limp-home output | Drives LOW during Overtemp or severe fault to activate degraded-mode hardware - supports ASIL-B-relevant fail-operational behavior |
| WAKE1/WAKE2 (Pins 18/19) | Local wake inputs | Dedicated inputs with programmable sampling and bias control (WBIAS) - reduce current draw in Standby while retaining wake sensitivity |
| WDOFF (Pin 16) | Watchdog disable | Hardware override: HIGH disables watchdog regardless of register settings - enables safe debug or maintenance mode |
| LIN (Pin 25) | LIN bus line | Direct connection to LIN physical bus; supports short-circuit to battery/GND and ±58 V fault tolerance |
| DLIN (Pin 26) | LIN termination diode | Integrated diode for LIN bus termination - eliminates external component and improves EMC stability |
Key Features
| Feature | Design Value |
|---|---|
| Advanced low-power concept | Standby current < 100 µA with full wake capability; Sleep mode cuts V1 and reduces total current to < 10 µA |
| Controlled system start-up | Power-on reset with configurable pulse width; sequenced V1 enable before MCU boot - prevents race conditions and lockups |
| Detailed status reporting | Register-mapped diagnostics via SPI: V1 status, wake source flags, interrupt pending bits, temperature warnings - enables real-time health monitoring |
| Fail-safe outputs | EN and LIMP pins drive defined states (HIGH/LOW/floating) during faults - allows deterministic hardware-level safety responses |
| Thermal protection | Overtemperature shutdown at Tth(act)otp; automatic recovery after hysteresis drop; LIMP activation and RSTN assertion - prevents thermal runaway |
Applications
| Body Control Module (BCM) | Seat Control Unit |
|---|---|
Use Scenario: Centralized control of door locks, windows, mirrors, and interior lighting via LIN sub-network. IC Role / Device Role / Timing Role: UJA1079TW/3V3/WD serves as primary power manager and LIN interface - regulating 3.3 V for MCU, enabling bus wake-up, and asserting LIMP during overtemperature. Use Value: Eliminates discrete regulators, watchdogs, and LIN transceivers; reduces BOM count by ≥5 components while meeting ISO 11898-4 EMC requirements. |
Use Scenario: Motorized seat position adjustment with memory functions, using LIN-connected sensors and actuators. IC Role / Device Role / Timing Role: UJA1079TW/3V3/WD supplies regulated 3.3 V to seat MCU, detects local switch wake events (WAKE1/WAKE2), and triggers limp-home if motor driver overheats. Use Value: Enables < 10 µA Sleep current for battery-sensitive applications; supports cranking down to 4.5 V without brownout; integrates LIN bus protection against load dump. |
| Roof Module (Sunroof/Climate) | Trunk/Liftgate Actuator |
Use Scenario: Sunroof open/close and climate fan speed control coordinated over LIN from central HVAC ECU. IC Role / Device Role / Timing Role: UJA1079TW/3V3/WD manages power sequencing, monitors V1 for undervoltage during ignition cycles, and uses SPI to report motor stall or obstruction faults. Use Value: Provides ±2 % V1 accuracy required for LIN master timing; supports cyclic wake-up for periodic sensor polling without MCU intervention. |
Use Scenario: Power liftgate with anti-pinch detection, using LIN-connected Hall sensors and motor drivers. IC Role / Device Role / Timing Role: UJA1079TW/3V3/WD regulates 3.3 V for liftgate MCU, asserts LIMP on overtemperature or LIN bus fault, and generates interrupts for obstruction events. Use Value: Integrates ±58 V short-circuit protection on LIN pin - withstands accidental battery contact during service; enables fail-operational behavior per ISO 26262 ASIL-B decomposition. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LIN SBC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UJA1076TW/3V3/WD | Same HTSSOP32 package and 3.3 V regulator, but lacks LIMP output and has reduced SPI register set - no limp-home fail-safe capability | Not suitable for ASIL-B systems requiring hardware-level degradation path; limited diagnostic depth | Select only when limp-home functionality is unnecessary and cost reduction outweighs safety feature loss |
| TLE9471-2ES | Infineon LIN SBC with 3.3 V/250 mA regulator, integrated CAN FD interface, and higher ESD rating (±15 kV HBM), but larger TQFP48 package and no WBIAS-controlled wake sampling | Supports mixed LIN/CAN networks; better ESD robustness for high-noise zones; less optimized for ultra-low-power wake scenarios | Choose when CAN coexistence or extreme ESD immunity is mandatory; avoid if PCB space or standby current < 100 µA is critical |
Compared with UJA1076TW/3V3/WD, the UJA1079TW/3V3/WD adds essential limp-home fail-safe output and richer SPI diagnostics; versus TLE9471-2ES, it offers smaller footprint and lower standby current but lacks CAN integration - making it optimal for cost- and space-constrained LIN-only body electronics.
Availability
UJA1079TW/3V3/WD is available at Aetrix Electronics and suitable for automotive body control modules, seat control units, roof modules, and trunk/liftgate actuators requiring stable component supply, long-term lifecycle assurance, and AEC-Q100 qualified performance.
Supply support for UJA1079TW/3V3/WD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in automotive-grade analog and mixed-signal ICs.
The UJA1079TW/3V3/WD belongs to NXP's System Basis Chip product line, engineered specifically for automotive ECU consolidation - replacing discrete power, communication, and safety functions with a single AEC-Q100 qualified device for LIN-based body electronics.
FAQ
What is the nominal output voltage and accuracy of the UJA1079TW/3V3/WD voltage regulator?
The UJA1079TW/3V3/WD features a fixed 3.3 V output regulator with ±2 % accuracy for LIN master applications and ±3 % for LIN slave configurations. This precision ensures stable MCU operation and meets timing requirements for LIN protocol compliance, even under battery cranking conditions down to 4.5 V.
Does the UJA1079TW/3V3/WD support external PNP transistor extension for higher current delivery?
Yes, the UJA1079TW/3V3/WD supports external PNP transistor extension via VEXCTRL (base control) and VEXCC (collector current sense) pins. It provides programmable activation thresholds (50 mA or 85 mA rising/falling) to distribute thermal load across the PCB - enabling sustained >250 mA delivery while maintaining safe junction temperatures.
How does the watchdog function differ between Window and Timeout modes in the UJA1079TW/3V3/WD?
In Window mode, the UJA1079TW/3V3/WD requires watchdog triggers within a defined time window (first half of period) to avoid reset - detecting both early and late software hangs. In Timeout mode, any trigger resets the timer, and overflow sets a cyclic interrupt; if already pending, overflow causes immediate reset - offering simpler supervision for non-critical tasks.
What protection features does the UJA1079TW/3V3/WD provide on its LIN bus pin?
The UJA1079TW/3V3/WD LIN pin provides ±58 V short-circuit proofing, ±8 kV HBM and ±6 kV IEC 61000-4-2 ESD protection, and ISO 7637-3 transient immunity. These features ensure robust operation against load dump, jump-start, and electrostatic events common in automotive harness environments - eliminating need for external TVS diodes in most designs.
Can the UJA1079TW/3V3/WD enter ultra-low-power Sleep mode while retaining full wake-up capability?
Yes, the UJA1079TW/3V3/WD enters Sleep mode with V1 disabled and total current < 10 µA, yet retains full wake-up capability via LIN bus activity or WAKE1/WAKE2 inputs. Upon wake event, it transitions to Standby mode, re-enables V1, and executes a system reset - enabling battery-sensitive applications like keyless entry receivers or parked-mode sensors.
UJA1079TW/3V3/WD:1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 32-TSSOP (0.240", 6.10mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- -
- Interface:
- SPI Serial
- Voltage - Supply:
- 4.5V ~ 28V
- Supplier Device Package:
- 32-HTSSOP
- Grade:
- Automotive
- Qualification:
- -
- Mounting Type:
- Surface Mount
UJA1079TW/3V3/WD:1 FAQ
1.How can I place an order for UJA1079TW/3V3/WD:1 through Aetrix?
Please submit a Request for Quotation (RFQ) for UJA1079TW/3V3/WD:1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UJA1079TW/3V3/WD:1 reliable?
The price and inventory of UJA1079TW/3V3/WD:1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UJA1079TW/3V3/WD:1 is usually 5 days.
3.What payment methods are accepted for UJA1079TW/3V3/WD:1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UJA1079TW/3V3/WD:1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UJA1079TW/3V3/WD:1?
UJA1079TW/3V3/WD:1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UJA1079TW/3V3/WD:1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UJA1079TW/3V3/WD:1?
For technical support, including UJA1079TW/3V3/WD:1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UJA1079TW/3V3/WD:1 requirements.
6.How does Aetrix verify that UJA1079TW/3V3/WD:1 is sourced from the original manufacturer or authorized distributors?
All UJA1079TW/3V3/WD:1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UJA1079TW/3V3/WD:1 meets industry standards.
7.What is the process for return or replacement of UJA1079TW/3V3/WD:1?
All UJA1079TW/3V3/WD:1 units undergo pre-shipment inspection (PSI). If there is an issue with UJA1079TW/3V3/WD:1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UJA1079TW/3V3/WD:1 part is unused and in its original packaging.
Return procedure for UJA1079TW/3V3/WD:1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
UJA1079TW/3V3/WD:1 Tags
-
NVT4857UKAZ
NXP Semiconductors
-
TCA8418RTWR
Texas Instruments
-
PCA9546APWR
Texas Instruments
-
MD0100N8-G
Microchip Technology
-
PCA9548APW,118
NXP Semiconductors
-
PCA9540BDP,118
NXP Semiconductors
-
PCA9548APWR
Texas Instruments
-
PCA9546APW,118
NXP Semiconductors
-
PTN3360DBS,518
NXP Semiconductors
-
PCA9546ABS,118
NXP Semiconductors
-
PCA9518PWR
Texas Instruments
-
PCA9545APW,118
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
