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NXP Semiconductors UJA1131AHW/5/0Y
- Part No.:
- UJA1131AHW/5/0Y
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- NXP Semiconductors
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UJA1131AHW/5/0Y.pdf
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- UJA1131AHW/5/0Y
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Product details
Overview
UJA1131AHW/5/0Y from NXP Semiconductors is a buck/boost System Basis Chip (SBC) for automotive ECUs, integrating a 5 V/500 mA LDO regulator (V1), ISO 11898-2/6-compliant HS-CAN transceiver supporting up to 2 Mbit/s CAN FD data fields, dual LIN transceivers, and a switched-mode power supply with automatic buck or boost operation down to 2 V battery input. It delivers fail-safe microcontroller power, bus interface, HVIO control, and limp-home functionality in a single HTQFP48 package.
For engineers reviewing the UJA1131AHW/5/0Y datasheet, UJA1131AHW/5/0Y pinout, UJA1131AHW/5/0Y application, or UJA1131AHW/5/0Y equivalent, this SBC is selected for ECU designs requiring integrated power conversion, CAN FD–capable communication, dual-LIN support, low-voltage battery resilience, and configurable safety-critical behavior via non-volatile memory.
Technical Context
The UJA1131AHW/5/0Y implements a fully autonomous buck-boost SMPS that dynamically selects mode based on BAT voltage and load, enabling uninterrupted microcontroller operation during battery dips as low as 2 V. Its CAN transceiver complies with ISO 11898-2:201x and ISO 11898-6:2013, supporting partial networking and CAN FD–passive wake-up suppression.
This variant includes two LIN transceivers (LIN 2.x/SAE J2602 compliant), four high-voltage I/Os configurable as HS/LS drivers or wake-up inputs, and a 10-bit A/D converter for dual-channel battery monitoring. All configuration-including limp-home timing, watchdog window, and power mode transitions-is stored in non-volatile memory and controlled via 16-/24-/32-bit SPI.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Regulator V1 output | 5 V ±2 %, 500 mA continuous; supports 500 mA transient jumps in Standby mode |
| SMPS operation range | Buck or boost mode auto-selected; functional down to 2 V BAT input |
| CAN data rate | Up to 2 Mbit/s in CAN FD data field; ISO 11898-2:201x and ISO 11898-6:2013 compliant |
| LIN channels | Two independent LIN 2.x transceivers; downward compatible with LIN 1.3 |
| HVIO count & function | 4 general-purpose HVIO pins; individually configurable as HS/LS drivers or wake-up inputs with open-load/short-circuit diagnostics |
| Watchdog modes | Window, Timeout (with optional cyclic wake-up), and Off modes; period selectable from 8 ms to 4 s |
| Package | HTQFP48, 10 mm × 10 mm × 1.0 mm; exposed die pad thermally connected to GND |
Pinout & Package
UJA1131AHW/5/0Y is housed in a compact, thermally enhanced HTQFP48 package (SOT1181-2) with an exposed die pad internally connected to GND for PCB-level heat dissipation. Pin numbering follows standard QFP layout with pins 1–48 arranged clockwise from top-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BAT | Battery supply input | Main power source for LIN transceivers and A/D converter channel 0; withstands ±40 V transients per ISO 7637-3 |
| V1 | Main regulator output | 5 V ±2 %, 500 mA supply for microcontroller; shut down in Sleep mode; clamp limits reverse current to 50 mA |
| VCAN | CAN transceiver supply | 5 V dedicated supply for HS-CAN physical layer; enables independent biasing and noise isolation |
| CANH / CANL | CAN bus differential pair | ISO 11898-2-compliant high-speed interface; floating when BAT is off; supports CAN FD up to 2 Mbit/s |
| LIN1 / LIN2 | LIN bus lines | Dual independent LIN 2.x interfaces; integrated slave termination; SAE J2602 compliant |
| HVIO1–HVIO4 | High-voltage I/O terminals | Configurable as HS/LS drivers (RON < 24 Ω) or wake-up inputs; support limp-home outputs (HVIO2–HVIO4) and cyclic contact monitoring |
| RSTN | Bidirectional reset pin | Active-low reset I/O referenced to V1; programmable pulse length; triggered by watchdog overflow or V1 undervoltage |
| SCK / SDO / SDI / SCSN | SPI interface signals | 16-/24-/32-bit serial interface for configuration, diagnostics, and register access; supports daisy-chaining |
Key Features
| Feature | Design Value |
|---|---|
| Integrated buck-boost SMPS | Single external coil required; automatic mode switching ensures microcontroller supply continuity below 5 V battery input |
| CAN FD–passive partial networking | Eliminates false wake-ups during CAN FD traffic in Sleep/Standby; maintains compatibility with classic CAN nodes |
| Dual LIN transceivers | Independent LIN 2.x channels with integrated slave termination and optimized EMC emission shaping |
| Configurable limp-home outputs | HVIO2 (static HS), HVIO3 (100 Hz/10 %), HVIO4 (1.25 Hz/50 %) enable hardware-level fail-safe response without MCU intervention |
| Non-volatile configuration memory | Stores power-on behavior, watchdog settings, limp-home timing, and sleep mode enable/disable-retained across power cycles |
| Robust automotive protection | ±6 kV HBM/IEC 61000-4-2 ESD on CAN/LIN/HVIO/VEXT; ±40 V short-circuit proof bus pins; ISO 7637-3 transient immunity |
Applications
| Body Control Module (BCM) | Engine Control Unit (ECU) |
|---|---|
|
Use Scenario: Centralized power and communication management for door locks, lighting, and climate actuators in modern vehicle architectures. IC Role / Device Role / Timing Role: System Basis Chip providing regulated 5 V power to MCU, dual-LIN connectivity to sensors/actuators, and CAN FD gateway functionality. Use Value: Reduces BOM count by consolidating buck-boost SMPS, CAN/LIN transceivers, HVIOs, and watchdog into one HTQFP48 device with fail-safe limp-home signaling. |
Use Scenario: Power and bus interface for engine management systems operating under wide battery voltage ranges including cranking (< 6 V). IC Role / Device Role / Timing Role: Primary power controller delivering stable 5 V/500 mA to engine MCU while maintaining CAN FD communication during cold-start battery dips to 2 V. Use Value: Boost-mode SMPS sustains microcontroller operation during deep battery sag, preventing ECU reset and ensuring drivability continuity. |
| Advanced Driver Assistance Systems (ADAS) Sensor Hub | Electric Power Steering (EPS) Module |
|
Use Scenario: Aggregation node for radar, camera, and ultrasonic sensors communicating over LIN and CAN FD networks. IC Role / Device Role / Timing Role: Dual-LIN master coordinating multiple sensor sub-nodes; CAN FD transceiver relaying processed data at up to 2 Mbit/s to domain controller. Use Value: Enables deterministic sensor polling and low-latency CAN FD reporting using shared SPI-controlled configuration and synchronized wake-up events. |
Use Scenario: Safety-critical steering assist module requiring ASIL-B capable power sequencing, diagnostics, and fail-operational outputs. IC Role / Device Role / Timing Role: System basis chip supplying MCU and gate drivers; generating configurable limp-home signals (HVIO2–HVIO4) to maintain basic steering assist during faults. Use Value: Hardware-based limp-home timing eliminates software dependency, meeting ASIL-B diagnostic coverage requirements for EPS functional safety. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar System Basis Chip applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UJA1132HW/5V0 | Same buck/boost SMPS, 5 V/500 mA V1, dual LIN, 4 HVIOs; differs only in non-volatile memory default configuration and minor timing parameters | Identical functional scope; used where factory-programmed limp-home defaults differ or specific watchdog window values are required | Select UJA1132HW/5V0 if preconfigured limp-home timing or watchdog settings better match target ECU firmware initialization sequence. |
| TLE9471-2ES | Infineon SBC with 5 V/500 mA LDO, CAN FD transceiver (2 Mbit/s), single LIN, no boost capability; requires external boost for < 5 V operation | Lacks integrated boost mode and second LIN channel; suited for simpler nodes where battery never drops below 5 V and LIN count is one | Choose TLE9471-2ES only when boost functionality is unnecessary and LIN channel count is sufficient; verify external boost circuitry if battery dip resilience is needed. |
Compared with UJA1132HW/5V0, the UJA1131AHW/5/0Y offers identical core functionality but with distinct factory NVM settings affecting limp-home activation and watchdog timeout defaults; versus TLE9471-2ES, it provides native boost operation and dual LIN at the cost of higher integration complexity and pin count.
Availability
UJA1131AHW/5/0Y is available at Aetrix Electronics and suitable for automotive body control modules, engine control units, ADAS sensor hubs, and electric power steering systems requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for UJA1131AHW/5/0Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in automotive-grade power management and communication ICs.
The UJA113x product line was designed specifically for next-generation automotive Electronic Control Units needing integrated power conversion, CAN FD and dual-LIN communication, and hardware-enforced fail-safe behavior-all in a single compact package.
FAQ
What is the minimum battery voltage at which UJA1131AHW/5/0Y can sustain microcontroller operation?
The UJA1131AHW/5/0Y supports uninterrupted operation down to 2 V battery input via its integrated boost-mode SMPS. This capability ensures the 5 V/500 mA V1 regulator remains active during cranking events or deep discharge conditions, preserving MCU functionality without reset. Actual minimum voltage depends on load current and external coil selection per datasheet Section 2.2.
Does UJA1131AHW/5/0Y support CAN FD communication in both normal and partial networking modes?
Yes, UJA1131AHW/5/0Y supports CAN FD up to 2 Mbit/s in the data field and implements ISO 11898-6:2013–compliant partial networking with CAN FD–passive wake-up suppression. In Sleep/Standby mode, it ignores CAN FD traffic to prevent false wake-ups while remaining responsive to classic CAN messages-ideal for mixed CAN/CAN FD networks.
How many LIN transceivers does UJA1131AHW/5/0Y integrate, and are they independently configurable?
UJA1131AHW/5/0Y integrates two fully independent LIN 2.x transceivers (LIN1 and LIN2), each compliant with SAE J2602 and backward-compatible with LIN 1.3. They feature separate RX/TX pins, internal slave termination, and individual enable control via SPI-enabling simultaneous operation on distinct LIN subnets with different baud rates and protocols.
Can the limp-home outputs of UJA1131AHW/5/0Y be customized, and what timing options are available?
Yes, UJA1131AHW/5/0Y provides three dedicated limp-home outputs via HVIO2 (static high-side), HVIO3 (100 Hz, 10 % duty cycle), and HVIO4 (1.25 Hz, 50 % duty cycle). These are hardware-configured and stored in non-volatile memory, enabling fail-operational behavior without MCU involvement. Timing parameters are fixed per pin and cannot be altered post-configuration.
What protection features does UJA1131AHW/5/0Y offer for automotive bus and power pins?
UJA1131AHW/5/0Y provides ±40 V short-circuit proof CAN/LIN pins, ±6 kV HBM and IEC 61000-4-2 ESD protection on CAN/LIN/VEXT/HVIO, and ISO 7637-3 transient immunity on BAT and bus lines. The V1 regulator includes reverse-current clamping (≤6 V output under 50 mA injection) and loss-of-ground/loss-of-battery proof HVIOs with open-load diagnostics.
UJA1131AHW/5/0Y Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
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- -
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- Bulk
- Product Status:
- Active
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UJA1131AHW/5/0Y FAQ
1.How can I place an order for UJA1131AHW/5/0Y through Aetrix?
Please submit a Request for Quotation (RFQ) for UJA1131AHW/5/0Y on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UJA1131AHW/5/0Y reliable?
The price and inventory of UJA1131AHW/5/0Y are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UJA1131AHW/5/0Y is usually 5 days.
3.What payment methods are accepted for UJA1131AHW/5/0Y?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UJA1131AHW/5/0Y transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UJA1131AHW/5/0Y?
UJA1131AHW/5/0Y orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UJA1131AHW/5/0Y order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UJA1131AHW/5/0Y?
For technical support, including UJA1131AHW/5/0Y datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UJA1131AHW/5/0Y requirements.
6.How does Aetrix verify that UJA1131AHW/5/0Y is sourced from the original manufacturer or authorized distributors?
All UJA1131AHW/5/0Y products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UJA1131AHW/5/0Y meets industry standards.
7.What is the process for return or replacement of UJA1131AHW/5/0Y?
All UJA1131AHW/5/0Y units undergo pre-shipment inspection (PSI). If there is an issue with UJA1131AHW/5/0Y, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UJA1131AHW/5/0Y part is unused and in its original packaging.
Return procedure for UJA1131AHW/5/0Y:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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