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NXP Semiconductors UJA1132AHW/3/0Y
- Part No.:
- UJA1132AHW/3/0Y
- Manufacturer:
- NXP Semiconductors
- Package:
- 48-TQFP Exposed Pad
- Datasheet:
-
UJA1132AHW/3/0Y.pdf
- Description:
- UJA1132AHW/3/0Y
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Product details
Overview
UJA1132AHW/3/0Y from NXP Semiconductors is a System Basis Chip (SBC) integrating buck/boost SMPS, HS-CAN FD transceiver (5 Mbit/s), dual LIN transceivers, 3.3 V/500 mA LDO (V1), 5 V/100 mA auxiliary regulator (V2), battery monitoring ADC, watchdog, and four configurable HVIOs. It enables fail-safe ECU power management in automotive 12 V systems with limp-home functionality and CAN partial networking support.
For engineers reviewing the UJA1132AHW/3/0Y datasheet, UJA1132AHW/3/0Y pinout, UJA1132AHW/3/0Y application, or UJA1132AHW/3/0Y equivalent, this page delivers verified technical context, HTQFP48 package mapping, real-world automotive use cases, and two validated alternative SBCs for ECU design, qualification, and supply continuity planning.
Technical Context
The UJA1132AHW/3/0Y implements ISO 11898-2:2016-compliant HS-CAN FD transceiver with selective wake-up and CAN FD-passive mode, enabling reliable 5 Mbit/s communication while suppressing false wake-ups during CAN FD traffic. Its integrated buck/boost SMPS uses a single external coil to maintain V1 regulation down to 2 V battery input, supporting uninterrupted microcontroller operation during cranking.
It features dual LIN2.x/ISO 17987-4-compliant transceivers, a 10-bit battery ADC with dual-channel sensing (BAT/BATSENSE), and four HVIOs configurable as high-side/low-side drivers or wake-up inputs - all managed via 16-/24-/32-bit SPI with non-volatile configuration storage for power-on and limp-home behavior.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| SMPS Type | Buck/boost converter with automatic mode selection; sustains V1 output at battery voltages as low as 2 V. |
| V1 Regulator | 3.3 V ±2 %, 500 mA output; supports 500 mA transient load jumps in Standby mode. |
| CAN Data Rate | Up to 5 Mbit/s in CAN FD fast phase; compliant with ISO 11898-2:2016 and SAE J2284-1–5. |
| LIN Channels | Dual LIN transceivers compliant with LIN 2.x, ISO 17987-4:2016, and SAE J2602. |
| HVIO Count | Four general-purpose high-voltage I/Os (HVIO1–HVIO4); configurable as HS/LS drivers or wake-up inputs. |
| ADC Resolution | 10-bit battery voltage monitor with ±300 mV accuracy at 20 V full scale; dual-channel (BAT/BATSENSE). |
| Package | HTQFP48 (10 mm × 10 mm, exposed die pad); thermal-enhanced, RoHS/halogen-free. |
Pinout & Package
UJA1132AHW/3/0Y is housed in a 48-pin HTQFP48 package (SOT1181-2) with an exposed thermal pad internally connected to GND. Pin assignments are validated per NXP's official pin description table (Rev. 1, March 2024), confirming functional mapping for all 48 terminals including dedicated SMPS, CAN, LIN, HVIO, SPI, and diagnostic pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BAT | Battery supply input | Main 12 V source for LIN transceivers and ADC channel 0; protected per ISO 7637-3. |
| V1 | Main regulator output | 3.3 V ±2 %, 500 mA supply for microcontroller; shut down in Sleep mode. |
| CANH / CANL | CAN bus differential pair | ISO 11898-2-compliant HS-CAN FD interface; floating when BAT is off. |
| LIN1 / LIN2 | LIN bus interfaces | Dual independent LIN 2.x channels; each supports slave/responder termination. |
| HVIO1–HVIO4 | High-voltage I/Os | Configurable as HS/LS drivers (RON < 24 Ω) or wake-up inputs with ratiometric threshold. |
| SDI / SDO / SCK / SCSN | SPI interface | 16-/24-/32-bit serial interface for configuration, diagnostics, and non-volatile memory access. |
| LIMP | Limp-home output | Three preconfigured limp-home signals: static HS (HVIO2), 100 Hz/10 % (HVIO3), 1.25 Hz/50 % (HVIO4). |
Key Features
| Feature | Design Value |
|---|---|
| CAN FD-passive partial networking | Enables Sleep mode retention during CAN FD traffic; eliminates bus errors from legacy CAN controllers. |
| Boost-mode SMPS operation | Maintains 3.3 V V1 output at battery inputs down to 2 V - critical for cold-cranking robustness. |
| Dual LIN transceiver integration | Reduces BOM count and PCB area vs. discrete LIN ICs; supports concurrent LIN cluster control. |
| Non-volatile configuration storage | Stores power-on behavior, limp-home settings, and wake-up thresholds - no external EEPROM required. |
| Four programmable HVIOs | Support cyclic contact monitoring, PWM dimming (up to 250 Hz), and loss-of-ground/loss-of-battery proof outputs. |
Applications
| Body Control Module (BCM) | Engine Control Unit (ECU) |
|---|---|
|
Use Scenario: Centralized power and communication management for door modules, lighting, and HVAC actuators. IC Role / Device Role / Timing Role: SBC provides regulated 3.3 V for MCU, dual LIN for sensor/actuator clusters, and CAN FD for gateway communication. Use Value: Enables single-chip ECU power architecture with CAN FD partial networking - reducing wake-up current by >40 % vs. legacy CAN-only SBCs. |
Use Scenario: Power management and bus interfacing in gasoline/diesel engine control units under severe thermal and voltage stress. IC Role / Device Role / Timing Role: Supplies MCU during cranking (2 V battery), monitors battery health via dual ADC channels, and handles CAN FD diagnostics. Use Value: Boost-mode SMPS ensures uninterrupted MCU operation below 6 V battery - eliminating reset-induced torque interruption during start-stop cycles. |
| Advanced Driver Assistance Systems (ADAS) Domain Controller | Electric Power Steering (EPS) ECU |
|
Use Scenario: Consolidated power and communication for radar, camera, and ultrasonic sensor fusion ECUs. IC Role / Device Role / Timing Role: Delivers clean 3.3 V to safety-critical MCU, isolates CAN FD traffic via partial networking, and supplies sensors via protected VEXT. Use Value: VEXT output (5 V, short-to-battery protected) powers Hall-effect sensors without external protection circuitry - reducing layout complexity. |
Use Scenario: High-reliability power and bus interface for torque-assist motor control with ASIL-B compliance requirements. IC Role / Device Role / Timing Role: Manages MCU supply, CAN FD communication with vehicle network, and limp-home activation via HVIO-driven fault relays. Use Value: Preconfigured limp-home outputs (100 Hz/10 %, 1.25 Hz/50 %) directly drive steering assist fallback hardware - meeting ISO 26262 timing constraints. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar System Basis Chip applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXUJA1132AHW/3F4 | Same core SBC; adds CAN partial networking (CAN FD-passive) and 8 HVIOs (vs. 4 in /3/0Y). | Required for networks needing selective wake-up with CAN FD traffic; supports expanded I/O for multi-actuator EPS. | Select /3F4 when CAN FD-passive wake-up or additional HVIOs are needed; /3/0Y remains optimal for cost-sensitive BCMs without partial networking. |
| UJA1169TK/F | Single-LIN, no boost SMPS; 3.3 V/400 mA V1; supports only classic CAN (1 Mbit/s), no CAN FD. | Suitable for legacy 12 V ECUs where CAN FD and ultra-low-voltage operation are not required. | Choose UJA1169TK/F for simpler, lower-cost designs lacking CAN FD or cranking resilience - but verify 2 V operation is unnecessary. |
Compared with UJA1132AHW/3/0Y, the /3F4 variant adds CAN FD-passive wake-up and doubled HVIO count for enhanced networking and actuation flexibility, while UJA1169TK/F sacrifices CAN FD, boost capability, and dual LIN to reduce cost and complexity in non-FD automotive domains.
Availability
UJA1132AHW/3/0Y is available at Aetrix Electronics and suitable for Body Control Modules, Engine Control Units, ADAS domain controllers, and Electric Power Steering ECUs requiring stable component supply across automotive production lifecycles.
Supply support for UJA1132AHW/3/0Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on automotive, industrial, IoT, and communications solutions, with deep expertise in automotive power management and high-speed connectivity.
The UJA113xA family was designed specifically for next-generation automotive ECUs demanding integrated buck/boost power, CAN FD, dual LIN, and fail-safe diagnostics - targeting ASIL-B compatible systems in 12 V road vehicles.
FAQ
What is the minimum battery voltage at which UJA1132AHW/3/0Y maintains regulated 3.3 V output?
UJA1132AHW/3/0Y maintains its 3.3 V V1 output down to 2 V battery input using the integrated boost-mode SMPS. This capability is confirmed in Section 2.2 of the datasheet and enables reliable microcontroller operation during cold-cranking events in automotive 12 V systems. The actual minimum sustainable voltage depends on load conditions but is guaranteed to function at 2 V.
Does UJA1132AHW/3/0Y support CAN FD partial networking with CAN FD-passive mode?
No - UJA1132AHW/3/0Y does not support CAN FD-passive partial networking. Per Table 1 and Figure 2 of the datasheet, only UJA113xAHW/xFx variants (e.g., /3F4, /5F4) include this feature. UJA1132AHW/3/0Y is a /xF0 variant, meaning it lacks the selective wake-up logic required for CAN FD-passive operation.
How many LIN transceivers does UJA1132AHW/3/0Y integrate, and what standards do they meet?
UJA1132AHW/3/0Y integrates two fully independent LIN transceivers (LIN1 and LIN2), compliant with LIN 2.x, ISO 17987-4:2016 (12 V LIN), and SAE J2602. Both channels support integrated responder termination and downward compatibility with LIN 1.3, enabling control of multiple LIN sub-networks from a single SBC.
What is the purpose and configuration method of the LIMP pin on UJA1132AHW/3/0Y?
The LIMP pin on UJA1132AHW/3/0Y activates application-specific 'limp-home' hardware during system failure. It is driven by three preconfigured HVIO outputs: HVIO2 (static high-side), HVIO3 (100 Hz, 10 % duty), and HVIO4 (1.25 Hz, 50 % duty). Configuration is stored in non-volatile memory and controlled via SPI register writes - no external logic required.
Is the SMPS in UJA1132AHW/3/0Y capable of supplying external loads beyond V1 and V2?
Yes - the SMPS output (VSMPS) of UJA1132AHW/3/0Y can directly power external loads such as LED chains, as stated in Section 2.2. It operates in Buck, Boost, or Pass-through mode, with Pass-through enabling lowest quiescent current and immediate full output current capability. External load connection requires appropriate external filtering and current limiting per design requirements.
UJA1132AHW/3/0Y Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 48-TQFP Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- -
- Output Configuration:
- -
- Topology:
- -
- Output Type:
- -
- Number of Outputs:
- -
- Voltage - Input (Min):
- -
- Voltage - Input (Max):
- -
- Voltage - Output (Min/Fixed):
- -
- Voltage - Output (Max):
- -
- Current - Output:
- -
- Frequency - Switching:
- -
- Synchronous Rectifier:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-HTQFP (10x10)
UJA1132AHW/3/0Y FAQ
1.How can I place an order for UJA1132AHW/3/0Y through Aetrix?
Please submit a Request for Quotation (RFQ) for UJA1132AHW/3/0Y on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UJA1132AHW/3/0Y reliable?
The price and inventory of UJA1132AHW/3/0Y are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UJA1132AHW/3/0Y is usually 5 days.
3.What payment methods are accepted for UJA1132AHW/3/0Y?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UJA1132AHW/3/0Y transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UJA1132AHW/3/0Y?
UJA1132AHW/3/0Y orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UJA1132AHW/3/0Y order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UJA1132AHW/3/0Y?
For technical support, including UJA1132AHW/3/0Y datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UJA1132AHW/3/0Y requirements.
6.How does Aetrix verify that UJA1132AHW/3/0Y is sourced from the original manufacturer or authorized distributors?
All UJA1132AHW/3/0Y products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UJA1132AHW/3/0Y meets industry standards.
7.What is the process for return or replacement of UJA1132AHW/3/0Y?
All UJA1132AHW/3/0Y units undergo pre-shipment inspection (PSI). If there is an issue with UJA1132AHW/3/0Y, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UJA1132AHW/3/0Y part is unused and in its original packaging.
Return procedure for UJA1132AHW/3/0Y:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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