NXP Semiconductors UJA1132AHW/5/0Y
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UJA1132AHW/5/0Y.pdf
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Product details
Overview
UJA1132AHW/5/0Y from NXP Semiconductors is a System Basis Chip (SBC) integrating buck/boost SMPS, HS-CAN FD transceiver (up to 5 Mbit/s), dual LIN transceivers, 5 V/500 mA LDO (V1), 5 V/100 mA auxiliary regulator (V2), battery monitoring ADC, watchdog, and 4 configurable HVIOs. It enables automotive ECU power management, communication, and fail-safe control in 12 V systems.
For engineers reviewing the UJA1132AHW/5/0Y datasheet, UJA1132AHW/5/0Y pinout, UJA1132AHW/5/0Y application, or UJA1132AHW/5/0Y equivalent, this page delivers verified technical context on CAN FD partial networking support, boost-mode operation down to 2 V, limp-home output configuration, SPI-controlled power modes, and HTQFP48 thermal performance - all critical for automotive ECU design validation and BOM selection.
Technical Context
The UJA1132AHW/5/0Y implements ISO 11898-2:2016-compliant CAN FD transceiver with selective wake-up and CAN FD-passive mode, enabling reliable 5 Mbit/s data-field communication while suppressing false wake-ups during CAN FD traffic. Its integrated buck/boost SMPS uses a single external coil to maintain V1 regulation during battery dips as low as 2 V, with automatic mode switching and soft-start.
It features dual LIN2.x/ISO 17987-4-compliant transceivers, 10-bit battery ADC with dual-channel monitoring (BAT/BATSENSE), four HVIOs configurable as HS/LS drivers or wake inputs with open-load diagnostics, and non-volatile memory for persistent limp-home behavior and power-on configuration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| SMPS Type | Buck/boost converter with automatic mode selection; sustains microcontroller supply at battery voltages ≥2 V. |
| V1 Regulator | 5 V ±2 %, 500 mA output; supports 500 mA transient load jumps in Standby mode; undervoltage reset with selectable 60–90 % threshold. |
| CAN Data Rate | Up to 5 Mbit/s in CAN FD data field; compliant with ISO 11898-2:2016 and SAE J2284-1 to -5. |
| LIN Channels | Dual LIN transceivers compliant with LIN 2.x, ISO 17987-4:2016, and SAE J2602; downward compatible with LIN 1.3. |
| HVIO Count | 4 high-voltage I/Os (HVIO1–HVIO4); individually configurable as HS/LS drivers or wake inputs with ratiometric threshold and ground-offset tolerance up to 2.5 V. |
| Power Modes | Normal, Standby (V1 active), Sleep (V1 off), Off, Overload, and Forced Sleep Preparation (FSP); controlled via SPI with non-volatile Sleep enable/disable. |
| Package | HTQFP48 (10 mm × 10 mm, exposed die pad); RoHS-compliant, halogen-free, thermal resistance optimized for automotive under-hood use. |
Pinout & Package
UJA1132AHW/5/0Y is housed in a 48-pin HTQFP48 package (SOT1181-2) with 10 mm × 10 mm footprint, 1.0 mm height, and thermally enhanced exposed die pad internally connected to GND. The package supports high-power dissipation in automotive environments and requires PCB-level GND connection to the exposed pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BAT | Battery supply input | Main 12 V source for LIN transceivers and ADC channel 0; protected per ISO 7637-3. |
| V1 | Main regulator output | 5 V ±2 %, 500 mA supply for microcontroller; disabled in Sleep mode. |
| VCAN | CAN transceiver supply | 5 V dedicated supply for HS-CAN physical layer; decoupled separately for EMC robustness. |
| CANH / CANL | CAN bus interface | ISO 11898-2-compliant differential outputs; ±40 V short-circuit proof; floating when BAT is off. |
| LIN1 / LIN2 | LIN bus interfaces | Dual 12 V LIN physical layers; integrated termination; compliant with SAE J2602 and ISO 17987-4. |
| HVIO1–HVIO4 | Configurable HV I/Os | Individually settable as HS/LS drivers or wake inputs; support limp-home signals (HVIO2 static, HVIO3 100 Hz/10 %, HVIO4 1.25 Hz/50 %). |
| RSTN | Bidirectional reset | Reset input/output referenced to V1; triggered by watchdog overflow or V1 undervoltage; configurable pulse length. |
| LIMP | Limp-home output | Active-low signal for activating fail-safe hardware; driven LOW in Overload and FSP modes. |
| SCK / SDI / SDO / SCSN | SPI interface | 16-/24-/32-bit SPI for configuration, diagnostics, and register access; supports wake-up source reporting. |
| INTN1 / INTN2 | Interrupt outputs | INTN1: all interrupts; INTN2: high-priority only (e.g., overtemperature, CAN/LIN wake); individually maskable. |
| BATSENSE | Battery sense input | ADC channel 1 input for measuring battery voltage across polarity protection diode; enables accurate low-side sensing. |
| EN | Enable output | Controls safety-critical external hardware; asserted LOW if microcontroller fails or watchdog expires. |
Key Features
| Feature | Design Value |
|---|---|
| CAN FD Partial Networking | ISO 11898-2:2016-compliant selective wake-up with CAN FD-passive mode; eliminates false wake-ups during CAN FD traffic at 50–1000 kbit/s. |
| Buck/Boost SMPS | Single-coil architecture with automatic mode switching; maintains V1 regulation during battery dips to 2 V; supports Pass-through mode for lowest quiescent current. |
| Limp-Home Functionality | Three programmable limp-home outputs (HVIO2–HVIO4) with fixed timing profiles; configurable via non-volatile memory for application-specific fail-safe response. |
| Battery Monitoring ADC | 10-bit, ±300 mV accuracy at 20 V full scale; dual-channel (BAT/BATSENSE); supports undervoltage/overvoltage interrupt and shutdown. |
| HVIO Diagnostics | Per-pin open-load detection, short-circuit protection, and diagnostics; wake-up threshold tolerant of ±2.5 V ground offset. |
| EMC & Robustness | ±6 kV HBM ESD on CAN/LIN pins; ±6 kV IEC 61000-4-2 on CAN/LIN/VEXT/HVIO; ±40 V short-circuit proof; ISO 7637-3 transient protection. |
Applications
| Body Control Module (BCM) | Engine Control Unit (ECU) |
|---|---|
|
Use Scenario: Centralized power and communication management for door locks, lighting, and climate actuators in modern vehicle body networks. IC Role / Device Role / Timing Role: UJA1132AHW/5/0Y serves as primary SBC - supplying MCU, managing CAN FD backbone and dual LIN subnets, and executing limp-home lighting sequences upon fault detection. Use Value: Enables single-chip integration of power, CAN FD, dual LIN, and fail-safe I/O - reducing component count and improving system-level EMC in space-constrained BCM designs. |
Use Scenario: Power and communication interface for engine management systems requiring robust operation during cranking (battery dip to 6 V) and cold-start conditions. IC Role / Device Role / Timing Role: UJA1132AHW/5/0Y acts as ECU system basis chip - regulating 5 V MCU supply via boost mode during 2–6 V battery dips, monitoring battery health, and relaying sensor data over LIN. Use Value: Maintains uninterrupted MCU operation and sensor communication during extreme battery transients, eliminating brown-out resets and ensuring ASIL-B functional safety compliance. |
| Advanced Driver Assistance Systems (ADAS) Domain Controller | Electric Power Steering (EPS) Control Unit |
|
Use Scenario: Central domain controller aggregating radar, camera, and ultrasonic sensor data via CAN FD, with LIN-connected peripheral modules (e.g., mirror controls). IC Role / Device Role / Timing Role: UJA1132AHW/5/0Y provides regulated power, CAN FD communication stack interface, and dual LIN connectivity - while supporting partial networking to keep non-critical sensors asleep during high-bandwidth CAN FD bursts. Use Value: Reduces system-wide power consumption by enabling CAN FD-passive sleep for LIN peripherals during active ADAS processing - extending battery life in always-on architectures. |
Use Scenario: Safety-critical steering assist module requiring fail-operational behavior and diagnostic coverage for torque motor drivers and position sensors. IC Role / Device Role / Timing Role: UJA1132AHW/5/0Y functions as EPS SBC - delivering 5 V/500 mA to MCU, monitoring battery integrity, asserting LIMP signal to mechanical fallback path, and enabling cyclic contact monitoring via HVIO PWM timers. Use Value: Provides certified limp-home output timing (100 Hz/10 %, 1.25 Hz/50 %) and open-load diagnostics on HVIOs - meeting ISO 26262 ASIL-C requirements for EPS functional safety. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar System Basis Chip applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UJA1132AHW/5F4 | Includes 8 HVIOs (vs. 4) and full CAN partial networking support (CAN FD-passive); same SMPS, V1/V2, dual LIN, and HTQFP48 package. | Required where additional HVIOs are needed for multi-actuator control or extended limp-home signaling beyond 3 outputs. | Select UJA1132AHW/5F4 when 8 HVIOs and full partial networking are required; UJA1132AHW/5/0Y is optimal for cost-sensitive 4-HVIO designs without F4 feature set. |
| TLE9471-2ES | Infineon SBC with 5 V/500 mA LDO, CAN FD transceiver (2 Mbit/s), single LIN, no boost capability, and 55-pin TQFP package. | Lacks boost functionality and dual LIN; suitable for simpler ECUs where battery dips >6 V are not expected and LIN count is ≤1. | Choose TLE9471-2ES for legacy CAN FD designs without boost requirement or dual-LIN needs; UJA1132AHW/5/0Y is preferred for 2 V–16 V battery range and dual-LIN topology. |
Compared with UJA1132AHW/5F4, the UJA1132AHW/5/0Y reduces pin count and HVIO count while retaining identical CAN FD partial networking, SMPS boost capability, and dual LIN - making it ideal for compact, cost-optimized automotive ECUs. Against TLE9471-2ES, it adds critical boost-mode resilience and dual-LIN flexibility at the expense of Infineon's higher-integration safety monitor features.
Availability
UJA1132AHW/5/0Y is available at Aetrix Electronics and suitable for automotive Body Control Modules, Engine Control Units, ADAS domain controllers, and Electric Power Steering systems requiring stable component supply, AEC-Q100 qualification, and long-term automotive lifecycle support.
Supply support for UJA1132AHW/5/0Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in automotive-grade power management and communication ICs.
The UJA1132AHW/5/0Y belongs to NXP's UJA113xA System Basis Chip family, designed specifically for next-generation automotive ECUs requiring integrated buck/boost power conversion, CAN FD + dual LIN communication, and fail-safe limp-home functionality in compact 12 V systems.
FAQ
What is the minimum battery voltage at which UJA1132AHW/5/0Y can sustain microcontroller operation?
The UJA1132AHW/5/0Y maintains regulated 5 V output to the microcontroller down to a battery voltage of 2 V using its integrated boost converter. This capability is confirmed in the datasheet Section 2.2 and enables uninterrupted operation during severe cranking events. The actual minimum sustainable voltage depends on output load conditions but is guaranteed functional at 2 V with typical loads. UJA1132AHW/5/0Y achieves this without external semiconductors - only a single coil and capacitors are required.
Does UJA1132AHW/5/0Y support CAN FD partial networking, and how does it prevent false wake-ups?
Yes, UJA1132AHW/5/0Y supports ISO 11898-2:2016-compliant CAN FD partial networking with CAN FD-passive mode. In Sleep/Standby, it ignores CAN FD traffic while remaining responsive to classic CAN wake-up frames at bit rates of 50–1000 kbit/s. This prevents false wake-ups because the transceiver does not attempt to decode or respond to FD-format messages - only standard CAN identifiers trigger wake. UJA1132AHW/5/0Y implements this natively in hardware without firmware intervention.
How many LIN transceivers does UJA1132AHW/5/0Y integrate, and what standards do they meet?
UJA1132AHW/5/0Y integrates two fully independent LIN transceivers (LIN1 and LIN2), both compliant with LIN 2.x, ISO 17987-4:2016 (12 V LIN), and SAE J2602. They are downward compatible with LIN 1.3 and include integrated responder termination. Unlike variants with "F0" suffix, UJA1132AHW/5/0Y exposes both LIN channels externally - confirmed in Table 1 and Figure 2 of the datasheet. Each supports standard LIN bus biasing and diagnostics.
What are the limp-home output configurations supported by UJA1132AHW/5/0Y?
UJA1132AHW/5/0Y supports three dedicated limp-home outputs via HVIO2, HVIO3, and HVIO4: HVIO2 operates as a static high-side driver signal; HVIO3 delivers a 100 Hz square wave with 10 % duty cycle; HVIO4 delivers a 1.25 Hz square wave with 50 % duty cycle. These are fixed-frequency, factory-configurable outputs stored in non-volatile memory and activated automatically in Overload or FSP mode. UJA1132AHW/5/0Y does not support user-defined limp-home timing profiles.
Is UJA1132AHW/5/0Y qualified for automotive use, and what package does it use?
Yes, UJA1132AHW/5/0Y is qualified per AEC-Q100 Grade 1 (−40 °C to +125 °C ambient) and packaged in HTQFP48 (SOT1181-2) - a 10 mm × 10 mm thermally enhanced quad flat package with exposed die pad. The package meets RoHS and halogen-free requirements and is optimized for automotive under-hood thermal performance. Pin compatibility and electrical specs are validated across temperature and voltage extremes per ISO/TS 16949 processes.
UJA1132AHW/5/0Y Specifications
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- NXP Semiconductors
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- Bulk
- Product Status:
- Active
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UJA1132AHW/5/0Y FAQ
1.How can I place an order for UJA1132AHW/5/0Y through Aetrix?
Please submit a Request for Quotation (RFQ) for UJA1132AHW/5/0Y on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UJA1132AHW/5/0Y reliable?
The price and inventory of UJA1132AHW/5/0Y are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UJA1132AHW/5/0Y is usually 5 days.
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Once your UJA1132AHW/5/0Y order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UJA1132AHW/5/0Y?
For technical support, including UJA1132AHW/5/0Y datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UJA1132AHW/5/0Y requirements.
6.How does Aetrix verify that UJA1132AHW/5/0Y is sourced from the original manufacturer or authorized distributors?
All UJA1132AHW/5/0Y products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UJA1132AHW/5/0Y meets industry standards.
7.What is the process for return or replacement of UJA1132AHW/5/0Y?
All UJA1132AHW/5/0Y units undergo pre-shipment inspection (PSI). If there is an issue with UJA1132AHW/5/0Y, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UJA1132AHW/5/0Y part is unused and in its original packaging.
Return procedure for UJA1132AHW/5/0Y:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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