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NXP Semiconductors UJA1132AHW/5F4/0Y
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- UJA1132AHW/5F4/0Y
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- NXP Semiconductors
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UJA1132AHW/5F4/0Y.pdf
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- UJA1132AHW/5F4/0Y
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Product details
Overview
UJA1132AHW/5F4/0Y from NXP Semiconductors is a buck/boost System Basis Chip (SBC) for automotive ECUs, integrating an ISO 11898-2:2016 HS-CAN transceiver (up to 5 Mbit/s), dual LIN transceivers, 5 V/500 mA LDO (V1), 5 V/100 mA auxiliary regulator (V2), and a configurable SMPS with automatic buck/boost operation down to 2 V input. It supports CAN FD-passive partial networking and delivers limp-home functionality via HVIO pins for fail-safe operation in powertrain and body control modules.
For engineers reviewing the UJA1132AHW/5F4/0Y datasheet, UJA1132AHW/5F4/0Y pinout, UJA1132AHW/5F4/0Y application, or UJA1132AHW/5F4/0Y equivalent, this page provides verified technical context on its dual-LIN interface, SMPS pre-regulator behavior, HVIO configuration options, CAN FD passive wake-up timing (50–1000 kbit/s), and non-volatile limp-home setup - all critical for ECU power architecture validation and ASIL-B system design.
Technical Context
The UJA1132AHW/5F4/0Y implements a fully autonomous buck/boost SMPS that dynamically selects mode based on BAT voltage and load, sustaining microcontroller supply at ≥500 mA even during 2 V battery dips. Its CAN transceiver complies with ISO 11898-2:2016 and supports CAN FD-passive selective wake-up at six discrete bit rates (50–1000 kbit/s), eliminating false wake-ups during CAN FD traffic.
This variant includes two LIN transceivers compliant with ISO 17987-4:2016 and SAE J2602, plus four HVIOs configurable as high-side/low-side drivers or wake-up inputs - with three dedicated limp-home outputs (static, 100 Hz/10%, 1.25 Hz/50%). All configuration and diagnostics are managed via 16-/24-/32-bit SPI with non-volatile memory storage.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| SMPS Input Range | 2 V to 18 V - enables uninterrupted MCU operation during cold-crank or deep battery dip events without external boost circuitry. |
| CAN Data Rate | Up to 5 Mbit/s in CAN FD fast phase - supports high-bandwidth firmware updates and sensor fusion over HS-CAN. |
| V1 Regulator Output | 5 V ±2 % / 500 mA - powers main MCU core with transient capability of 500 mA jump in Standby mode. |
| LIN Channels | Dual - supports independent LIN clusters (e.g., door module + seat control) with integrated responder termination. |
| HVIO Count & Function | 4 pins - individually configurable as HS/LS drivers or wake-up inputs; three support limp-home signaling (static, 100 Hz, 1.25 Hz). |
| CAN Partial Networking | ISO 11898-2:2016 compliant with CAN FD-passive - allows classic CAN nodes to remain asleep during CAN FD communication without bus errors. |
| Package | HTQFP48 (10 mm × 10 mm) - thermal-enhanced exposed pad for automotive under-hood thermal management. |
Pinout & Package
UJA1132AHW/5F4/0Y uses the HTQFP48 package (SOT1181-2), featuring a 10 mm × 10 mm body with exposed die pad thermally connected to GND. Pin count is 48, with GND connections at pins 4, 23, and 45 for low-impedance return paths.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BAT | Battery supply input (12 V system) | Primary power source for LIN transceivers and ADC channel 0; protected per ISO 7637-3. |
| V1 | Main LDO output | 5 V ±2 % regulated supply for MCU core; shuts off in Sleep mode to minimize quiescent current. |
| CANH / CANL | HS-CAN bus differential pair | ISO 11898-2:2016-compliant physical layer; ±40 V short-circuit proof; floating when BAT is off. |
| LIN1 / LIN2 | Dual LIN bus interfaces | Each supports LIN 2.x/ISO 17987-4:2016; integrated termination eliminates external resistors. |
| HVIO1–HVIO4 | High-voltage I/O bank | Configurable as HS/LS drivers or wake-up inputs; support open-load/short-circuit diagnostics and limp-home modes. |
| LIMP | Limp-home output | Active-low signal activated during Overload or FSP mode; drives external fail-safe hardware (e.g., relay, indicator LED). |
| SCK / SDI / SDO / SCSN | SPI interface | 16-/24-/32-bit serial interface for configuration, status readback, and non-volatile memory programming. |
Key Features
| Feature | Design Value |
|---|---|
| Automatic Buck/Boost SMPS | Single-coil topology with soft-start and pass-through mode; pre-regulates V1/V2 to eliminate ripple and improve transient response. |
| CAN FD-Passive Wake-up | Selective frame detection at 50/100/125/250/500/1000 kbit/s - prevents spurious wake-up during CAN FD data field transmission. |
| Dual LIN Transceivers | Fully compliant with ISO 17987-4:2016 and SAE J2602; downward compatible with LIN 1.3; optimized EMC emission profile. |
| Four Configurable HVIOs | Support combined driver capability, reverse-current protection, loss-of-ground/battery proofing, and cyclic contact monitoring via PWM timers. |
| Non-Volatile Limp-Home Setup | Three fixed limp-home signals (static, 100 Hz/10%, 1.25 Hz/50%) stored in MTPNV memory - ensures deterministic fail-safe behavior across power cycles. |
Applications
| Powertrain Control Unit | Body Control Module |
|---|---|
Use Scenario: Engine ECU managing fuel injection, ignition timing, and OBD-II diagnostics in 12 V vehicle architecture. IC Role / Device Role / Timing Role: Central SBC providing regulated 5 V/500 mA power, HS-CAN FD communication up to 5 Mbit/s, dual-LIN for throttle and pedal sensors, and limp-home activation during overtemperature fault. Use Value: Maintains MCU operation during 2 V cold-crank events via boost mode; CAN FD-passive avoids wake-up conflicts in mixed CAN FD/classic CAN networks. |
Use Scenario: Integrated BCM controlling lighting, door locks, and window lifters with fail-safe fallback. IC Role / Device Role / Timing Role: Dual-LIN interface manages distributed LIN slaves (e.g., mirror control, seat position); HVIOs drive high-side relays for headlight switching and report open-load faults. Use Value: Four HVIOs enable direct control of 12 V loads with diagnostics; limp-home outputs activate hazard flashers or interior lights during system failure. |
| Advanced Driver Assistance Systems | Electric Power Steering |
Use Scenario: Radar ECU requiring low-noise power, robust CAN communication, and deterministic wake-up for object detection. IC Role / Device Role / Timing Role: Supplies 5 V/500 mA to radar SoC; isolates CAN FD traffic via partial networking to prevent unintended wake-up of non-FD nodes. Use Value: SMPS pre-regulation ensures <10 mV ripple on V1, critical for analog front-end stability; ±6 kV HBM ESD on CAN pins protects against board-level discharge events. |
Use Scenario: EPS controller needing fail-operational power delivery and torque feedback via LIN. IC Role / Device Role / Timing Role: Dual-LIN connects torque sensor and motor driver; HVIOs monitor contact integrity in safety-critical switch circuits using cyclic PWM sampling. Use Value: HVIO wake-up threshold tolerates ±2.5 V ground offset - essential for noisy motor environments; LIMP pin triggers mechanical steering fallback path. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive SBC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UJA1132AHW/5F0 | Omits CAN partial networking and CAN FD-passive wake-up; no HVIO5–HVIO8 support. | Suitable for cost-sensitive body electronics where full CAN FD network coexistence is not required. | Select only if CAN FD-passive and 4-HVIO limp-home are unnecessary; shares same SMPS, V1/V2, and dual-LIN specs. |
| UJA1162ATW/5V | Single-LIN variant; lacks second LIN transceiver and HVIO bank; uses different SMPS architecture (no boost below 4.5 V). | Targeted at simpler gateway or sensor hub designs without dual-LIN or ultra-low-voltage boost needs. | Choose when dual-LIN and sub-4.5 V boost capability are not needed; offers lower pin count and reduced BOM cost. |
Compared with UJA1132AHW/5F4/0Y, UJA1132AHW/5F0 removes CAN FD-passive and reduces HVIO flexibility but retains identical power regulation and dual-LIN compliance, while UJA1162ATW/5V sacrifices both LIN channels and boost capability for gateways where CAN-only communication suffices.
Availability
UJA1132AHW/5F4/0Y is available at Aetrix Electronics and suitable for automotive powertrain control units, body control modules, ADAS radar ECUs, and electric power steering systems requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for UJA1132AHW/5F4/0Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in automotive-grade power management and communication ICs.
The UJA113xA family was designed specifically for next-generation automotive ECUs requiring integrated buck/boost power conversion, dual-LIN support, CAN FD compatibility, and fail-safe limp-home functionality - targeting ASIL-B system compliance in body, chassis, and powertrain domains.
FAQ
What is the minimum battery voltage at which UJA1132AHW/5F4/0Y can sustain 5 V/500 mA output?
The UJA1132AHW/5F4/0Y maintains 5 V/500 mA output down to 2 V battery input via its integrated boost converter. This capability is validated under load conditions specified in the datasheet and enables reliable operation during severe cold-crank events in 12 V automotive systems. The SMPS automatically transitions between buck and boost modes without microcontroller intervention, ensuring continuous V1 supply to the MCU.
Does UJA1132AHW/5F4/0Y support CAN FD communication in both Normal and Sleep modes?
UJA1132AHW/5F4/0Y supports full CAN FD active communication (up to 5 Mbit/s) only in Normal mode. In Sleep mode, the CAN transceiver is disabled. However, it supports CAN FD-passive selective wake-up in Standby mode at six discrete bit rates (50–1000 kbit/s), allowing the device to remain asleep during CAN FD traffic while responding only to valid wake-up frames - a key feature for energy-efficient partial networking.
How many LIN transceivers does UJA1132AHW/5F4/0Y integrate, and what standards do they meet?
UJA1132AHW/5F4/0Y integrates two fully independent LIN transceivers compliant with ISO 17987-4:2016 (12 V LIN), SAE J2602, and backward-compatible with LIN 1.3. Each includes integrated responder termination and optimized curve shaping for improved EMC emission performance - eliminating need for external termination resistors and reducing board space in multi-sensor automotive nodes.
Can the HVIO pins on UJA1132AHW/5F4/0Y be used for both driving loads and wake-up detection?
Yes - each of the four HVIO pins (HVIO1–HVIO4) on UJA1132AHW/5F4/0Y is individually configurable as either a high-side/low-side driver or a wake-up input via SPI register settings. Wake-up inputs support selectable edge (rising/falling) and ratiometric/absolute threshold detection, with tolerance for up to ±2.5 V ground offset - making them suitable for noisy automotive switch interfaces.
What is the function of the LIMP pin on UJA1132AHW/5F4/0Y, and how is it activated?
The LIMP pin on UJA1132AHW/5F4/0Y is an active-low fail-safe output that activates during Overload or Forced Sleep Preparation (FSP) modes. It is driven LOW automatically when overtemperature, overvoltage, or repeated reset failures occur. Its behavior - including static, 100 Hz/10%, or 1.25 Hz/50% limp-home signals - is configured and stored in non-volatile memory, ensuring deterministic response across power cycles without MCU involvement.
UJA1132AHW/5F4/0Y Specifications
- Product attributes
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- Manufacturer:
- NXP Semiconductors
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- Bulk
- Product Status:
- Active
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UJA1132AHW/5F4/0Y FAQ
1.How can I place an order for UJA1132AHW/5F4/0Y through Aetrix?
Please submit a Request for Quotation (RFQ) for UJA1132AHW/5F4/0Y on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UJA1132AHW/5F4/0Y reliable?
The price and inventory of UJA1132AHW/5F4/0Y are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UJA1132AHW/5F4/0Y is usually 5 days.
3.What payment methods are accepted for UJA1132AHW/5F4/0Y?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UJA1132AHW/5F4/0Y transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UJA1132AHW/5F4/0Y?
UJA1132AHW/5F4/0Y orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UJA1132AHW/5F4/0Y order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UJA1132AHW/5F4/0Y?
For technical support, including UJA1132AHW/5F4/0Y datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UJA1132AHW/5F4/0Y requirements.
6.How does Aetrix verify that UJA1132AHW/5F4/0Y is sourced from the original manufacturer or authorized distributors?
All UJA1132AHW/5F4/0Y products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UJA1132AHW/5F4/0Y meets industry standards.
7.What is the process for return or replacement of UJA1132AHW/5F4/0Y?
All UJA1132AHW/5F4/0Y units undergo pre-shipment inspection (PSI). If there is an issue with UJA1132AHW/5F4/0Y, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UJA1132AHW/5F4/0Y part is unused and in its original packaging.
Return procedure for UJA1132AHW/5F4/0Y:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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