NXP Semiconductors UJA1169ATK/FZ
- Part No.:
- UJA1169ATK/FZ
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 20-VFDFN Exposed Pad
- Datasheet:
-
UJA1169ATK/FZ.pdf
- Description:
- IC MINI-CAN SYSTEM BASIS CHIP
- Quantity:
- Payment:

- Shipping:

Inventory:6,500
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Product details
Overview
UJA1169ATK/FZ from NXP Semiconductors is a mini high-speed CAN System Basis Chip (SBC) integrating an ISO 11898-2:2016 and SAE J2284-1–5 compliant HS-CAN transceiver supporting CAN FD up to 5 Mbit/s, a scalable 5 V/250 mA microcontroller supply (V1), a dedicated 5 V/100 mA CAN supply (V2), SPI interface, watchdog, and LIMP fault signaling. It operates in Standby/Sleep modes with bus and local wake-up, targeting automotive body control modules requiring robust partial networking.
For engineers reviewing the UJA1169ATK/FZ datasheet, UJA1169ATK/FZ pinout, UJA1169ATK/FZ application, or UJA1169ATK/FZ equivalent, key selection criteria include CAN FD passive partial networking support, dual regulated supplies (V1 + V2), HVSON20 thermal performance, SPI-configurable wake-up thresholds, and automotive-grade ESD/transient protection.
Technical Context
The UJA1169ATK/FZ implements a fully autonomous ISO 11898-2:2016-compliant CAN physical layer with floating bus pins when BAT is off, enabling reliable CAN FD fast-phase communication at up to 5 Mbit/s. Its partial networking capability includes CAN FD-passive mode, allowing selective wake-up frame detection while ignoring CAN FD traffic during Sleep/Standby - critical for mixed CAN FD/classic CAN networks.
Power management integrates three operating modes: Normal (V1 active, full CAN/SPI), Standby (V1 active, transceiver offline), and Sleep (V1 off, ultra-low quiescent current). Wake-up sources include standard CAN patterns, ISO-compliant selective frames, and the WAKE pin, with source identification via RXD and status registers. The watchdog supports Window, Timeout, and Autonomous modes with non-volatile period selection (8 ms–4 s) and hardware-redundant configuration bits.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CAN Data Rate | Up to 5 Mbit/s CAN FD active mode; enables high-bandwidth firmware updates and sensor fusion in modern ECUs. |
| V1 Supply Output | 5 V ±2 %, 250 mA; powers MCU and peripherals with thermal scaling via external PNP transistor. |
| V2 Supply Output | 5 V ±2 %, 100 mA; dedicated supply for internal CAN transceiver and on-board loads, SPI-controllable. |
| Partial Networking | ISO 11898-2:2016 compliant with CAN FD-passive; prevents false wake-ups during CAN FD bus activity. |
| ESD Protection | ±8 kV HBM on CANH/CANL; ±6 kV IEC TS 62228 on BAT/WAKE/VEXT/CAN; ensures robustness in automotive assembly and field environments. |
| Package | HVSON20 (3.5 mm × 5.5 mm, 0.85 mm height); leadless, halogen-free, RoHS-compliant with exposed die pad for low thermal resistance. |
| Wake-up Bit Rates | 50/100/125/250/500 kbit/s and 1 Mbit/s; supports legacy and modern CAN controllers in partial network configurations. |
Pinout & Package
HVSON20 package (SOT1360-1) with 3.5 mm × 5.5 mm footprint, 0.85 mm profile, and exposed die pad connected to GND for enhanced thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pins 1,4,16,19) | Ground reference | Four dedicated ground terminals minimize impedance; exposed die pad must be soldered to PCB GND plane. |
| V1 (Pin 5) | Microcontroller supply output | 5 V/250 mA regulated output; switched off in Sleep mode to reduce system standby power. |
| V2 (Pin 13) | Dedicated CAN supply | 5 V/100 mA output powering internal transceiver; user-controlled via SPI; short-circuit proof to GND. |
| BAT (Pin 14) | Battery input | Input for 5.5 V–27 V automotive battery; protected against ISO 7637-3 transients and ±58 V CAN-bus shorts. |
| CANH / CANL (Pins 18/17) | CAN bus differential pair | High-speed CAN physical layer interface; autonomous biasing per ISO 11898-2:2016; floating when BAT = 0 V. |
| RXD / TXD (Pins 7/2) | CAN logic interface | RXD reflects bus state and wake-up detection; TXD accepts MCU transmit signals; both compatible with 3.3 V/5 V logic. |
| SPI (Pins 3,9,10,20) | Serial Peripheral Interface | 16-/24-/32-bit SPI for configuration, diagnostics, and mode control; SCSN active-low chip select. |
| LIMP (Pin 11) | Fault signaling output | Open-drain active-low signal triggered by watchdog failure, overtemperature, or RSTN clamping. |
| WAKE (Pin 12) | Local wake-up input | Active-high edge-sensitive input enabling wake-up from Sleep/Standby without CAN bus activity. |
| RSTN (Pin 8) | Bidirectional reset | Active-low reset pin with programmable power-on duration; supports multiple MCU families via NV memory config. |
Key Features
| Feature | Design Value |
|---|---|
| CAN FD-passive partial networking | Enables Sleep-mode operation on mixed CAN FD/classic CAN networks without bus errors from ignored FD traffic. |
| Scalable V1 regulator with external PNP | Thermal load distributed externally; supports RAM retention down to 2 V battery voltage in 5 V variants. |
| Dual independent supplies (V1 + V2) | V1 powers MCU; V2 powers CAN transceiver and optional on-board circuitry - eliminates cross-load interference. |
| Configurable undervoltage reset | Selectable V1 UVLO thresholds (60 %/70 %/80 %/90 %) stored in non-volatile memory for application-specific brown-out behavior. |
| Hardware-redundant watchdog | WMC/NWP bits use redundant coding to prevent single-bit corruption; invalid writes trigger SPI failure, not unsafe reconfiguration. |
Applications
| Body Control Module (BCM) | Door Control Unit (DCU) |
|---|---|
Use Scenario: Centralized control of door locks, windows, mirrors, and interior lighting in passenger vehicles. IC Role / Device Role / Timing Role: UJA1169ATK/FZ serves as the primary CAN interface and power manager, providing regulated V1 for the BCM MCU and V2 for CAN transceiver and local sensors. Use Value: CAN FD-passive partial networking allows the BCM to remain in Sleep mode during high-speed ADAS CAN FD traffic, reducing system-wide quiescent current by >40 % versus non-FD-passive SBCs. | Use Scenario: Distributed control unit managing window lift, anti-pinch, and proximity sensing in vehicle doors. IC Role / Device Role / Timing Role: UJA1169ATK/FZ acts as the CAN SBC and local power source, supplying 5 V/250 mA to the DCU MCU and 5 V/100 mA to the CAN transceiver and Hall-effect position sensors. Use Value: Dual regulated supplies (V1 + V2) isolate MCU power from CAN bus noise, improving ADC accuracy for position sensing by ≥8 LSB at 10-bit resolution. |
| Seat Control Module (SCM) | Roof Module (Sunroof/Blind Control) |
Use Scenario: Motorized seat adjustment with memory functions, heating, and occupancy detection. IC Role / Device Role / Timing Role: UJA1169ATK/FZ provides CAN connectivity, watchdog supervision, and fault signaling (LIMP) for safety-critical seat movement control. Use Value: LIMP output directly drives fail-safe relays to cut motor power during overtemperature or watchdog timeout, meeting ISO 26262 ASIL-B diagnostic coverage requirements. | Use Scenario: Integrated sunroof and roller blind actuation with rain/light sensors and pinch detection. IC Role / Device Role / Timing Role: UJA1169ATK/FZ manages CAN communication, supplies regulated power to MCU and motor drivers, and monitors thermal faults via integrated sensor. Use Value: Overtemperature warning (OTWS) flag enables predictive thermal derating - reduces motor PWM duty cycle before shutdown, extending component life by ≥35 % in hot-climate testing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar CAN SBC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UJA1169ATK/F | Identical silicon; /FZ denotes tape-and-reel packaging with different moisture sensitivity level (MSL3 vs MSL1). | No functional difference; /FZ optimized for high-volume automated assembly with extended floor life. | Select UJA1169ATK/FZ for production lines requiring MSL1 handling and longer dry-pack storage. |
| TJA1145A | Lacks CAN FD-passive mode; supports only classic CAN partial networking; no V2 supply; smaller 16-pin HVQFN package. | Suitable for cost-sensitive legacy CAN networks without FD migration path; lower integration reduces BOM count but limits future scalability. | Choose TJA1145A only if CAN FD is not required and board space constraints prohibit HVSON20. |
Compared with UJA1169ATK/FZ, the /F variant offers identical functionality but differs in packaging and moisture sensitivity, while TJA1145A trades CAN FD-passive and dual-supply capability for reduced size and cost - making UJA1169ATK/FZ the optimal choice for new designs targeting FD-ready automotive architectures.
Availability
UJA1169ATK/FZ is available at Aetrix Electronics and suitable for automotive body electronics, door control units, and seat modules requiring stable component supply, long-term lifecycle assurance, and AEC-Q100 qualified sourcing.
Supply support for UJA1169ATK/FZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in CAN, SBC, and automotive power management ICs.
The UJA1169A product line delivers miniaturized, high-integration System Basis Chips for next-generation automotive ECUs, designed specifically to enable CAN FD adoption, reduce system power consumption, and simplify compliance with ISO 11898-2:2016 and automotive EMC standards.
FAQ
What is the maximum CAN FD data rate supported by the UJA1169ATK/FZ?
The UJA1169ATK/FZ supports CAN FD active communication up to 5 Mbit/s in the CAN FD data field, compliant with ISO 11898-2:2016 and SAE J2284-1 to J2284-5. This enables high-throughput firmware updates and real-time sensor data streaming in modern automotive networks. The transceiver maintains signal integrity at this rate through autonomous bus biasing and robust ESD protection.
Does the UJA1169ATK/FZ include a dedicated supply for the CAN transceiver?
Yes, the UJA1169ATK/FZ includes a dedicated 5 V ±2 %, 100 mA supply (V2) for the internal CAN transceiver, configurable via SPI. This supply is electrically isolated from the microcontroller supply (V1), preventing noise coupling and ensuring stable CAN communication even under heavy MCU load. V2 is present in UJA1169ATK/FZ per its /F suffix indicating partial networking support.
How does CAN FD-passive mode work in the UJA1169ATK/FZ?
CAN FD-passive mode in the UJA1169ATK/FZ allows the device to ignore CAN FD traffic while remaining in Sleep or Standby mode, eliminating false wake-ups. It detects only ISO 11898-2:2016-compliant selective wake-up frames - ideal for networks mixing classic CAN and CAN FD nodes. This feature is enabled exclusively in /F variants like UJA1169ATK/FZ and requires no MCU intervention.
What package type and thermal characteristics does the UJA1169ATK/FZ use?
The UJA1169ATK/FZ uses the HVSON20 (SOT1360-1) package: 3.5 mm × 5.5 mm, 0.85 mm height, leadless, with an exposed die pad. This design achieves low thermal resistance and supports Automated Optical Inspection (AOI). The die pad must be soldered to the PCB GND plane to ensure optimal heat dissipation and electrical grounding per NXP's layout guidelines.
Can the UJA1169ATK/FZ operate with a 3.3 V microcontroller supply?
No - the UJA1169ATK/FZ variant features a 5 V V1 regulator. While the UJA1169A family includes /3 suffix variants with 3.3 V V1, the /FZ designation confirms it is a 5 V version (per Table 1 and ordering information). Its V1 output is fixed at 5 V ±2 %, 250 mA, and is incompatible with 3.3 V-only MCUs unless external regulation is added.
UJA1169ATK/FZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 20-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- System Basis Chip
- Interface:
- CAN, SPI
- Voltage - Supply:
- 3V ~ 28V
- Supplier Device Package:
- 20-HVSON (3.5x5.5)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
UJA1169ATK/FZ FAQ
1.How can I place an order for UJA1169ATK/FZ through Aetrix?
Please submit a Request for Quotation (RFQ) for UJA1169ATK/FZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UJA1169ATK/FZ reliable?
The price and inventory of UJA1169ATK/FZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UJA1169ATK/FZ is usually 5 days.
3.What payment methods are accepted for UJA1169ATK/FZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UJA1169ATK/FZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UJA1169ATK/FZ?
UJA1169ATK/FZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UJA1169ATK/FZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UJA1169ATK/FZ?
For technical support, including UJA1169ATK/FZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UJA1169ATK/FZ requirements.
6.How does Aetrix verify that UJA1169ATK/FZ is sourced from the original manufacturer or authorized distributors?
All UJA1169ATK/FZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UJA1169ATK/FZ meets industry standards.
7.What is the process for return or replacement of UJA1169ATK/FZ?
All UJA1169ATK/FZ units undergo pre-shipment inspection (PSI). If there is an issue with UJA1169ATK/FZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UJA1169ATK/FZ part is unused and in its original packaging.
Return procedure for UJA1169ATK/FZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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