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NXP Semiconductors UJA1169LTK/FZ
- Part No.:
- UJA1169LTK/FZ
- Manufacturer:
- NXP Semiconductors
- Category:
- Specialized
- Package:
- 20-VFDFN Exposed Pad
- Datasheet:
-
UJA1169LTK/FZ.pdf
- Description:
- IC INTFACE SPECIALIZED 20HVSON
- Quantity:
- Payment:
- Shipping:
Inventory:3,348
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Product details
Overview
UJA1169LTK/FZ from NXP Semiconductors is a mini high-speed CAN companion System Basis Chip (SBC) integrating an ISO 11898-2:201x/6:2013-compliant HS-CAN transceiver, a scalable 5 V/250 mA regulator (V1), SPI interface, watchdog with Window/Timeout/Autonomous modes, and LIMP fault signaling output. It operates in Standby/Sleep modes with bus and local wake-up, supports CAN FD-passive partial networking, and features VIO pin for 3.3–5 V microcontroller interfacing - deployed in automotive domain controllers requiring secondary SBC functionality.
For engineers reviewing the UJA1169LTK/FZ datasheet, UJA1169LTK/FZ pinout, UJA1169LTK/FZ application, or UJA1169LTK/FZ equivalent, key selection considerations include its dual-regulator architecture (V1 + V2), CAN FD-passive wake-up capability, thermal-scalable V1 supply with external PNP control, non-volatile configuration storage, and HVSON20 package compatibility with automotive ASIL-related limp-home requirements.
Technical Context
The UJA1169LTK/FZ implements a fully autonomous ISO 11898-6:2013-compliant partial networking controller with CAN FD-passive support, enabling selective wake-up without bus errors during CAN FD traffic. Its internal CAN transceiver is powered by V2 (5 V/100 mA), while V1 (5 V/250 mA) supplies external loads and scales thermally via external PNP transistor controlled by VEXCTRL/VEXCC pins.
Power management includes three distinct low-power states: Standby (V1 active, SPI enabled, watchdog configurable), Sleep (V1 off, no temperature protection), and Forced Normal (watchdog disabled, full functionality for flashing). Wake-up sources are recognized and reported via RXD pin and status registers, with diagnostic events (overtemperature, watchdog failure) triggering the open-drain LIMP output.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CAN Compliance | ISO 11898-2:201x & ISO 11898-6:2013; supports CAN FD active up to 2 Mbit/s, CAN FD-passive in Sleep/Standby |
| V1 Regulator | 5 V ±2 %, 250 mA output; remains operational down to 2 V battery input; short-circuit proof to GND |
| V2 Regulator | 5 V ±2 %, 100 mA output; user-controllable via SPI; short-circuit proof to GND |
| Watchdog | Configurable Window/Timeout/Autonomous modes; period selectable from 8 ms to 4 s; microcontroller-independent clock source |
| Operating Modes | Normal, Standby, Sleep, Reset, Forced Normal, Overtemp, Off - each with defined V1/V2/SPI/watchdog/CAN behavior per register-controlled state machine |
| ESD Protection | ±8 kV HBM on CAN pins; ±6 kV IEC 61000-4-2 on BAT, WAKE, VEXT, CAN pins |
| Thermal & Fault Safety | Overtemperature warning/shutdown; LIMP output activated on watchdog failure or overtemperature; non-volatile memory stores power-on/limp-home configuration |
Pinout & Package
UJA1169LTK/FZ uses the HVSON20 leadless package (3.5 mm × 5.5 mm × 0.85 mm) with exposed die pad for enhanced thermal dissipation and grounding. The package supports Automated Optical Inspection (AOI) and complies with RoHS/halogen-free requirements.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pins 1,4,16,19) | Ground reference | Four dedicated ground connections ensure low-impedance return paths for analog, digital, and power domains |
| V1 (Pin 5) | Main application supply output | Scalable 5 V/250 mA regulator output; powers external transceivers or loads; remains active in Standby mode |
| VIO (Pin 6) | I/O level shifter supply | Accepts 3.3–5 V to adapt logic interface to host microcontroller; enables direct connection without external level shifters |
| V2 (Pin 13) | On-board CAN transceiver supply | 5 V/100 mA regulator dedicated to internal CAN transceiver; SPI-controllable on/off; not present in /X variants |
| BAT (Pin 14) | Battery input | Input for automotive battery rail (up to 58 V tolerant); protected against ISO 7637-3 transients |
| VEXCTRL (Pin 15) | External PNP base driver | Controls external PNP transistor to scale V1 thermal performance; enables current limiting above 250 mA |
| CANL / CANH (Pins 17,18) | CAN bus differential pair | High-speed CAN physical layer interface; floating when BAT = 0 V; short-circuit proof to ±58 V |
| RXD (Pin 8) | CAN receive output & wake indicator | Reflects bus data stream; forced LOW on any wake-up event (CAN/WAKE/diagnostic); used for wake-source recognition |
| LIMP (Pin 11) | Fault signaling output | Open-drain active-LOW output triggered by watchdog failure or overtemperature; configurable activation threshold |
| WAKE (Pin 12) | Local wake-up input | Active-LOW input for hardware-triggered wake-up; debounced and synchronized internally |
| SCK/SDI/SDO/SCSN (Pins 10,3,9,20) | SPI interface | Full-duplex 16-/24-/32-bit SPI for configuration, control, and diagnostics; supports software development and end-of-line flashing |
Key Features
| Feature | Design Value |
|---|---|
| CAN FD-passive partial networking | Enables classic CAN nodes to remain in Sleep/Standby during CAN FD communication without generating bus errors - critical for mixed-speed automotive networks |
| VIO input pin | Eliminates reverse supply current risk between primary and secondary SBCs by allowing independent I/O domain adaptation (3.3 V to 5 V) |
| Non-volatile configuration memory | Stores power-on behavior, limp-home thresholds, V1 undervoltage detection levels (60–90 %), and Sleep mode enable/disable - eliminating boot-time reconfiguration |
| Thermal-scalable V1 regulator | Uses external PNP transistor (via VEXCTRL/VEXCC) to extend 250 mA output capability while maintaining thermal safety in compact automotive ECUs |
| Dedicated LIMP output | Provides fail-safe system-level fault signaling independent of microcontroller; activated by watchdog timeout or overtemperature - essential for ASIL-B/C applications |
Applications
| Body Control Module (BCM) | Advanced Driver Assistance Systems (ADAS) Sensor Hub |
|---|---|
Use Scenario: Secondary SBC in multi-transceiver BCM architecture managing door modules, lighting, and HVAC via separate CAN subnets. IC Role / Device Role / Timing Role: Companion SBC providing isolated V2-powered CAN transceiver and scalable V1 supply for peripheral ICs, with partial networking wake-up for targeted subsystem activation. Use Value: Eliminates cross-domain supply conflicts between primary and secondary SBCs while enabling selective wake-up of individual zones - reducing system quiescent current by >40 % vs. dual-standard SBCs. | Use Scenario: Central sensor aggregation node connecting radar, camera, and ultrasonic sensors to main ADAS ECU via redundant CAN FD links. IC Role / Device Role / Timing Role: Companion SBC supplying power and CAN interface to off-board sensors; leverages CAN FD-passive to ignore high-speed sensor data bursts while remaining asleep for low-latency alerts. Use Value: Maintains ultra-low Sleep mode current (<20 µA) during CAN FD sensor fusion traffic, avoiding false wake-ups and extending functional safety monitoring uptime. |
| Electric Power Steering (EPS) Backup Controller | Automotive Gateway Secondary Interface |
Use Scenario: Redundant steering assist path using independent microcontroller and CAN interface, activated only during primary controller fault. IC Role / Device Role / Timing Role: LIMP-signaling SBC delivering fail-operational CAN connectivity and autonomous watchdog supervision - independent of main EPS MCU clock or supply. Use Value: Provides certified limp-home capability with hardware-triggered LIMP assertion on watchdog or thermal fault - meeting ISO 26262 ASIL-B requirements without software intervention. | Use Scenario: Secondary CAN interface in multi-bus gateway handling infotainment-to-powertrain bridging with strict isolation requirements. IC Role / Device Role / Timing Role: Isolated SBC with VIO-adapted SPI and dual-regulator outputs, enabling secure firmware updates and partial network management across security domains. Use Value: Prevents supply coupling between gateway domains via dedicated VIO and V2 regulation, while supporting secure over-the-air update sequencing via non-volatile configuration lock. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar CAN companion SBC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXP UJA1169LTK | Lacks ISO 11898-6:2013 partial networking and CAN FD-passive support; identical V1/V2 regulators and HVSON20 package | Not suitable for mixed CAN FD/classic CAN networks requiring selective wake-up; limited to basic dual-transceiver topologies | Select UJA1169LTK only if CAN FD traffic is absent and partial networking is unnecessary - reduces BOM cost by ~12 % |
| NXP UJA1169TK/F | Legacy UJA1169 series part; lacks V2 regulator and non-volatile configuration memory; uses older SOT669 package | Requires external 5 V supply for CAN transceiver; no persistent limp-home settings; higher thermal resistance than HVSON20 | Choose UJA1169TK/F only for legacy redesigns where footprint compatibility with SOT669 is mandatory and V2 integration is not required |
Compared with UJA1169LTK and UJA1169TK/F, the UJA1169LTK/FZ delivers CAN FD-passive wake-up, factory-configurable V1 undervoltage thresholds, and thermal-scalable regulation - making it the only variant qualified for new ASIL-B automotive designs requiring mixed-speed network interoperability and fail-safe power management.
Availability
UJA1169LTK/FZ is available at Aetrix Electronics and suitable for automotive body control modules, ADAS sensor hubs, electric power steering backup systems, and multi-domain gateways requiring stable component supply across extended vehicle lifecycles.
Supply support for UJA1169LTK/FZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with leadership in CAN, SBC, and functional safety technologies.
The UJA1169LTK/FZ belongs to NXP's System Basis Chip product line, designed specifically for automotive domain controllers needing secondary, isolated, and safety-certifiable power and communication interfaces - emphasizing partial networking, thermal scalability, and ASIL-ready fault signaling.
FAQ
What is the primary function of the UJA1169LTK/FZ in an automotive ECU?
The UJA1169LTK/FZ serves as a companion System Basis Chip that provides isolated high-speed CAN communication, dual regulated power supplies (V1 and V2), SPI-based system control, and safety-critical fault signaling via the LIMP output. In automotive ECUs, it enables scalable multi-transceiver architectures while resolving supply domain conflicts between primary and secondary SBCs - a core requirement in modern domain controller designs.
Does the UJA1169LTK/FZ support CAN FD communication?
Yes, the UJA1169LTK/FZ supports CAN FD active communication up to 2 Mbit/s in the data phase and implements CAN FD-passive functionality. This allows the device to remain in Sleep or Standby mode during CAN FD traffic without generating bus errors - a feature confirmed for the /F variants including UJA1169LTK/FZ and compliant with ISO 11898-6:2013 and upcoming ISO 11898-2:201x.
How does the VIO pin on the UJA1169LTK/FZ improve system design?
The VIO pin on the UJA1169LTK/FZ accepts 3.3 V to 5 V supply to configure the I/O level shifter, enabling direct interface with microcontrollers operating at different voltage domains. This eliminates reverse supply current risks between primary and secondary SBCs - a known reliability issue when standard SBCs are used as companions - and removes the need for external level-shifting circuitry in UJA1169LTK/FZ-based designs.
What is the role of the LIMP output in UJA1169LTK/FZ-based safety systems?
The LIMP output in the UJA1169LTK/FZ is an open-drain, active-LOW fault signaling pin triggered by watchdog failure or overtemperature events. It operates independently of the host microcontroller and provides hardware-level fail-safe indication for ASIL-related applications - such as electric power steering backup controllers - where certified limp-home behavior must be guaranteed even if the main MCU fails.
Can the UJA1169LTK/FZ operate with a battery voltage below 5 V?
Yes, the UJA1169LTK/FZ's V1 regulator remains operational down to a battery voltage of 2 V, and its undervoltage detection threshold is configurable in non-volatile memory (60 %, 70 %, 80 %, or 90 % of nominal 5 V output). This ensures reliable operation during cold-crank conditions and brown-out scenarios common in 12 V automotive systems, with precise fault reporting via the Main status register.
UJA1169LTK/FZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 20-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- System Basis Chip
- Interface:
- CAN
- Voltage - Supply:
- 5V
- Supplier Device Package:
- 20-HVSON (3.5x5.5)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
UJA1169LTK/FZ FAQ
1.How can I place an order for UJA1169LTK/FZ through Aetrix?
Please submit a Request for Quotation (RFQ) for UJA1169LTK/FZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UJA1169LTK/FZ reliable?
The price and inventory of UJA1169LTK/FZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UJA1169LTK/FZ is usually 5 days.
3.What payment methods are accepted for UJA1169LTK/FZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UJA1169LTK/FZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UJA1169LTK/FZ?
UJA1169LTK/FZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UJA1169LTK/FZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UJA1169LTK/FZ?
For technical support, including UJA1169LTK/FZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UJA1169LTK/FZ requirements.
6.How does Aetrix verify that UJA1169LTK/FZ is sourced from the original manufacturer or authorized distributors?
All UJA1169LTK/FZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UJA1169LTK/FZ meets industry standards.
7.What is the process for return or replacement of UJA1169LTK/FZ?
All UJA1169LTK/FZ units undergo pre-shipment inspection (PSI). If there is an issue with UJA1169LTK/FZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UJA1169LTK/FZ part is unused and in its original packaging.
Return procedure for UJA1169LTK/FZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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