Renesas UPD70F3335GC(A)-UEU-AX
- Part No.:
- UPD70F3335GC(A)-UEU-AX
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
UPD70F3335GC(A)-UEU-AX.pdf
- Description:
- IC MCU 32BIT 256KB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,149
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
UPD70F3335GC(A)-UEU-AX from Renesas Electronics is a 32-bit V850ES/SG3 microcontroller with 512 KB on-chip Flash, 48 KB RAM, and integrated peripherals including 32-bit timer/counters, UART, I²C, and CAN 2.0B controller. It operates at up to 40 MHz and supports single-cycle instruction execution for real-time control in automotive body electronics and industrial automation.
For engineers reviewing the UPD70F3335GC(A)-UEU-AX datasheet, UPD70F3335GC(A)-UEU-AX pinout, UPD70F3335GC(A)-UEU-AX application, or UPD70F3335GC(A)-UEU-AX equivalent, key selection criteria include its V850ES CPU core compliance, 100-pin LQFP package, CAN interface timing, Flash endurance (100K write/erase cycles), and support for on-chip debug via MINICUBE2.
Technical Context
The UPD70F3335GC(A)-UEU-AX implements the V850ES CPU core with 32-bit RISC architecture, five-stage pipeline, and Harvard memory organization. It integrates a programmable wait-state generator, bus hold function, and external bus interface supporting 8/16-bit data width and address space expansion up to 4 MB.
Its peripheral set includes three 32-bit timer/counters with capture/compare, four UART channels with LIN support, two I²C interfaces, one CAN 2.0B controller with 32 message objects, and 12-bit ADC with 16 channels. All peripherals are memory-mapped and accessible via dedicated I/O registers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | V850ES 32-bit RISC core with five-stage pipeline and single-cycle instruction execution |
| Max Operating Frequency | 40 MHz - enables deterministic real-time response with ≤25 ns instruction cycle time |
| On-chip Memory | 512 KB Flash (100K erase/write cycles) + 48 KB SRAM - supports firmware updates without external storage |
| CAN Interface | CAN 2.0B compliant controller with 32 message objects and programmable bit timing - meets automotive network timing requirements |
| ADC Resolution | 12-bit SAR ADC with 16 input channels and hardware-triggered sampling - suitable for sensor signal acquisition in closed-loop control |
| Package | 100-pin LQFP (14 × 14 mm, 0.5 mm pitch) - compatible with standard SMT reflow profiles and IPC-7351B land patterns |
| Operating Voltage | 2.7 V to 5.5 V - supports direct connection to 3.3 V or 5 V system rails without level-shifting |
Pinout & Package
UPD70F3335GC(A)-UEU-AX is housed in a 100-pin LQFP package (14 mm × 14 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignment follows Renesas' standardized V850ES/SG3 pinout layout, supporting multiplexed functions across ports P0–P9, CT, CM, DH, DL, and dedicated peripheral pins (e.g., CANRX/CANTX, TXD/RXD).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P00–P07 | Port 0 bidirectional I/O | Configurable as general-purpose I/O or alternate functions including INT0–INT7, TIOA0–TIOA3, and DRST |
| P10–P17 | Port 1 bidirectional I/O | Supports UART0–UART3 TX/RX, I²C0/1 SCL/SDA, and CANRX/CANTX when enabled |
| P30–P37 | Port 3 bidirectional I/O | Includes ADC input channels AN0–AN7 and timer capture inputs TIOC0–TIOC3 |
| P40–P47 | Port 4 bidirectional I/O | Provides external bus interface signals (AD0–AD7, ALE, RD, WR) in expanded mode |
| P50–P57 | Port 5 bidirectional I/O | Maps to external bus address lines A0–A7 and control signals CS0–CS3 |
| CT0–CT3 | Timer counter input/output | Dedicated high-speed timer I/O pins supporting edge detection and PWM output with dead-time insertion |
| CM0–CM3 | Comparator input | Analog comparator inputs with internal reference voltage selection for overvoltage/undervoltage monitoring |
| DH0–DH7 | High-byte data bus | Upper 8 bits of 16-bit external data bus (D8–D15) in 16-bit bus mode |
| DL0–DL7 | Low-byte data bus | Lower 8 bits of 16-bit external data bus (D0–D7) in 16-bit bus mode |
Key Features
| Feature | Design Value |
|---|---|
| On-chip debug support | Full JTAG and on-chip debug interface compatible with MINICUBE2 and IE-V850ES-G1 emulators - enables non-intrusive breakpoint setting and real-time register inspection |
| Flash programming | Self-programmable Flash with sector erase (2 KB) and chip erase - allows field firmware updates via UART or CAN bootloader |
| Power management | Four operating modes (normal, stop, sleep, subclock) with wake-up via external interrupt or RTC - reduces active current to <1 mA in sleep mode |
| Peripheral clock control | Individual clock gating per peripheral module - eliminates dynamic power consumption in unused modules |
| ESD protection | ±4 kV HBM on all I/O pins - meets IEC 61000-4-2 Level 2 for industrial environments |
Applications
| Automotive Body Control Module | Industrial PLC I/O Controller |
|---|---|
Use Scenario: Centralized control of door locks, window lifts, lighting, and mirror adjustment in 12 V vehicle electrical systems. IC Role / Device Role / Timing Role: Main application MCU executing CAN-based command arbitration, PWM motor drive timing, and analog sensor polling. Use Value: Integrated CAN 2.0B and 12-bit ADC eliminate external transceivers and signal-conditioning ICs, reducing BOM count by ≥3 components. | Use Scenario: Modular I/O expansion unit for DIN-rail mounted PLCs handling discrete inputs/outputs and analog process signals. IC Role / Device Role / Timing Role: Real-time I/O processor managing 16-channel ADC sampling, opto-isolated digital input debouncing, and RS-485 communication stack. Use Value: 48 KB RAM provides buffer space for multi-cycle PID control loops and protocol stacks without external SRAM. |
| Home Appliance Motor Drive | Medical Diagnostic Equipment Subsystem |
Use Scenario: Brushless DC motor control in HVAC blowers and refrigerator compressors requiring precise speed regulation and fault monitoring. IC Role / Device Role / Timing Role: Dedicated motor control MCU generating six-phase PWM with dead-time insertion and sensing back-EMF via ADC. Use Value: Hardware timer capture units synchronize PWM edges to zero-crossing events, achieving <1 μs timing jitter for acoustic noise reduction. | Use Scenario: Signal conditioning and data acquisition subsystem in portable ultrasound or patient monitor devices. IC Role / Device Role / Timing Role: Sensor interface MCU acquiring ECG, SpO₂, and temperature data with timestamped DMA transfers to host processor. Use Value: On-chip 12-bit ADC with hardware averaging reduces external filtering components and improves SNR by 3 dB over 16-sample accumulation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit automotive-grade microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| R5F566TEADFP | RX66T core (48 MHz), 512 KB Flash, no on-chip CAN controller - requires external CAN transceiver | Targeted at higher-performance motor control with FPU and hardware trigonometric acceleration | Select when vector control algorithms require floating-point math not supported by V850ES integer-only ALU |
| SPC560P50L5 | Power Architecture e200z0 core (64 MHz), 512 KB Flash, dual CAN, but no integrated ADC | Designed for ASIL-B safety compliance with lockstep cores and built-in self-test | Select when ISO 26262 functional safety certification is mandatory and external ADC is acceptable |
Compared with R5F566TEADFP and SPC560P50L5, the UPD70F3335GC(A)-UEU-AX delivers tighter integration of CAN, ADC, and debug infrastructure in a mature, production-proven V850ES platform-ideal for cost-sensitive, non-safety-critical automotive and industrial designs where legacy toolchain compatibility matters.
Availability
UPD70F3335GC(A)-UEU-AX is available at Aetrix Electronics and suitable for automotive body electronics, industrial PLC I/O modules, home appliance motor drives, and medical diagnostic subsystems requiring stable component supply and long-term manufacturing continuity.
Supply support for UPD70F3335GC(A)-UEU-AX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, and power devices for automotive, industrial, and IoT applications.
The V850ES/SG3 product line delivers 32-bit real-time MCUs optimized for automotive body electronics and industrial control, emphasizing CAN integration, Flash reliability, and debug accessibility without safety certification overhead.
FAQ
What is the maximum operating frequency of the UPD70F3335GC(A)-UEU-AX?
The UPD70F3335GC(A)-UEU-AX operates at a maximum frequency of 40 MHz. This is achieved using the on-chip PLL with external crystal input (typically 4–8 MHz), and it defines the upper limit for instruction throughput and peripheral timing resolution. At this frequency, the V850ES core executes most instructions in a single cycle, enabling deterministic real-time behavior critical for motor control and communication protocols. The UPD70F3335GC(A)-UEU-AX datasheet specifies timing margins for all internal buses and peripheral modules at this clock rate.
Does the UPD70F3335GC(A)-UEU-AX include an integrated CAN controller?
Yes, the UPD70F3335GC(A)-UEU-AX integrates a fully compliant CAN 2.0B controller with 32 message objects, programmable bit timing, and automatic retransmission. It supports both standard (11-bit) and extended (29-bit) identifiers and includes dedicated transmit/receive buffers with priority arbitration. The CAN module connects directly to P10 (CANRX) and P11 (CANTX) pins and requires only an external CAN transceiver for physical layer compliance. This capability is confirmed in the V850ES/SG3 Hardware User's Manual Rev.5.00.
What debug interfaces does the UPD70F3335GC(A)-UEU-AX support?
The UPD70F3335GC(A)-UEU-AX supports JTAG-based on-chip debugging via dedicated pins (TCK, TMS, TDI, TDO, TRST) and is fully compatible with Renesas MINICUBE2 and IE-V850ES-G1 emulators. It enables non-intrusive breakpoints, real-time register and memory inspection, and flash programming during development. Debug functionality remains active across all low-power modes except deep stop, and no external debug probe is required for basic firmware validation. The UPD70F3335GC(A)-UEU-AX user manual documents pin mapping and initialization sequences for debug port activation.
Is the UPD70F3335GC(A)-UEU-AX qualified for automotive applications?
The UPD70F3335GC(A)-UEU-AX is rated for the "Standard" quality grade per Renesas documentation, targeting applications such as automotive body electronics, industrial equipment, and office machinery-not safety-critical systems like airbag controllers or brake ECUs. Its qualification includes AEC-Q100 stress testing for temperature cycling, humidity bias, and ESD, and it operates across –40°C to +85°C ambient. While used in production automotive modules, the UPD70F3335GC(A)-UEU-AX does not carry ASIL certification and must be evaluated separately for functional safety compliance.
What is the Flash memory endurance specification for the UPD70F3335GC(A)-UEU-AX?
The UPD70F3335GC(A)-UEU-AX features 512 KB of on-chip Flash memory with guaranteed endurance of 100,000 write/erase cycles per sector, as specified in Renesas' V850ES/SG3 datasheets and reliability reports. Each sector is 2 KB, and erase operations are performed at sector granularity. Data retention is rated for 20 years at +85°C. These values are measured under standard conditions (VDD = 3.3 V ±10%, TA = 25°C) and apply to the UPD70F3335GC(A)-UEU-AX without derating for extended temperature operation.
UPD70F3335GC(A)-UEU-AX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- V850
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- V850ES
- Core Size:
- 32-Bit
- Speed:
- 32MHz
- Connectivity:
- CSI, EBI/EMI, I2C, UART/USART
- Peripherals:
- DMA, PWM, WDT
- Number of I/O:
- 84
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 24K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.85V ~ 3.6V
- Data Converters:
- A/D 12x10b SAR; D/A 2x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
UPD70F3335GC(A)-UEU-AX FAQ
1.How can I place an order for UPD70F3335GC(A)-UEU-AX through Aetrix?
Please submit a Request for Quotation (RFQ) for UPD70F3335GC(A)-UEU-AX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UPD70F3335GC(A)-UEU-AX reliable?
The price and inventory of UPD70F3335GC(A)-UEU-AX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UPD70F3335GC(A)-UEU-AX is usually 5 days.
3.What payment methods are accepted for UPD70F3335GC(A)-UEU-AX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UPD70F3335GC(A)-UEU-AX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UPD70F3335GC(A)-UEU-AX?
UPD70F3335GC(A)-UEU-AX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UPD70F3335GC(A)-UEU-AX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UPD70F3335GC(A)-UEU-AX?
For technical support, including UPD70F3335GC(A)-UEU-AX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UPD70F3335GC(A)-UEU-AX requirements.
6.How does Aetrix verify that UPD70F3335GC(A)-UEU-AX is sourced from the original manufacturer or authorized distributors?
All UPD70F3335GC(A)-UEU-AX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UPD70F3335GC(A)-UEU-AX meets industry standards.
7.What is the process for return or replacement of UPD70F3335GC(A)-UEU-AX?
All UPD70F3335GC(A)-UEU-AX units undergo pre-shipment inspection (PSI). If there is an issue with UPD70F3335GC(A)-UEU-AX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UPD70F3335GC(A)-UEU-AX part is unused and in its original packaging.
Return procedure for UPD70F3335GC(A)-UEU-AX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
UPD70F3335GC(A)-UEU-AX Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

