Texas Instruments USBN9604SLB

Overview

USBN9604SLB from National Semiconductor is a full-speed USB 1.1 node controller IC integrating transceiver, 3.3V regulator, Serial Interface Engine (SIE), seven endpoint FIFOs (1×8-byte control + 6×64-byte data), 8-bit parallel/MICROWIRE interface, and enhanced DMA engine. It operates at 5V or 3.3V, supports 24 MHz crystal input with internal 48 MHz PLL clock generation, and targets embedded host-peripheral bridge applications in portable instrumentation and industrial USB peripherals.

For engineers reviewing the USBN9604SLB datasheet, USBN9604SLB pinout, USBN9604SLB application, or USBN9604SLB equivalent, this page delivers verified technical context, validated pin functions, confirmed USB 1.1 compliance, real-world use cases for endpoint FIFO management, and two documented alternative controllers with explicit functional and interface differences.

Technical Context

The USBN9604SLB implements a complete USB 1.1-compliant Serial Interface Engine (SIE) comprising Physical Layer (PHY) with NRZI decoding, clock recovery (12 MHz from 48 MHz PLL), bit stuffing/unstuffing, and Media Access Controller (MAC) handling CRC, packet formatting, and endpoint address detection. Its transceiver meets USB 1.1 Chapter 7 electrical requirements with differential and single-ended receivers plus current-source transmitter.

Endpoint Pipe Controller (EPC) manages seven dedicated pipes: one bidirectional control endpoint (EP0) and six unidirectional endpoints (three TX, three RX), each with independent FIFO, status, and control registers. The enhanced DMA engine supports Automatic DMA (ADMA) mode for CPU-independent 64-byte packet transfers up to 16 KB per transaction, with automatic PID toggling and NAK recovery.

Key Specifications

Pinout & Package

USBN9604SLB is housed in a 28-pin CSP (Chip Scale Package) with 0.5 mm pitch, optimized for space-constrained portable and embedded USB peripheral designs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar USB node controller applications.

Compared with USBN9603SLB, USBN9604SLB adds DLL-based CLKOUT synchronization on hardware reset for improved timing predictability; compared with ISP1301, USBN9604SLB delivers complete USB node functionality in a single chip, eliminating firmware development for SIE, endpoint management, and DMA control.

Availability

USBN9604SLB is available at Aetrix Electronics and suitable for USB data acquisition modules, industrial fieldbus bridges, portable medical diagnostics, embedded printers, and battery-powered USB peripherals requiring stable component supply across long-lifecycle programs.

Supply support for USBN9604SLB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

National Semiconductor was a U.S.-based semiconductor company specializing in analog and interface ICs, acquired by Texas Instruments in 2011. Its legacy USB controller portfolio emphasized integration and low-power embedded connectivity.

The USBN960x family was designed as highly integrated full-speed USB node controllers targeting cost-sensitive, space-constrained embedded systems needing minimal external components and reduced firmware complexity.

FAQ

What USB specification versions does the USBN9604SLB support?

The USBN9604SLB supports USB Specification versions 1.0 and 1.1 at full speed (12 Mbps). It is not compliant with USB 2.0 High-Speed (480 Mbps) or later revisions. Its Serial Interface Engine (SIE), transceiver, and endpoint architecture are explicitly validated against USB 1.1 Chapter 7 electrical and protocol requirements, making USBN9604SLB suitable for legacy host environments and resource-constrained embedded USB device implementations.

Does the USBN9604SLB require an external crystal, and what are the key oscillator specifications?

Yes, the USBN9604SLB requires a 24 MHz fundamental-mode crystal connected between XIN and XOUT pins, with typical load capacitance of 20 pF and maximum series resistance of 50 Ω. External capacitors C1/C2 (15 pF each) are recommended. An external 24 MHz clock may be applied to XIN instead, with XOUT left unconnected. The internal PLL generates the required 48 MHz clock for USB timing, and USBN9604SLB's clock recovery circuit derives the 12 MHz sampling clock from this source.

How many USB endpoints does the USBN9604SLB support, and how are they allocated?

The USBN9604SLB supports seven endpoint pipes: one bidirectional control endpoint (EP0, 8-byte FIFO) and six unidirectional endpoints (three transmit, three receive, each with 64-byte FIFO). These are fixed in hardware and mapped to specific register sets (EPC0–EPC6, TXS/RXS registers). No dynamic reconfiguration is supported - endpoint types (interrupt/bulk/isochronous) are assigned in firmware via endpoint control registers during enumeration.

What interface options does the USBN9604SLB provide for connecting to a microcontroller?

The USBN9604SLB offers three interface modes selected by MODE1–MODE0 pins: non-multiplexed 8-bit parallel (Mode 0), multiplexed 8-bit parallel compatible with Intel 8080/8085 buses (Mode 1), and synchronous serial MICROWIRE/PLUS (Mode 2). Each mode assigns distinct functions to shared pins (e.g., D0–D7 become AD0–AD7 in Mode 1, SO/SI in Mode 2), allowing flexible integration with 8-bit MCUs lacking dedicated USB peripherals.

Is the USBN9604SLB suitable for bus-powered USB devices, and what power features support this?

Yes, the USBN9604SLB supports bus-powered operation via its integrated 3.3V regulator, which derives V3.3 from the USB 5V bus. It features a fully static HALT mode with asynchronous wake-up on USB bus events (e.g., RESUME), reducing standby current to under 100 µA. Power-on reset detection and startup delay counter simplify power sequencing, and the regulator output is disabled during reset - enabling safe operation in 3.3V systems where V3.3 is supplied externally.