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Texas Instruments V62/23634-01XE

Part No.:
V62/23634-01XE
Manufacturer:
Texas Instruments
Category:
Voltage Regulators - Linear + Switching
Package:
32-VFQFN Exposed Pad
Datasheet:
AetrixV62/23634-01XE.pdf
Description:
ENHANCED-PRODUCT PMIC WITH THREE
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,106

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Product details

Overview

TPS6522005-EP from Texas Instruments is a radiation-tolerant, user-programmable Power Management IC (PMIC) with three synchronous step-down DC/DC converters (1×3.5A, 2×2A) and four LDOs (2×400mA, 2×300mA), operating across –55°C to +125°C for defense, aerospace, and industrial MPU power delivery including AM62x/AM64x SoCs.

For engineers reviewing the TPS6522005-EP datasheet, TPS6522005-EP pinout, TPS6522005-EP application, or TPS6522005-EP equivalent, key selection criteria include EEPROM-programmable sequencing, dynamic voltage scaling on all bucks, I²C interface (fast-mode+), multi-PMIC scalability, and extended temperature qualification.

Technical Context

The TPS6522005-EP implements three independent buck regulators with programmable switching frequency up to 2.3 MHz, quasi-fixed-frequency PFM/PWM mode control, and configurable headroom requirements (500–1000 mV). Each buck supports dynamic voltage scaling via I²C register writes and features dedicated feedback pins (FB_B1–FB_B3) with 2.3–5 MΩ input impedance.

Four LDOs are partitioned into two groups: LDO1/LDO2 accept 1.5–5.5 V input and deliver 0.6–3.4 V at 400 mA with bypass/load-switch capability for SD-card support; LDO3/LDO4 accept 2.2–5.5 V input and deliver 1.2–3.3 V at 300 mA with configurable load-switch mode. All rails support EEPROM-stored default voltages and sequencing states.

Key Specifications

Parameter Value and Actual Design Meaning
Input Voltage Range VSYS: 2.5 V to 5.5 V; supports pre-regulator integration and cold-start operation down to –55°C.
Buck1 Output Current 3.5 A continuous; enables core rail supply for high-performance MPUs like AM64x without external current sharing.
Buck2/Buck3 Output Current 2 A each; provides dedicated power for DDR memory and peripheral subsystems in multi-rail SoC designs.
LDO1/LDO2 Output Range 0.6 V to 3.4 V in 25 mV steps (≤1.4 V) or 100 mV steps (>1.4 V); supports precise SD-card I/O voltage selection and dynamic scaling.
I²C Interface Speed Standard (100 kHz), fast-mode (400 kHz), and fast-mode+ (1 MHz); enables real-time rail reconfiguration during system runtime.
Operating Temperature –55°C to +125°C ambient; qualified for extended-life-cycle space, avionics, and ruggedized industrial applications.
Quiescent Current (ACTIVE) 250–500 µA (–40°C to +150°C); maintains ultra-low standby power while retaining full sequencing and monitoring functionality.

Pinout & Package

TPS6522005-EP uses a 32-pin QFN package (5.00 mm × 5.00 mm) with exposed thermal pad (PGND) requiring direct PCB ground plane connection via multiple vias for thermal and electrical integrity.

Pin/Terminal Circuit Role Design Meaning
FB_B1, FB_B2, FB_B3 Buck Feedback Inputs High-impedance (2.3–5 MΩ) nodes for closed-loop regulation; require external resistor dividers to set output voltage per EEPROM configuration.
LX_B1_1 / LX_B1_2, LX_B2, LX_B3 Buck Switch Node Outputs Power-switch terminals connecting to external inductors; dual LX pins for Buck1 reduce parasitic inductance and improve EMI performance.
PVIN_B1_1 / PVIN_B1_2, PVIN_B2, PVIN_B3, PVIN_LDO1–LDO34 Power Input Rails Dedicated input pins per regulator group; must be bypassed with ceramic capacitors (4.7 µF min for bucks, 2.2 µF min for LDOs) referenced to VSYS.
VSEL_SD/VSEL_DDR, MODE/RESET, MODE/STBY Multi-Function Pins Configurable I/Os supporting SD-card voltage selection, warm/cold reset triggering, and PWM/STBY mode control-no external logic required.
SCL / SDA I²C Serial Interface Open-drain bidirectional bus pins; require external pull-ups to VIO (≤3.4 V) and support hot-plug-safe communication with SoC host.
nINT / nRSTOUT / GPO1 / GPO2 / GPIO Programmable Digital I/O Open-drain outputs or bidirectional pins controlled by sequencer state machine; used for fault signaling, rail enable, or inter-PMIC synchronization.

Key Features

Feature Design Value
EEPROM Programmability Non-volatile storage of default voltages, sequencing order, timing delays, and fault response-enables one-time configuration without host firmware dependency.
Dynamic Voltage Scaling (DVS) All three buck converters support real-time output voltage adjustment via I²C write, enabling adaptive power management for CPU frequency scaling.
Multi-PMIC Scalability Supports synchronized operation of ≥2 devices using GPIO/MODE pins; allows seamless expansion to >14 regulated rails without additional control logic.
Functional Safety Capability Includes voltage monitors (UV/OVP), thermal shutdown, and fault reporting via nINT; meets requirements for safety-critical subsystems per ISO 26262/IEC 61508.
Low-IQ PFM/PWM Operation Sub-10 µA quiescent current per buck in PFM mode at light load; transitions seamlessly to fixed-frequency PWM under heavy load to maintain regulation accuracy.

Applications

Industrial MPU Power Space-Qualified Avionics

Use Scenario: Powering TI AM62x/AM64x processors in low-power industrial gateways operating at –40°C to +85°C ambient.

IC Role / Device Role / Timing Role: Primary PMIC supplying core, memory, and I/O rails with programmable startup sequence and dynamic voltage scaling.

Use Value: Eliminates need for discrete sequencing ICs and reduces BOM count by integrating 7 regulated outputs with EEPROM-configurable defaults.

Use Scenario: Providing fault-tolerant power to FPGAs and ADCs in satellite payload electronics exposed to total ionizing dose (TID) >100 krad(Si).

IC Role / Device Role / Timing Role: Radiation-hardened PMIC delivering stable, monitored rails across –55°C to +125°C with built-in UV/OVP detection and reset assertion.

Use Value: Meets MIL-PRF-38535 Class V requirements and extends mission life through controlled baseline, traceable sourcing, and extended product lifecycle support.

Defense Radar Signal Processing Medical Imaging Subsystem

Use Scenario: Supplying multi-rail power to high-speed ADC/DAC and DSP clusters in airborne radar front-ends with rapid thermal cycling.

IC Role / Device Role / Timing Role: Centralized power controller managing buck ramp-up/down timing, LDO bypass activation for SD-card interfaces, and synchronized reset propagation.

Use Value: Reduces design risk via pre-qualified thermal performance (RΘJB = 6.0°C/W) and eliminates manual sequencing logic in FPGA-based control planes.

Use Scenario: Powering image sensor arrays and low-noise analog front-ends in portable ultrasound systems requiring ultra-low EMI and strict voltage accuracy.

IC Role / Device Role / Timing Role: Low-noise PMIC delivering tightly regulated 1.2 V, 1.8 V, and 3.3 V rails with <±1.5% DC accuracy in forced PWM mode and <±3.5% in auto-PFM.

Use Value: Enables clean analog signal paths by minimizing switching noise coupling through independent buck/LDO domains and optimized layout guidance (SLVSH09A §7.4).

Equivalent & Alternatives

The following parts are listed as comparable options for similar PMIC applications.

Alternative Part Technical Difference Application Difference Selection Advice
TPS6521905-EP Same 32-pin QFN footprint and –55°C to +125°C rating, but integrates only two 2-A bucks and three LDOs; lacks Buck1's 3.5-A capability and EEPROM programmability. Targeted at lower-complexity SoCs (e.g., AM335x) where fewer rails and fixed sequencing suffice. Select when BOM cost reduction outweighs need for DVS, multi-PMIC sync, or SD-card LDO bypass mode.
LM63625Q-Q1 Automotive-grade 2.5-A buck (AEC-Q100 Grade 1), no LDOs or I²C interface; operates only up to +125°C junction, not ambient. Designed for automotive infotainment and ADAS ECUs-not qualified for space, defense, or extended-temperature industrial use. Choose only for automotive production programs requiring ASIL-B compliance and no multi-rail integration requirement.

Compared with TPS6521905-EP and LM63625Q-Q1, the TPS6522005-EP uniquely delivers 3.5-A core rail capability, EEPROM-based sequencing, and full SD-card LDO support in a single die-making it the only option for AM64x-based systems requiring radiation tolerance, extended temperature operation, and field-upgradable power policies.

Availability

TPS6522005-EP is available at Aetrix Electronics and suitable for defense electronics, aerospace avionics, and medical imaging systems requiring stable component supply across extended temperature ranges and long product lifecycles.

Supply support for TPS6522005-EP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of aerospace and defense component experience.

The TPS6522005-EP belongs to TI's Enhanced Product (EP) line-engineered for high-reliability applications demanding radiation tolerance, extended temperature operation, and controlled manufacturing baselines.

FAQ

What is the maximum allowable voltage difference between PVIN_Bx and VSYS for TPS6522005-EP?

The TPS6522005-EP specifies a maximum 200 mV voltage difference between any PVIN_Bx pin and VSYS. Exceeding this margin risks internal damage or undefined behavior, as confirmed in Section 5.1 Absolute Maximum Ratings. This constraint ensures safe operation of internal level-shifted gate drivers and prevents overstress on bootstrap circuitry during transient conditions.

Does TPS6522005-EP support simultaneous power-up of all rails?

Yes, TPS6522005-EP supports fully programmable power sequencing-including simultaneous power-up-via its EEPROM-configurable state machine. The device allows setting independent delay timers, voltage ramps, and enable/disable dependencies between all seven output rails, enabling custom startup profiles for complex SoCs like AM64x without external hardware.

Can TPS6522005-EP operate without I²C communication after initial programming?

Yes, TPS6522005-EP retains all EEPROM-programmed settings-including default voltages, sequencing order, and fault responses-and functions autonomously without I²C connectivity. The I²C interface is optional for runtime reconfiguration or diagnostics; basic power delivery proceeds entirely from stored NVM data upon VSYS application.

What is the minimum output capacitance required per buck converter in TPS6522005-EP?

The TPS6522005-EP requires a minimum 10 µF output capacitance per buck converter in forced PWM or auto-PFM low-bandwidth configurations, as specified in Section 5.3 Recommended Operating Conditions (Table 3.1.9a). Using less capacitance may cause instability, excessive ripple, or failure to meet transient response specifications under load steps.

How does TPS6522005-EP handle undervoltage lockout (UVLO) on the VSYS rail?

The TPS6522005-EP implements a trimmed VSYS UVLO threshold of 2.175 V to 2.25 V (falling) with 130 mV hysteresis, ensuring clean power-on reset and preventing brownout operation. This behavior is hard-coded in silicon and independent of EEPROM settings, providing deterministic POR behavior across the full –55°C to +125°C temperature range.

V62/23634-01XE Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Series:
-
Package/Case:
32-VFQFN Exposed Pad
Packaging:
Tape & Reel (TR)
Product Status:
Active
Topology:
Step-Down (Buck)
Number of Outputs:
3
Frequency - Switching:
2.3MHz
Voltage/Current - Output 1:
0.6V ~ 3.4V, 400mA
Voltage/Current - Output 2:
0.6V ~ 3.4V, 400mA
Voltage/Current - Output 3:
0.6V ~ 3.4V, 300mA
w/LED Driver:
No
w/Supervisor:
Yes
w/Sequencer:
Yes
Voltage - Supply:
2.5V ~ 5.5V
Operating Temperature:
-55°C ~ 125°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
32-VQFN (5x5)

V62/23634-01XE FAQ

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Please submit a Request for Quotation (RFQ) for V62/23634-01XE on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

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The price and inventory of V62/23634-01XE are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for V62/23634-01XE is usually 5 days.

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5.How can I obtain technical support or documentation for V62/23634-01XE?

For technical support, including V62/23634-01XE datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your V62/23634-01XE requirements.

6.How does Aetrix verify that V62/23634-01XE is sourced from the original manufacturer or authorized distributors?

All V62/23634-01XE products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that V62/23634-01XE meets industry standards.

7.What is the process for return or replacement of V62/23634-01XE?

All V62/23634-01XE units undergo pre-shipment inspection (PSI). If there is an issue with V62/23634-01XE, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The V62/23634-01XE part is unused and in its original packaging.

Return procedure for V62/23634-01XE:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

V62/23634-01XE Tags

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