Winbond Electronics Corporation W25Q10EWUXIE TR
- Part No.:
- W25Q10EWUXIE TR
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 8-UFDFN Exposed Pad
- Datasheet:
-
W25Q10EWUXIE TR.pdf
- Description:
- IC FLASH 1MBIT SPI/QUAD 8USON
- Quantity:
- Payment:

- Shipping:

Inventory:3,655
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Product details
Overview
W25Q10EWUXIE TR from Winbond is a 1 M-bit (128 KB) serial NOR flash memory IC supporting Standard, Dual, and Quad SPI interfaces with 4 KB uniform sectors, 1.65–1.95 V single-supply operation, and up to 104 MHz clock frequency - used for code storage, XIP execution, and parameter retention in space-constrained embedded systems.
For engineers reviewing the W25Q10EWUXIE TR datasheet, W25Q10EWUXIE TR pinout, W25Q10EWUXIE TR application, or W25Q10EWUXIE TR equivalent, key selection considerations include Quad SPI enable (QE bit), /WP and /HOLD dual-function behavior in Quad mode, 4 KB sector granularity for firmware partitioning, and USON 2×3 mm package compatibility with high-density PCB layouts.
Technical Context
The W25Q10EWUXIE TR implements a SPI-compatible command set with three operational modes: Standard SPI (DI/DO), Dual SPI (IO0/IO1), and Quad SPI (IO0–IO3), where IO2 and IO3 are remapped from /WP and /HOLD only after setting the non-volatile Quad Enable (QE) bit in Status Register-2. It supports erase suspend/resume, auto-increment read, and JEDEC-standard SFDP for configurable timing parameters.
Its memory array comprises 512 pages of 256 bytes each, organized into 32 × 4 KB sectors, 4 × 32 KB blocks, and 2 × 64 KB blocks. Write protection combines volatile/non-volatile status register bits (BP2–BP0, TB, SEC, CMP, SRP/SRL) with hardware /WP pin control - active low and disabled during Quad SPI operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 1 M-bit (128 KB) - sufficient for bootloader + firmware image in ultra-compact MCU applications. |
| Supply Voltage | 1.65–1.95 V - enables direct interface with 1.8 V logic domains without level shifting. |
| SPI Clock Max | 104 MHz - delivers up to 416 MB/s effective throughput in Quad I/O mode (104 MHz × 4). |
| Page Program Time | < 1 ms for up to 256 bytes - supports fast field updates and runtime configuration writes. |
| Sector Erase Size | 4 KB uniform sectors - allows fine-grained firmware partitioning (e.g., separate boot/code/config sectors). |
| Data Retention | > 20 years - ensures long-term reliability in industrial and automotive control modules. |
| Endurance | 100,000 program/erase cycles per sector - suitable for logging and parameter storage with frequent updates. |
Pinout & Package
W25Q10EWUXIE TR uses an 8-pad USON (2 mm × 3 mm, 0.6 mm height) package (package code UX), optimized for high-density PCBs and automated assembly. Pin functions are identical to SOIC/VSOP variants but in compact surface-mount layout.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 /CS | Chip Select Input | Active-low enable; must transition high→low after power-up before first instruction; tracks VCC during startup. |
| 2 DO (IO1) | Data Output / I/O1 | Unidirectional output in Standard SPI; bidirectional I/O in Dual/Quad SPI; high-impedance when /CS high or /HOLD active. |
| 3 /WP (IO2) | Write Protect Input / I/O2 | Hardware write lock for status register; repurposed as IO2 in Quad SPI when QE=1; inactive in Quad mode. |
| 4 GND | Ground Reference | Primary return path for all I/O and core logic; requires low-impedance connection to minimize noise coupling. |
| 5 DI (IO0) | Data Input / I/O0 | Unidirectional input in Standard SPI; bidirectional I/O in Dual/Quad SPI; used for instruction/address/data loading. |
| 6 CLK | Serial Clock Input | Edge-triggered timing reference; supports SPI Modes 0 and 3; must be stable before /CS assertion. |
| 7 /HOLD (IO3) | Hold Input / I/O3 | Pauses ongoing SPI transaction; repurposed as IO3 in Quad SPI when QE=1; disabled in Quad mode. |
| 8 VCC | Power Supply | 1.65–1.95 V supply; decoupling capacitor (≥100 nF) required within 3 mm of pin for stable read/write timing. |
Key Features
| Feature | Design Value |
|---|---|
| Quad SPI Enable (QE bit) | Non-volatile Status Register-2 bit enabling 4-line I/O for 4× bandwidth boost - requires explicit write before Quad instructions. |
| Erase/Program Suspend | Allows pausing long erase/program operations to service interrupts - resumes from exact byte address without data loss. |
| Security Registers | Three 256-byte OTP-lockable registers for keys or calibration data - protected by volatile/non-volatile lock bits (LB[3:1]). |
| SFDP Support | JEDEC JESD216-compliant Serial Flash Discoverable Parameters register - enables automatic timing configuration by host controller. |
| Unique 64-bit ID | Factory-programmed serial number readable via 4Bh instruction - enables device authentication and secure firmware binding. |
Applications
| IoT Edge Node Firmware Storage | Industrial PLC Bootloader Memory |
|---|---|
|
Use Scenario: Storing signed firmware images and OTA update payloads in battery-powered sensor nodes with strict size and power constraints. IC Role / Device Role / Timing Role: Non-volatile code storage with XIP-capable Quad SPI interface for low-latency boot and secure firmware validation. Use Value: 4 KB sector granularity enables atomic firmware swap; 1 µA power-down current extends battery life between wake-ups. |
Use Scenario: Holding bootloader, FPGA configuration bitstream, and real-time control logic in DIN-rail mounted programmable logic controllers. IC Role / Device Role / Timing Role: Primary boot memory mapped via SPI host controller; supports fast read (104 MHz) and robust write protection against EMI-induced corruption. Use Value: Hardware /WP pin + BP bits prevent accidental overwrite during brown-out events; -40°C to +85°C rating ensures operation in harsh enclosures. |
| Automotive ADAS Camera Module | Medical Wearable Configuration Storage |
|
Use Scenario: Storing camera calibration data, lens distortion maps, and firmware patches in compact rear-view or surround-view camera modules. IC Role / Device Role / Timing Role: Parameter and code storage with deterministic 4 KB erase boundaries for safe field updates without disrupting active imaging. Use Value: Uniform 4 KB sectors allow isolated calibration data updates; USON 2×3 mm footprint fits tight optical module PCBs. |
Use Scenario: Retaining user preferences, sensor calibration offsets, and regulatory compliance logs in FDA-cleared wearable health monitors. IC Role / Device Role / Timing Role: Secure, long-life data archive with OTP-locked security registers for cryptographic keys and device identity. Use Value: 20-year data retention meets medical device shelf-life requirements; 100K endurance supports daily usage over 10+ years. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Winbond W25Q10JWUXIE TR | Same density and USON package, but rated for -40°C to +125°C extended temperature range and AEC-Q100 Grade 3 qualified. | Required for under-hood automotive applications; not necessary for commercial/industrial ambient use. | Select W25Q10JWUXIE TR only if AEC-Q100 qualification or >85°C operation is mandated. |
| Micron MT25QL128ABA1EW9-0SIT | 128 MB (1 G-bit), 3 V supply, different command set (SFDP v1.6), no /HOLD pin, and larger 8-pin SOIC package. | Not pin-compatible; requires PCB redesign and firmware driver adaptation due to voltage and protocol differences. | Consider only for new designs needing higher density and 3 V compatibility - not a drop-in replacement for W25Q10EWUXIE TR. |
Compared with W25Q10JWUXIE TR, the W25Q10EWUXIE TR lacks automotive qualification but offers lower cost and same 1.8 V operation; versus MT25QL128ABA1EW9-0SIT, it provides true pin-and-command compatibility across Winbond's 25Q family but at lower density and voltage range.
Availability
W25Q10EWUXIE TR is available at Aetrix Electronics and suitable for IoT edge node firmware storage, industrial PLC bootloader memory, and automotive ADAS camera module applications requiring stable component supply, long-lifecycle support, and consistent USON 2×3 mm packaging.
Supply support for W25Q10EWUXIE TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor company specializing in specialty DRAM, mobile DRAM, and serial flash memory solutions since 1987.
The W25Q series - including W25Q10EWUXIE TR - was designed for embedded systems requiring high-speed, low-voltage, space-efficient code and data storage with robust SPI interface flexibility.
FAQ
What is the operating voltage range of the W25Q10EWUXIE TR?
The W25Q10EWUXIE TR operates from 1.65 V to 1.95 V - a strict 1.8 V nominal supply range. This eliminates need for external level shifters when interfacing with 1.8 V microcontrollers or FPGAs. Operation outside this range may cause undefined behavior or permanent damage; the device resets automatically if VCC falls below the VWI threshold during power-up.
Does the W25Q10EWUXIE TR support Quad SPI mode out of the box?
No - the W25Q10EWUXIE TR requires explicit configuration to enable Quad SPI. The non-volatile Quad Enable (QE) bit in Status Register-2 must be set using the Write Status Register instruction (31h). Until QE=1, pins /WP and /HOLD remain functional as hardware controls and cannot serve as IO2/IO3.
How many program/erase cycles does the W25Q10EWUXIE TR guarantee per sector?
The W25Q10EWUXIE TR guarantees a minimum of 100,000 program/erase cycles per 4 KB sector. This endurance rating applies under specified operating conditions (1.65–1.95 V, -40°C to +85°C) and is validated per JEDEC standards - making it suitable for applications involving frequent firmware updates or runtime parameter logging.
What package type does the W25Q10EWUXIE TR use, and what are its dimensions?
The W25Q10EWUXIE TR uses an 8-pad USON (Ultra Thin Small Outline No-lead) package with dimensions 2.0 mm × 3.0 mm × 0.6 mm (L×W×H). This land-grid package features bottom-side pads only - no leads - and is compatible with standard reflow soldering profiles for high-volume SMT assembly.
Can the /WP and /HOLD pins be used simultaneously with Quad SPI on the W25Q10EWUXIE TR?
No - when Quad SPI is enabled (QE=1), the /WP and /HOLD pins are reassigned as IO2 and IO3 respectively and lose their hardware protection and hold functionality. To retain /WP or /HOLD behavior, Quad SPI must be disabled (QE=0), reverting to Standard or Dual SPI mode where those pins operate as dedicated control inputs.
W25Q10EWUXIE TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 8-UFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 1Mbit
- Memory Organization:
- 128K x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 30µs, 800µs
- Access Time:
- 6 ns
- Voltage - Supply:
- 1.65V ~ 1.95V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-USON (2x3)
W25Q10EWUXIE TR FAQ
1.How can I place an order for W25Q10EWUXIE TR through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q10EWUXIE TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q10EWUXIE TR reliable?
The price and inventory of W25Q10EWUXIE TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q10EWUXIE TR is usually 5 days.
3.What payment methods are accepted for W25Q10EWUXIE TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q10EWUXIE TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q10EWUXIE TR?
W25Q10EWUXIE TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q10EWUXIE TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q10EWUXIE TR?
For technical support, including W25Q10EWUXIE TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q10EWUXIE TR requirements.
6.How does Aetrix verify that W25Q10EWUXIE TR is sourced from the original manufacturer or authorized distributors?
All W25Q10EWUXIE TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q10EWUXIE TR meets industry standards.
7.What is the process for return or replacement of W25Q10EWUXIE TR?
All W25Q10EWUXIE TR units undergo pre-shipment inspection (PSI). If there is an issue with W25Q10EWUXIE TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q10EWUXIE TR part is unused and in its original packaging.
Return procedure for W25Q10EWUXIE TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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