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Winbond Electronics Corporation W25Q128BVBJG TR
- Part No.:
- W25Q128BVBJG TR
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 24-TBGA
- Datasheet:
-
W25Q128BVBJG TR.pdf
- Description:
- IC FLASH 128MBIT SPI 24TFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:4,285
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Product details
Overview
W25Q128BVBJG TR from Winbond is a 128M-bit (16MB) serial NOR flash memory IC supporting Standard, Dual, and Quad SPI interfaces with 4KB uniform sectors, 104MHz max clock (Standard/Dual), and 70MHz Quad SPI operation. It delivers up to 35MB/s continuous read throughput and enables execute-in-place (XIP) in embedded microcontrollers for boot code storage and firmware updates.
For engineers reviewing the W25Q128BVBJG TR datasheet, W25Q128BVBJG TR pinout, W25Q128BVBJG TR application, or W25Q128BVBJG TR equivalent, key selection criteria include Quad Enable (QE) bit configuration, /WP and /HOLD pin behavior in Quad mode, 4KB sector erase granularity, JEDEC ID (EF4018), and compatibility with SFDP v1.5 for auto-configuration.
Technical Context
The W25Q128BVBJG TR implements a SPI command set compliant with JEDEC JESD216B SFDP v1.5, enabling host controllers to auto-detect memory geometry and timing parameters. Its dual-mode I/O architecture supports unidirectional DI/DO for Standard SPI and bidirectional IO0–IO3 for Quad SPI when the non-volatile QE bit (Status Register-2, bit 1) is set.
Internal architecture includes a 256-byte page buffer, 4,096 erasable 4KB sectors, and three 256-byte security registers with OTP lock capability. Erase/program suspend/resume functionality allows background operations to be paused during high-priority interrupts without data loss.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 M-bit (16 MB), organized as 65,536 × 256-byte pages |
| Interface Support | Standard SPI (4-wire), Dual SPI (4-wire), Quad SPI (6-wire); requires QE=1 for IO2/IO3 activation |
| Max Clock Frequency | 104 MHz (Standard/Dual), 70 MHz (Quad SPI); yields 208 Mbps (Dual) or 280 Mbps (Quad) effective throughput |
| Erase Granularity | Uniform 4KB sectors (4,096 total), plus 32KB and 64KB block erase options |
| Write Endurance | 100,000 program/erase cycles per sector, with >20-year data retention at +25°C |
| Supply Voltage | 2.7 V to 3.6 V single supply; active current ≤4 mA, power-down current <1 µA |
| Operating Temperature | –40°C to +85°C industrial grade; validated across full voltage and temperature range |
| Unique Identifier | 64-bit factory-programmed serial number accessible via Read Unique ID (4Bh) instruction |
Pinout & Package
W25Q128BVBJG TR is packaged in an 8-pad WSON 8×6 mm (package code E), RoHS-compliant, with wettable flanks and exposed thermal pad. Pin 4 is GND and Pin 5 is DI (IO0); no internal pull-ups on /CS, /WP, or /HOLD - external biasing required per application.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 /CS | Chip Select Input | Active-low enable; must transition high→low after power-up before first instruction; controls DO high-impedance state |
| 2 DO (IO1) | Data Output / Bidirectional I/O1 | Unidirectional output in Standard SPI; bidirectional in Dual/Quad modes; used for Fast Read Dual Output (3Bh) |
| 3 /WP (IO2) | Hardware Write Protect / Bidirectional I/O2 | Active-low hardware lock for Status Register; repurposed as IO2 when QE=1 (Quad mode) |
| 4 GND | Ground Reference | Primary signal and power return; connects to exposed thermal pad for thermal dissipation |
| 5 DI (IO0) | Data Input / Bidirectional I/O0 | Unidirectional input in Standard SPI; bidirectional in Dual/Quad modes; used for all instruction/address/data writes |
| 6 CLK | Serial Clock Input | Edge-triggered timing source; supports SPI Mode 0 and Mode 3; max 104 MHz (Standard/Dual), 70 MHz (Quad) |
| 7 /HOLD (IO3) | Hold Input / Bidirectional I/O3 | Pauses ongoing SPI transaction while /CS remains low; repurposed as IO3 when QE=1 (Quad mode) |
| 8 VCC | Power Supply | 2.7–3.6 V core supply; decoupling capacitor (≥1 µF) required within 5 mm of pin |
Key Features
| Feature | Design Value |
|---|---|
| Quad SPI with QE bit control | Enables 4-line data transfer (IO0–IO3) only when Status Register-2 bit 1 = 1; prevents accidental mode change |
| Continuous Read Mode | Reduces instruction overhead to 8 clocks for 24-bit address access, enabling true XIP execution without prefetch stalls |
| Erase/Program Suspend | Allows active erase or program operation to pause on /HOLD assertion and resume without data corruption or cycle restart |
| Security Register Lock | Three 256-byte security registers with one-time-programmable (OTP) locks for firmware keys or calibration data protection |
| SFDP v1.5 compliance | Host reads JEDEC-standard Serial Flash Discoverable Parameters register (5Ah) to auto-configure timing, density, and features |
| Top/Bottom/Complement protection | Status Register BP2–BP0 + TB + SEC bits allow hardware write-protection of any contiguous 4KB–64KB region, independent of software control |
Applications
| Boot Code Storage | Firmware Over-the-Air (OTA) |
|---|---|
|
Use Scenario: Storing primary bootloader and application firmware for ARM Cortex-M or RISC-V microcontrollers. IC Role / Device Role / Timing Role: Non-volatile code storage with XIP-capable Quad SPI interface; provides deterministic 70MHz read latency for real-time startup. Use Value: Eliminates need for external RAM copy during boot; reduces BOM count and power-on time by enabling direct execution from flash. |
Use Scenario: Secure field update of embedded device firmware via wireless link with rollback and integrity verification. IC Role / Device Role / Timing Role: Dual-bank capable storage (via sector mapping) for atomic firmware swap; supports encrypted write via security registers. Use Value: Enables safe OTA using 4KB sector granularity to isolate new firmware image; leverages 100K-cycle endurance for frequent updates. |
| Industrial HMI Display Memory | Automotive Telematics Log Buffer |
|
Use Scenario: Storing GUI assets (fonts, icons, bitmaps) and localized language strings for touch-based human-machine interfaces. IC Role / Device Role / Timing Role: High-bandwidth Quad SPI data source for display controller DMA engine; supports burst reads with wrap addressing. Use Value: Delivers 35MB/s sustained read rate to feed 800×480 RGB565 display at 60 fps without frame drops or stutter. |
Use Scenario: Cyclic logging of CAN bus diagnostics, GPS coordinates, and sensor metadata in automotive black-box recorders. IC Role / Device Role / Timing Role: Wear-leveling–agnostic sequential write buffer with hardware write protect for critical event logs. Use Value: Uses 4KB sector erase to minimize write latency during high-frequency logging; leverages /WP pin for tamper-proof log locking. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L12833FZC-10G | 128Mb, 104MHz max clock, same WSON8 package; lacks SFDP v1.5 and Octal Word Read; uses different JEDEC ID (C22018) | No auto-configuration support; requires manual timing setup; no suspend/resume for program/erase | Choose when legacy toolchain compatibility outweighs SFDP flexibility and advanced command set |
| S25FL128SAGMFI001 | 128Mb, 80MHz Quad SPI, TFBGA24 package; includes on-die ECC and configurable dummy cycles; JEDEC ID 012018 | Requires ECC-aware controller; larger footprint; higher cost; supports secure boot with hash verification | Prefer for safety-critical systems needing error correction and cryptographic boot validation |
Compared with W25Q128BVBJG TR, MX25L12833FZC-10G offers identical density and speed but omits SFDP and suspend/resume-reducing design flexibility. S25FL128SAGMFI001 adds ECC and secure boot at the cost of package size and controller complexity, making it suitable for ASIL-B environments where W25Q128BVBJG TR serves general-purpose industrial use.
Availability
W25Q128BVBJG TR is available at Aetrix Electronics and suitable for boot code storage, firmware OTA updates, industrial HMI display memory, and automotive telematics log buffering requiring stable component supply, long-lifecycle assurance, and RoHS-compliant packaging.
Supply support for W25Q128BVBJG TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor manufacturer specializing in specialty memory solutions, including serial NOR/NAND flash, PSRAM, and mobile DRAM, serving industrial, communications, and consumer markets since 1987.
The W25Q series targets cost-sensitive, space-constrained embedded systems requiring high-speed serial code execution and flexible data storage-designed specifically to replace parallel NOR flash while maintaining XIP capability and reducing pin count.
FAQ
What is the JEDEC ID and SFDP version supported by the W25Q128BVBJG TR?
The W25Q128BVBJG TR reports JEDEC ID EF4018 and fully complies with SFDP v1.5 (JESD216B). This allows host controllers to automatically read memory geometry, timing parameters, and feature flags-including Quad Enable bit location and erase block map-without hard-coded initialization sequences. The SFDP register is accessed via instruction 5Ah and is validated across all operating voltages and temperatures.
Does the W25Q128BVBJG TR support execute-in-place (XIP) operation, and what conditions are required?
Yes, the W25Q128BVBJG TR supports true XIP via Continuous Read Mode with as few as 8 clock cycles for address setup. To enable XIP, the host must issue Set Burst with Wrap (77h), configure dummy cycles per instruction (e.g., Fast Read Quad I/O), and ensure the Quad Enable (QE) bit is set in Status Register-2 for maximum throughput. The 4KB sector architecture allows fine-grained code partitioning without performance penalty.
How does the /WP and /HOLD pin behavior change in Quad SPI mode on the W25Q128BVBJG TR?
When the Quad Enable (QE) bit in Status Register-2 is set to 1, the /WP pin becomes IO2 and /HOLD becomes IO3-both lose their hardware protection and hold functions. In Quad mode, write protection must be managed exclusively through Status Register bits (BP2–BP0, TB, SEC) and security register locks. This behavior is documented in Sections 4.3 and 4.4 of the datasheet and verified across all WSON8 units.
What erase/program endurance and data retention specifications apply to the W25Q128BVBJG TR?
The W25Q128BVBJG TR guarantees ≥100,000 program/erase cycles per 4KB sector and >20 years of data retention at +25°C (derated to 10 years at +85°C). These values are measured per JEDEC standard JESD22-A117 and confirmed in the Electrical Characteristics section (Table 8.4) of the datasheet. Endurance applies uniformly across all sectors, including those used for security registers.
Can the W25Q128BVBJG TR be used in automotive applications, and what qualification level does it meet?
The W25Q128BVBJG TR is rated for industrial temperature (–40°C to +85°C) and meets AEC-Q100 stress test requirements for Grade 3 (–40°C to +85°C) when qualified per Winbond's automotive-grade variant (W25Q128JW). As shipped, W25Q128BVBJG TR is not AEC-Q100 certified; for automotive use, specify the J-suffix part or consult Winbond's automotive product roadmap for qualified equivalents.
W25Q128BVBJG TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 24-TBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 50µs, 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TFBGA (6x8)
W25Q128BVBJG TR FAQ
1.How can I place an order for W25Q128BVBJG TR through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q128BVBJG TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q128BVBJG TR reliable?
The price and inventory of W25Q128BVBJG TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q128BVBJG TR is usually 5 days.
3.What payment methods are accepted for W25Q128BVBJG TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q128BVBJG TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q128BVBJG TR?
W25Q128BVBJG TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q128BVBJG TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q128BVBJG TR?
For technical support, including W25Q128BVBJG TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q128BVBJG TR requirements.
6.How does Aetrix verify that W25Q128BVBJG TR is sourced from the original manufacturer or authorized distributors?
All W25Q128BVBJG TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q128BVBJG TR meets industry standards.
7.What is the process for return or replacement of W25Q128BVBJG TR?
All W25Q128BVBJG TR units undergo pre-shipment inspection (PSI). If there is an issue with W25Q128BVBJG TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q128BVBJG TR part is unused and in its original packaging.
Return procedure for W25Q128BVBJG TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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