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Winbond Electronics Corporation W25Q128BVBJP
- Part No.:
- W25Q128BVBJP
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 24-TBGA
- Datasheet:
-
W25Q128BVBJP.pdf
- Description:
- IC FLASH 128MBIT SPI 24TFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:2,891
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Product details
Overview
W25Q128BVBJP from Winbond is a 128M-bit (16MB) serial NOR flash memory IC supporting Standard, Dual, and Quad SPI interfaces with up to 104MHz clock rate, 4KB uniform sector architecture, and true execute-in-place (XIP) capability for embedded code storage. It operates from 2.7V–3.6V, draws 4mA active current and <1µA in power-down mode, and is qualified for industrial temperature range (−40°C to +85°C).
For engineers reviewing the W25Q128BVBJP datasheet, W25Q128BVBJP pinout, W25Q128BVBJP application, or W25Q128BVBJP equivalent, key selection criteria include Quad SPI timing compliance (QE bit enabled), 4KB sector erase granularity, hardware write protection via /WP pin, and compatibility with continuous read mode for low-overhead XIP operation.
Technical Context
The W25Q128BVBJP implements a flexible SPI command set including Fast Read Quad I/O (EBh), Word Read Quad I/O (E7h), and Octal Word Read Quad I/O (E3h), enabling up to 280MHz equivalent data throughput. Its dual-mode I/O architecture uses IO0–IO3 for Quad SPI only when the non-volatile Quad Enable (QE) bit in Status Register-2 is set - otherwise /WP and /HOLD retain dedicated control functions.
Internally, the device features a 65,536-page (256-byte/page) array organized into 4,096 erasable 4KB sectors and 256 erasable 64KB blocks. Erase/program suspend/resume functionality, 64-bit unique serial number, SFDP register, and three 256-byte security registers with OTP locks support secure, field-upgradable firmware storage in resource-constrained systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 M-bit (16 MB), sufficient for full MCU boot images and firmware binaries |
| Sector Size | Uniform 4 KB sectors - enables fine-grained parameter/data partitioning without block-level over-erase |
| Max SPI Clock | 104 MHz (Standard/Dual), 70 MHz (Quad) - supports 208 Mbps Dual and 280 Mbps Quad effective throughput |
| Write/Erase Endurance | 100,000 cycles - ensures long-term reliability in frequent OTA update or logging applications |
| Data Retention | 20 years at +85°C - validated for industrial lifecycle requirements without refresh |
| Supply Voltage | 2.7 V to 3.6 V - compatible with standard 3.3 V logic rails and brown-out tolerant power domains |
| Operating Temp | −40°C to +85°C - meets industrial-grade environmental qualification |
| Power-Down Current | <1 µA - enables ultra-low-power sleep states in battery-backed or energy-harvesting systems |
Pinout & Package
W25Q128BVBJP is supplied in an 8-pad WSON 8×6-mm package (JEDEC MO-252, package code E), optimized for high-density PCB layouts with minimal footprint and thermal resistance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| /CS | Chip Select Input | Active-low enable controlling SPI transaction initiation and DO high-impedance state when deselected |
| DO (IO1) | Data Output / Bidirectional I/O1 | Unidirectional output in Standard SPI; bidirectional data lane in Dual/Quad SPI (requires QE=1 for Quad) |
| /WP (IO2) | Write Protect Input / Bidirectional I/O2 | Hardware lock for status register writes; repurposed as IO2 in Quad SPI when QE=1 |
| GND | Ground Reference | Common return path for all digital and analog circuitry; critical for noise immunity in high-speed SPI |
| DI (IO0) | Data Input / Bidirectional I/O0 | Unidirectional input in Standard SPI; bidirectional data lane in Dual/Quad SPI (requires QE=1 for Quad) |
| CLK | Serial Clock Input | Edge-triggered timing reference for all SPI operations; supports Mode 0 and Mode 3 clock polarity/phasing |
| /HOLD (IO3) | Hold Input / Bidirectional I/O3 | Pauses ongoing SPI transfer without deselecting device; repurposed as IO3 in Quad SPI when QE=1 |
| VCC | Power Supply | Single 2.7–3.6 V supply powering core logic, charge pumps, and I/O buffers |
Key Features
| Feature | Design Value |
|---|---|
| Quad SPI with QE bit control | Enables 4-lane I/O only after explicit non-volatile configuration - prevents accidental mode corruption during reset or power cycling |
| Continuous Read Mode | As few as 8 clocks overhead per 24-bit address access - eliminates instruction retransmission latency for true XIP execution |
| Erase/Program Suspend & Resume | Allows interruption of long erase/program cycles (e.g., during real-time interrupt handling) and deterministic resumption |
| 64-bit Unique Serial Number | Factory-programmed per-device ID - supports secure device authentication, firmware binding, and anti-cloning in production |
| Security Registers (3 × 256B) | OTP-lockable zones for keys, certificates, or calibration data - isolated from main array with independent write/lock controls |
| SFDP Register Support | JEDEC JESD216-compliant parameter table - enables automatic host driver configuration without hard-coded timing assumptions |
Applications
| Industrial PLC Firmware Storage | Automotive ADAS Boot Memory |
|---|---|
|
Use Scenario: Storing boot firmware and safety-critical microcode in programmable logic controllers deployed in factory automation environments with wide temperature swings and EMI exposure. IC Role / Device Role / Timing Role: Primary non-volatile code storage executing directly via Quad SPI XIP, with hardware write protection preventing runtime corruption during brown-out events. Use Value: 4KB sector granularity allows independent updates to communication stacks without erasing motion-control algorithms; 20-year retention guarantees firmware integrity across 15+ year equipment lifecycles. |
Use Scenario: Hosting boot images and sensor fusion firmware for automotive camera/radar ECUs requiring ASIL-B compliant storage with fast startup and tamper resistance. IC Role / Device Role / Timing Role: Secure boot memory interfaced to ARM Cortex-R5/R7 via Quad SPI, leveraging SFDP for auto-negotiated timing and security registers for cryptographic key storage. Use Value: 64-bit unique ID binds firmware to hardware; suspend/resume enables deterministic interrupt response during OTA updates; −40°C to +85°C rating satisfies AEC-Q100 Grade 2 requirements. |
| Medical IoT Edge Node | Consumer Smart Home Hub |
|
Use Scenario: Storing encrypted firmware, patient calibration profiles, and audit logs in portable diagnostic devices powered by coin-cell batteries or energy harvesters. IC Role / Device Role / Timing Role: Low-power persistent memory supporting deep-sleep modes (<1 µA), with Quad SPI enabling rapid firmware validation on wake-up before sensor activation. Use Value: Ultra-low power-down current extends battery life beyond 5 years; security registers store device-specific encryption keys protected by OTP locks against physical extraction. |
Use Scenario: Holding Wi-Fi/Bluetooth stack binaries, voice assistant models, and user preference data in always-on smart home hubs with constrained board space and thermal budget. IC Role / Device Role / Timing Role: High-density code shadowing memory using Continuous Read Mode to minimize CPU wait states during firmware execution from flash. Use Value: 35 MB/s continuous transfer rate reduces boot time by >40% vs. legacy SPI flash; WSON 8×6-mm package saves >30% PCB area versus SOIC-16 alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L12835FZC-10G | 128Mb density, 104MHz max clock, but lacks Quad SPI I/O remapping (/WP and /HOLD remain dedicated pins); no SFDP register | Requires fixed pin assignment - unsuitable where Quad SPI I/O reuse is needed for pin-count reduction | Select when simpler hardware write protection suffices and host does not require JEDEC auto-configuration |
| S25FL128SAGMFI000 | 128Mb, 80MHz Quad SPI, includes built-in ECC and configurable 128-byte page write buffer; supports HyperBus interface option | Higher pin count (16-pin SOIC or BGA) and larger footprint; ECC adds complexity but improves reliability in high-radiation environments | Select for mission-critical applications needing error correction or future HyperBus upgrade path |
Compared with MX25L12835FZC-10G and S25FL128SAGMFI000, the W25Q128BVBJP offers superior pin multiplexing flexibility via QE-controlled I/O remapping and JEDEC-standardized SFDP discovery, making it optimal for compact, software-defined SPI configurations where layout efficiency and driver portability are prioritized.
Availability
W25Q128BVBJP is available at Aetrix Electronics and suitable for industrial PLCs, automotive ADAS modules, medical edge nodes, and consumer smart home hubs requiring stable component supply, long-term lifecycle assurance, and verified second-source compatibility.
Supply support for W25Q128BVBJP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor manufacturer specializing in specialty DRAM, serial flash, and mobile RAM solutions since 1987, with global manufacturing and quality certifications including ISO 9001 and IATF 16949.
The W25Q series was designed specifically for embedded code storage and XIP execution in space-, power-, and pin-constrained systems - emphasizing high-speed Quad SPI performance, robust data retention, and integrated security features for firmware integrity.
FAQ
What is the function of the Quad Enable (QE) bit in W25Q128BVBJP?
The Quad Enable (QE) bit is a non-volatile flag in Status Register-2 that must be set to '1' to activate Quad SPI mode. When QE=1, the /WP and /HOLD pins become IO2 and IO3 respectively, enabling four-lane bidirectional data transfer. The W25Q128BVBJP defaults to QE=0 at power-up, requiring explicit write to SR2 before Quad instructions like EBh or E7h will function correctly.
Does W25Q128BVBJP support execute-in-place (XIP) operation?
Yes, W25Q128BVBJP supports true XIP via its Continuous Read Mode, which reduces instruction overhead to as few as 8 clock cycles per 24-bit address access. This enables direct CPU execution from flash without copying to RAM, validated under Quad SPI Fast Read Quad I/O (EBh) and Word Read Quad I/O (E7h) commands at up to 70MHz clock rates.
How many erase cycles can W25Q128BVBJP endure per sector?
W25Q128BVBJP is rated for more than 100,000 program/erase cycles per 4KB sector. This endurance is guaranteed across the full operating temperature range (−40°C to +85°C) and applies uniformly to all 4,096 sectors, enabling reliable use in firmware update, logging, and configuration storage applications.
What package type is used for W25Q128BVBJP?
W25Q128BVBJP uses the 8-pad WSON 8×6-mm package (JEDEC MO-252, package code E), featuring exposed pad thermal enhancement and surface-mount compatibility. This compact footprint measures 8.0 mm × 6.0 mm × 0.75 mm and is RoHS-compliant, optimized for high-density PCB layouts in space-constrained embedded designs.
Can W25Q128BVBJP's /HOLD and /WP pins be used simultaneously with Quad SPI?
No - when Quad SPI is enabled (QE=1), the /HOLD and /WP pins are reassigned as IO3 and IO2 respectively and cannot perform their dedicated hold or write-protect functions. Hardware write protection must then rely solely on Status Register bits (BP2–BP0, TB, SEC), while pause functionality requires software-managed transaction sequencing instead of hardware /HOLD assertion.
W25Q128BVBJP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 24-TBGA
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 50µs, 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TFBGA (6x8)
W25Q128BVBJP FAQ
1.How can I place an order for W25Q128BVBJP through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q128BVBJP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q128BVBJP reliable?
The price and inventory of W25Q128BVBJP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q128BVBJP is usually 5 days.
3.What payment methods are accepted for W25Q128BVBJP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q128BVBJP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q128BVBJP?
W25Q128BVBJP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q128BVBJP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q128BVBJP?
For technical support, including W25Q128BVBJP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q128BVBJP requirements.
6.How does Aetrix verify that W25Q128BVBJP is sourced from the original manufacturer or authorized distributors?
All W25Q128BVBJP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q128BVBJP meets industry standards.
7.What is the process for return or replacement of W25Q128BVBJP?
All W25Q128BVBJP units undergo pre-shipment inspection (PSI). If there is an issue with W25Q128BVBJP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q128BVBJP part is unused and in its original packaging.
Return procedure for W25Q128BVBJP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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