Winbond Electronics Corporation W25Q128BVBJP TR
- Part No.:
- W25Q128BVBJP TR
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 24-TBGA
- Datasheet:
-
W25Q128BVBJP TR.pdf
- Description:
- IC FLASH 128MBIT SPI 24TFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
W25Q128BVBJP TR from Winbond is a 128M-bit (16MB) serial NOR flash memory with Dual/Quad SPI interface, organized into 65,536 pages of 256 bytes each and supporting 4KB sector, 32KB block, 64KB block, and chip erase. It operates on a single 2.7–3.6V supply, draws 4mA active current and <1µA in power-down mode, and delivers up to 35MB/s continuous read throughput via Fast Read Quad I/O (EBh). It is used for code shadowing, XIP execution, and firmware storage in embedded microcontrollers.
For engineers reviewing the W25Q128BVBJP TR datasheet, W25Q128BVBJP TR pinout, W25Q128BVBJP TR application, or W25Q128BVBJP TR equivalent, key selection criteria include Quad SPI timing compliance (70MHz clock, 280MHz equivalent), hardware write protection via /WP and /HOLD pins, JEDEC ID and SFDP register support, and compatibility with standard, dual, and quad SPI instruction sets including suspend/resume functionality.
Technical Context
The W25Q128BVBJP TR implements a SPI command-and-control logic architecture with dedicated page buffer, status register management (SR-1/SR-2), and high-voltage generators for erase/program operations. It supports SPI modes 0 and 3, and requires the non-volatile Quad Enable (QE) bit in Status Register-2 to activate IO2 (/WP) and IO3 (/HOLD) for Quad SPI operation.
Its flexible erase hierarchy includes uniform 4KB sectors (4,096 total), 32KB blocks (2,048), and 64KB blocks (256), enabling granular data retention control. The device integrates three 256-byte security registers with OTP locks, a 64-bit unique serial number, and SFDP register for discoverable parameter reporting - all accessible via defined instruction set (e.g., 4Bh, 5Ah).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 M-bit (16 MB), organized as 65,536 × 256-byte pages |
| Supply Voltage | 2.7 V to 3.6 V - enables direct integration with 3.3V logic systems without level shifting |
| Max Clock Frequency | 104 MHz (Dual SPI), 70 MHz (Quad SPI) - supports 208 Mbps dual-output and 280 Mbps quad-I/O transfer rates |
| Erase Granularity | 4 KB sector / 32 KB block / 64 KB block / full chip - allows precise firmware partitioning and field update safety |
| Write/Erase Endurance | 100,000 cycles minimum - ensures long-term reliability in frequent OTA update scenarios |
| Data Retention | 20 years at +25°C - meets industrial and automotive firmware storage longevity requirements |
| Operating Temperature | −40°C to +85°C - qualified for extended-temperature embedded applications |
| Power Consumption | 4 mA active, <1 µA power-down - reduces system-level standby power in battery-backed designs |
Pinout & Package
W25Q128BVBJP TR is packaged in an 8-pad WSON 8×6 mm (package code E), with exposed pad for thermal dissipation and space-constrained PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 /CS | Chip Select Input | Active-low enable signal; places DO/IO pins in high-impedance state when deasserted |
| 2 DO (IO1) | Data Output / Bidirectional I/O | Unidirectional output in Standard SPI; bidirectional IO1 in Dual/Quad SPI |
| 3 /WP (IO2) | Write Protect Input / Bidirectional I/O | Hardware write lock for status register; becomes IO2 in Quad SPI when QE=1 |
| 4 GND | Ground Reference | Primary return path for core and I/O circuitry; must be low-impedance |
| 5 DI (IO0) | Data Input / Bidirectional I/O | Unidirectional input in Standard SPI; bidirectional IO0 in Dual/Quad SPI |
| 6 CLK | Serial Clock Input | Synchronizes all SPI transfers; supports Mode 0 and Mode 3 clock polarity/phase |
| 7 /HOLD (IO3) | Hold Input / Bidirectional I/O | Pauses ongoing SPI transaction; becomes IO3 in Quad SPI when QE=1 |
| 8 VCC | Power Supply | Single 2.7–3.6V supply for core, I/O, and charge-pump circuits |
Key Features
| Feature | Design Value |
|---|---|
| Quad SPI with QE bit control | Enables 4-line I/O operation only after explicit non-volatile configuration of Status Register-2 bit QE=1 |
| Erase/Program Suspend & Resume | Allows interruption of long erase/program cycles (e.g., 4KB sector erase ~200ms) to service higher-priority tasks |
| 64-bit Unique Serial Number | Provides per-device identity for secure boot, anti-cloning, and firmware binding without external EEPROM |
| JEDEC-compliant SFDP Register | Exposes configurable parameters (e.g., erase sizes, timing, Quad Enable method) via standardized 5Ah instruction |
| Hardware + Software Write Protection | Combines /WP pin assertion with BP2/BP1/BP0, TB, SEC, CMP, SRP0/SRP1 bits for layered, hierarchical memory locking |
| Continuous Read Mode | Reduces instruction overhead to 8 clocks for address setup, enabling true execute-in-place (XIP) from SPI bus |
Applications
| Industrial PLC Firmware Storage | Automotive ADAS Boot Code |
|---|---|
|
Use Scenario: Storing firmware images and configuration data in programmable logic controllers deployed in factory automation environments. IC Role / Device Role / Timing Role: Non-volatile code and parameter storage with deterministic 4KB sector erase for safe field updates. Use Value: 20-year data retention and −40°C to +85°C operation ensure firmware integrity across decades of unattended operation in harsh industrial settings. |
Use Scenario: Hosting boot code and sensor calibration tables for radar and camera modules in advanced driver-assistance systems. IC Role / Device Role / Timing Role: High-speed Quad SPI XIP execution source for fast cold-boot startup and real-time calibration loading. Use Value: 35 MB/s continuous read throughput via Fast Read Quad I/O (EBh) reduces boot latency by >4× versus standard SPI flash. |
| IoT Edge Gateway OTA Updates | Medical Imaging Device Configuration |
|
Use Scenario: Enabling secure over-the-air firmware upgrades in cellular-connected edge gateways with limited local storage. IC Role / Device Role / Timing Role: Dual-bank firmware storage with suspend/resume capability to maintain system responsiveness during background updates. Use Value: Erase/program suspend (75h/7Ah) allows interruption of 64KB block erases (~2s) to process incoming network packets without data loss. |
Use Scenario: Storing DICOM metadata templates, calibration profiles, and regulatory compliance logs in portable ultrasound and MRI equipment. IC Role / Device Role / Timing Role: Tamper-resistant parameter storage using hardware /WP pin lock and OTP-locked security registers. Use Value: Three 256-byte security registers with OTP locks prevent unauthorized modification of FDA-mandated calibration data. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L12833FZC-10G | 128Mb density, 104MHz max clock, SOIC-8 package only; lacks TFBGA/WSON variants and SFDP register | Supports standard/Dual SPI but no Quad SPI instructions or QE bit; no suspend/resume commands | Choose for cost-sensitive, legacy SPI-only designs where Quad I/O and field-upgrade flexibility are not required |
| S25FL128SAGMFI001 | 128Mb, 80MHz Quad SPI clock, supports octal DTR mode; includes built-in ECC and sector lockdown | Requires different initialization sequence (06h + 01h + 31h); sector lockdown replaces BP bits with enhanced granularity | Prefer when system-level error correction or fine-grained sector locking beyond BP2/BP1/BP0 is mandatory |
Compared with W25Q128BVBJP TR, MX25L12833FZC-10G offers lower cost but omits Quad SPI, suspend/resume, and SFDP - limiting upgrade path flexibility; S25FL128SAGMFI001 adds ECC and sector lockdown at higher complexity and initialization overhead, better suited for safety-critical medical or aerospace use cases.
Availability
W25Q128BVBJP TR is available at Aetrix Electronics and suitable for industrial PLC firmware storage, automotive ADAS boot code, IoT edge gateway OTA updates, medical imaging configuration, and embedded code shadowing requiring stable component supply across multi-year production cycles.
Supply support for W25Q128BVBJP TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor manufacturer specializing in specialty memory solutions, including serial flash, RAM, and mobile DRAM, with global distribution and automotive-grade qualification capabilities.
The W25Q series was designed specifically for embedded systems requiring high-speed, low-power, and secure code/data storage - emphasizing Quad SPI performance, robust write protection, and long-term data integrity in resource-constrained environments.
FAQ
What is the package type and footprint of the W25Q128BVBJP TR?
The W25Q128BVBJP TR uses an 8-pad WSON 8×6 mm package (JEDEC MO-241AC, package code E) with exposed thermal pad. Its pinout matches Figure 1a in the datasheet: /CS, DO(IO1), /WP(IO2), GND, DI(IO0), CLK, /HOLD(IO3), VCC. This compact footprint supports high-density PCB layouts in space-constrained applications like wearable medical devices and compact IoT nodes. The W25Q128BVBJP TR does not use SOIC or TFBGA variants - those correspond to other suffixes (e.g., F, B, C).
Does the W25Q128BVBJP TR support Quad SPI out of the box?
No - the W25Q128BVBJP TR requires explicit configuration of the Quad Enable (QE) bit in Status Register-2 (bit 1) via Write Status Register (01h) instruction before Quad SPI operation is enabled. Until QE=1, /WP and /HOLD remain functional as hardware write protect and hold inputs. Once set, QE is non-volatile and persists across power cycles. The W25Q128BVBJP TR datasheet specifies this as a mandatory step for Fast Read Quad I/O (EBh) and other Quad instructions.
How does hardware write protection work on the W25Q128BVBJP TR?
Hardware write protection on the W25Q128BVBJP TR combines the active-low /WP pin with status register bits (BP2–BP0, TB, SEC, CMP, SRP0/SRP1). When /WP is pulled low and SRP0/SRP1 = 01b or 10b, writes to protected sectors and the status register itself are blocked. This dual-layer scheme prevents accidental writes during power transients or noise events. The W25Q128BVBJP TR's /WP pin is only active in Standard/Dual SPI mode; it becomes IO2 in Quad SPI when QE=1.
Can the W25Q128BVBJP TR be used for execute-in-place (XIP) applications?
Yes - the W25Q128BVBJP TR supports true XIP via Continuous Read Mode, which reduces instruction overhead to just 8 clock cycles for address setup and enables seamless sequential access. Combined with Fast Read Quad I/O (EBh) at up to 70MHz clock (280Mbps effective), the W25Q128BVBJP TR delivers sufficient bandwidth for real-time code execution directly from flash in Cortex-M7/M33 and RISC-V SoCs without requiring RAM copy.
What is the purpose of the 64-bit Unique ID in the W25Q128BVBJP TR?
The 64-bit Unique Serial Number in the W25Q128BVBJP TR is factory-programmed, one-time-readable, and immutable - accessed via Read Unique ID Number (4Bh) instruction. It enables device-specific cryptographic binding, secure boot chain verification, and counterfeit detection. Unlike software-generated IDs, this hardware-rooted value ensures uniqueness across all W25Q128BVBJP TR units and forms the basis for firmware attestation in regulated industries like medical and industrial control.
W25Q128BVBJP TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 24-TBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 50µs, 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TFBGA (6x8)
W25Q128BVBJP TR FAQ
1.How can I place an order for W25Q128BVBJP TR through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q128BVBJP TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q128BVBJP TR reliable?
The price and inventory of W25Q128BVBJP TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q128BVBJP TR is usually 5 days.
3.What payment methods are accepted for W25Q128BVBJP TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q128BVBJP TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q128BVBJP TR?
W25Q128BVBJP TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q128BVBJP TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q128BVBJP TR?
For technical support, including W25Q128BVBJP TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q128BVBJP TR requirements.
6.How does Aetrix verify that W25Q128BVBJP TR is sourced from the original manufacturer or authorized distributors?
All W25Q128BVBJP TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q128BVBJP TR meets industry standards.
7.What is the process for return or replacement of W25Q128BVBJP TR?
All W25Q128BVBJP TR units undergo pre-shipment inspection (PSI). If there is an issue with W25Q128BVBJP TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q128BVBJP TR part is unused and in its original packaging.
Return procedure for W25Q128BVBJP TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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