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Winbond Electronics Corporation W25Q128FVBIP
- Part No.:
- W25Q128FVBIP
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 24-TBGA
- Datasheet:
-
W25Q128FVBIP.pdf
- Description:
- IC FLASH 128MBIT SPI 24TFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:1,526
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Product details
Overview
W25Q128FVBIP from Winbond is a 128M-bit (16MB) serial NOR flash memory IC supporting Standard/Dual/Quad SPI and QPI interfaces, organized into 65,536 × 256-byte pages with uniform 4KB sector erase capability, operating from 2.7V to 3.6V, and used for code storage, XIP execution, and firmware parameter retention in embedded microcontrollers.
For engineers reviewing the W25Q128FVBIP datasheet, W25Q128FVBIP pinout, W25Q128FVBIP application, or W25Q128FVBIP equivalent, key selection considerations include Quad Enable (QE) bit configuration, /HOLD vs /RESET pin behavior across package variants, 104MHz SPI clock support, JEDEC ID and SFDP register compliance, and hardware write protection via /WP pin and status register bits.
Technical Context
The W25Q128FVBIP implements a flexible SPI command architecture with three operational modes: Standard SPI (DI/DO), Dual SPI (IO0/IO1), and Quad SPI/QPI (IO0–IO3), where IO2 and IO3 are remapped from /WP and /HOLD only when the non-volatile Quad Enable (QE) bit in Status Register-2 is set to 1. Its block diagram integrates page buffer, column/row decode, high-voltage generators, and security registers with OTP lock capability.
It supports true execute-in-place (XIP) via Continuous Read Mode with ≤8-clock instruction overhead and wrap lengths of 8/16/32/64 bytes; erase suspend/resume enables concurrent background operations; and JEDEC-standard SFDP register allows host auto-discovery of timing, density, and feature parameters without hard-coded assumptions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 M-bit (16 MB), organized as 65,536 × 256-byte programmable pages |
| Operating Voltage | 2.7 V to 3.6 V - compatible with standard 3.3 V I/O domains and low-power MCU systems |
| Max Clock Frequency | 104 MHz SPI - enables 416 MB/s effective throughput in Quad I/O mode using Fast Read Quad I/O (EBh) |
| Erase Granularity | 4 KB sectors (4,096 total), 32 KB blocks (2,048), 64 KB blocks (256), and full chip - supports fine-grained firmware partitioning |
| Endurance & Retention | 100,000 program/erase cycles and 20-year data retention at +25°C - suitable for field-upgradable firmware storage |
| Security Features | Three 256-byte OTP-lockable security registers, 64-bit unique ID, and configurable BP/TB/SEC/CMP bits - enables secure boot key storage and device authentication |
| Interface Modes | Standard SPI, Dual SPI, Quad SPI, and QPI - selectable via instruction set; QPI reduces instruction overhead for burst reads |
Pinout & Package
W25Q128FVBIP uses the 8-pin SOIC 208-mil (Package Code S) with exposed pad, pin-compatible with industry-standard footprint. Pin functions are shared across SPI modes: IO0–IO3 serve bidirectional data roles in Quad mode, while /WP and /HOLD revert to dedicated control pins in Standard/Dual mode.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| /CS | Chip Select Input | Active-low enable; places DO/IO pins in high-impedance state when deasserted, reducing bus contention |
| DO (IO1) | Data Output / Bidirectional I/O | Unidirectional output in Standard SPI; bidirectional in Dual/Quad modes - requires QE=1 for Quad use |
| /WP (IO2) | Write Protect Input / Bidirectional I/O | Hardware lock for status register writes; becomes IO2 in Quad mode when QE=1 |
| GND | Ground Reference | Signal and power return path - must be low-inductance connection for stable read/write timing |
| DI (IO0) | Data Input / Bidirectional I/O | Unidirectional input in Standard SPI; bidirectional in Dual/Quad modes - primary address/data lane |
| CLK | Serial Clock Input | Edge-triggered timing reference for all SPI operations; max 104 MHz frequency defines system bandwidth ceiling |
| /HOLD or /RESET (IO3) | Hold Control / Reset Input / Bidirectional I/O | Pauses ongoing transfers when active low; becomes IO3 in Quad mode when QE=1; /RESET function available only on 16-pin SOIC or via status register config |
| VCC | Power Supply | 2.7–3.6 V supply - decoupling capacitor required within 10 mm of pin per layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| Continuous Read Mode | Enables true XIP with ≤8-clock instruction overhead and configurable wrap length - eliminates software polling for address alignment |
| Erase/Program Suspend & Resume | Allows background erase or program to pause and resume - critical for real-time systems requiring deterministic interrupt latency |
| Quad Peripheral Interface (QPI) | Reduces instruction cycle count per transfer - e.g., single 03h Read Data command replaced by QPI opcode, improving throughput in high-bandwidth applications |
| JEDEC SFDP Register | Provides standardized, read-only parameter table - enables automatic driver initialization without hardcoded timing constants or vendor-specific APIs |
| Top/Bottom Block Protection | Configurable via TB bit and BP0–BP2 - protects bootloader region (top) or configuration data (bottom) from accidental overwrite during field updates |
| 64-bit Unique ID | Factory-programmed per-device serial number - supports secure provisioning, license binding, and anti-cloning in IoT edge devices |
Applications
| Firmware Storage | Bootloader Execution |
|---|---|
Use Scenario: Storing application firmware images for microcontrollers in industrial gateways. IC Role / Device Role / Timing Role: Non-volatile code storage with fast random access and sector-level update capability. Use Value: Enables over-the-air (OTA) firmware updates with atomic sector erase - no risk of partial corruption during power loss. |
Use Scenario: Hosting bootloader code that initializes RAM, configures peripherals, and validates application integrity before jump. IC Role / Device Role / Timing Role: XIP-capable memory mapped directly to CPU address space via Quad SPI interface. Use Value: Reduces boot time by >30% vs. copying to RAM first - leverages 104 MHz Quad I/O and Continuous Read Mode. |
| Secure Device Identity | Parameter & Configuration Storage |
Use Scenario: Binding cryptographic keys and device certificates to hardware identity in medical IoT sensors. IC Role / Device Role / Timing Role: Secure storage medium with OTP-locked security registers and factory-unique 64-bit ID. Use Value: Prevents cloning and ensures attestation root-of-trust - keys never leave the W25Q128FVBIP boundary during operation. |
Use Scenario: Retaining calibration coefficients, user preferences, and network settings across power cycles in smart home hubs. IC Role / Device Role / Timing Role: Parameter storage with hardware write protection and 4KB sector granularity. Use Value: Guarantees data integrity using /WP pin + BP bits - prevents accidental overwrite during firmware upgrade sequences. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L12833F | Same 128M-bit density, 3.3 V, and SOIC-8 package; supports Dual/Quad SPI but lacks QPI mode and SFDP register | No auto-discovery capability; requires fixed timing parameters in driver; no Continuous Read Mode optimization | Choose when QPI or SFDP is unnecessary and cost sensitivity outweighs advanced feature requirements |
| S25FL128S | 128M-bit, 3.0 V min, supports Octal DTR mode (up to 400 MHz); includes on-die ECC and enhanced security features | Higher performance and reliability for automotive-grade designs; larger footprint (16-pin SOIC or BGA) | Choose for safety-critical systems requiring ECC, AEC-Q100 qualification, or higher sustained bandwidth |
Compared with MX25L12833F and S25FL128S, the W25Q128FVBIP delivers balanced performance, QPI efficiency, and JEDEC-compliant configurability in a compact 8-pin SOIC package - ideal for cost-sensitive, space-constrained embedded designs needing XIP and secure identity.
Availability
W25Q128FVBIP is available at Aetrix Electronics and suitable for industrial control systems, consumer electronics firmware updates, and IoT edge device boot storage requiring stable component supply, long-term lifecycle support, and consistent parametric performance.
Supply support for W25Q128FVBIP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor company specializing in specialty memory solutions, including serial flash, mobile DRAM, and code storage products for embedded and communications markets.
The W25Q series was designed specifically for high-reliability, low-pin-count code storage in resource-constrained microcontroller systems - emphasizing XIP capability, security, and multi-vendor interoperability through JEDEC standards.
FAQ
What is the package type and pin count of the W25Q128FVBIP?
The W25Q128FVBIP uses an 8-pin SOIC 208-mil package (Package Code S) with internal exposed pad. It shares pinout compatibility with standard SOIC-8 footprints and supports /CS, CLK, DI (IO0), DO (IO1), /WP (IO2), /HOLD or /RESET (IO3), VCC, and GND - all confirmed in Winbond's Revision H datasheet Figure 1a.
Does the W25Q128FVBIP support Quad SPI and QPI modes?
Yes, the W25Q128FVBIP supports both Quad SPI and QPI modes. Quad SPI requires setting the non-volatile Quad Enable (QE) bit in Status Register-2; QPI mode is entered via instruction 38h and exited via FFh. Both modes use IO0–IO3 bidirectionally, with /WP and /HOLD repurposed as IO2 and IO3 respectively.
How does hardware write protection work on the W25Q128FVBIP?
Hardware write protection on the W25Q128FVBIP is implemented via the /WP pin (active low) combined with status register bits (BP0–BP2, TB, SEC, CMP). When /WP is asserted, writes to protected sectors are blocked regardless of software commands - a critical safeguard during firmware updates or field deployments where accidental erase must be prevented.
What is the purpose of the /HOLD pin on the W25Q128FVBIP?
The /HOLD pin on the W25Q128FVBIP pauses ongoing SPI transactions while /CS remains low, placing DO in high-impedance and ignoring DI/CLK signals. This enables bus sharing among multiple SPI slaves without requiring full deselect/reselect cycles - especially useful in multi-peripheral MCU designs where deterministic timing is essential.
Is the W25Q128FVBIP suitable for execute-in-place (XIP) applications?
Yes, the W25Q128FVBIP is explicitly designed for XIP operation. Its Continuous Read Mode reduces instruction overhead to ≤8 clocks per 24-bit address, and Quad I/O support achieves up to 416 MB/s effective throughput - enabling direct CPU execution from flash without RAM copy, validated in Winbond's General Descriptions section and Functional Descriptions chapter.
W25Q128FVBIP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 24-TBGA
- Packaging:
- Tube
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O, QPI
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 50µs, 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TFBGA (6x8)
W25Q128FVBIP FAQ
1.How can I place an order for W25Q128FVBIP through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q128FVBIP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q128FVBIP reliable?
The price and inventory of W25Q128FVBIP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q128FVBIP is usually 5 days.
3.What payment methods are accepted for W25Q128FVBIP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q128FVBIP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q128FVBIP?
W25Q128FVBIP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q128FVBIP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q128FVBIP?
For technical support, including W25Q128FVBIP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q128FVBIP requirements.
6.How does Aetrix verify that W25Q128FVBIP is sourced from the original manufacturer or authorized distributors?
All W25Q128FVBIP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q128FVBIP meets industry standards.
7.What is the process for return or replacement of W25Q128FVBIP?
All W25Q128FVBIP units undergo pre-shipment inspection (PSI). If there is an issue with W25Q128FVBIP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q128FVBIP part is unused and in its original packaging.
Return procedure for W25Q128FVBIP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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