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Winbond Electronics Corporation W25Q128FVEJQ TR
- Part No.:
- W25Q128FVEJQ TR
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 8-WDFN Exposed Pad
- Datasheet:
-
W25Q128FVEJQ TR.pdf
- Description:
- IC FLASH 128MBIT SPI/QUAD 8WSON
- Quantity:
- Payment:
- Shipping:
Inventory:3,723
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Product details
Overview
W25Q128FVEJQ TR from Winbond is a 3.3V, 128M-bit (16MB) serial NOR flash memory supporting Standard/Dual/Quad SPI and QPI interfaces. It features 4KB uniform sectors, 104MHz max clock speed, 50MB/s continuous read throughput, and operates from -40°C to +85°C. It is used for code execution (XIP), firmware storage, and parameter retention in microcontroller-based embedded systems.
For engineers reviewing the W25Q128FVEJQ TR datasheet, W25Q128FVEJQ TR pinout, W25Q128FVEJQ TR application, or W25Q128FVEJQ TR equivalent, key selection criteria include quad I/O support with QE bit control, hardware write protection via /WP and /HOLD pins, sector-level erase flexibility, JEDEC ID/SFDP compliance, and 24-ball TFBGA 8x6-mm (Package Code C) compatibility.
Technical Context
The W25Q128FVEJQ TR implements a flexible SPI-compatible architecture with configurable I/O modes: standard single I/O (DI/DO), dual I/O (IO0/IO1), quad I/O (IO0–IO3), and QPI (4-bit command/address/data bus). Its status register includes non-volatile Quad Enable (QE) bit that reassigns /WP and /HOLD pins to IO2 and IO3 respectively when set.
It supports true execute-in-place (XIP) via Continuous Read Mode with ≤8-clock instruction overhead and wrap lengths of 8/16/32/64 bytes. Erase operations are hierarchical-4KB sector, 32KB block, 64KB block, or full chip-with suspend/resume capability and >100,000 program/erase cycles.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 M-bit (16 MB), organized as 65,536 × 256-byte pages |
| Supply Voltage | 2.7V to 3.6V - compatible with 3.3V logic systems without level shifting |
| Max Clock Frequency | 104 MHz (SPI); enables 416 MHz equivalent quad I/O bandwidth for high-speed boot code fetch |
| Erase Granularity | Uniform 4KB sectors (4,096 total), plus 32KB/64KB blocks - supports fine-grained firmware updates |
| Data Retention | 20 years at +85°C - suitable for industrial and automotive lifecycle requirements |
| Program/Erase Endurance | 100,000 cycles - robust for field-upgradable firmware and logging applications |
| Interface Modes | Standard SPI, Dual SPI, Quad SPI, QPI - selectable via instruction set and QE bit configuration |
| Security Features | 64-bit unique ID, SFDP register, three 256-byte OTP-locked security registers - enables secure boot and device authentication |
Pinout & Package
W25Q128FVEJQ TR is packaged in a 24-ball TFBGA 8x6-mm (Package Code C, 6×4 ball array), RoHS-compliant and lead-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| B2 | CLK | Serial clock input - timing reference for all SPI/QPI transactions; requires clean, low-jitter source |
| B3 | GND | Ground reference - must be low-impedance and decoupled near VCC pin |
| B4 | VCC | 3.3V power supply - requires local 100nF + 4.7µF decoupling per datasheet layout guidelines |
| C2 | /CS | Chip select input - active-low enable; must transition high→low before new instruction acceptance |
| C4 | /WP (IO2) | Write protect input (standard mode) or IO2 (quad mode) - hardware lock for status register when QE=0 |
| D2 | DO (IO1) | Data output (standard/dual) or bidirectional IO1 (quad/QPI) - shares function depending on QE state |
| D3 | DI (IO0) | Data input (standard) or bidirectional IO0 (dual/quad/QPI) - primary command/address/data path |
| D4 | /HOLD or /RESET (IO3) | Hold input (standard/dual) or IO3 (quad/QPI) or dedicated reset (SOIC-16 only) - not functional in quad mode on TFBGA |
Key Features
| Feature | Design Value |
|---|---|
| Continuous Read Mode | Enables XIP with ≤8-clock address setup and configurable 8/16/32/64-byte wrap - reduces CPU wait states during boot |
| Quad Enable (QE) Bit | Non-volatile bit in Status Register-2 that remaps /WP and /HOLD to IO2/IO3 - required for quad I/O operation |
| Erase/Program Suspend | Allows pausing long erase/program operations to service higher-priority interrupts - critical for real-time firmware updates |
| Individual Sector Lock | Per-sector lock/unlock via 36h/39h instructions - isolates protected bootloader from application partition writes |
| SFDP Register Support | JEDEC JESD216-compliant 64-byte parameter table - enables automatic driver configuration without hard-coded timing values |
| Unique 64-bit ID | Factory-programmed read-only identifier - used for device binding, license enforcement, and anti-cloning in secure systems |
Applications
| Bootloader Storage | Firmware Over-the-Air (OTA) |
|---|---|
Use Scenario: Storing immutable bootloader code executed directly from flash on MCU power-up. IC Role / Device Role / Timing Role: Non-volatile code storage with XIP-capable Quad SPI interface and deterministic read latency. Use Value: Eliminates external RAM copy step; reduces boot time by >30% vs. parallel flash due to 416 MHz effective bandwidth. | Use Scenario: Receiving and validating encrypted firmware images in connected IoT edge devices. IC Role / Device Role / Timing Role: Secure, field-upgradable storage with sector-lock isolation between active/inactive firmware banks. Use Value: Enables atomic A/B firmware swap using 4KB sector granularity and suspend/resume during validation. |
| Industrial HMI Configuration | Automotive ADAS Logging |
Use Scenario: Persisting UI theme settings, calibration data, and user preferences across power cycles in factory HMIs. IC Role / Device Role / Timing Role: Parameter storage with hardware write protection (/WP pin) and top/bottom array control. Use Value: Prevents accidental corruption during ESD events or brown-out; retains data for >20 years at 85°C ambient. | Use Scenario: Capturing sensor fusion logs (camera, radar, IMU) during vehicle test drives for post-processing. IC Role / Device Role / Timing Role: High-endurance data logger with 100K+ erase cycles and 4KB sector wear leveling. Use Value: Supports >10,000 hours of continuous logging at 1MB/s sustained write rate using sequential page programming. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L12833FZC-10G | 128Mb, 104MHz, SOIC-8 and TFBGA-24 packages; supports DTR mode but lacks QPI; no SFDP register | Requires software-driven timing configuration; no auto-negotiated driver initialization | Preferred where QPI is unused and legacy SPI-only drivers exist |
| S25FL128SAGMFI000 | 128Mb, 80MHz max clock; supports HyperBus interface; includes ECC and configurable dummy cycles | Higher latency than W25Q128FVEJQ TR in Quad SPI mode; optimized for Cypress PSoC integration | Chosen when system uses HyperFlash-compatible controllers or requires built-in ECC for safety-critical logging |
Compared with MX25L12833FZC-10G and S25FL128SAGMFI000, the W25Q128FVEJQ TR delivers superior bandwidth via QPI mode and plug-and-play configurability via SFDP, making it optimal for Linux-based bootloaders and RTOS firmware with dynamic driver loading.
Availability
W25Q128FVEJQ TR is available at Aetrix Electronics and suitable for industrial HMI, automotive ADAS logging, and IoT OTA firmware update applications requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for W25Q128FVEJQ TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor company specializing in specialty DRAM, mobile DRAM, and serial flash memory solutions since 1987.
The W25Q series targets high-performance embedded systems needing reliable, low-power, multi-interface NOR flash for code storage and execution - designed specifically for XIP, OTA, and secure boot architectures.
FAQ
What is the package type and footprint of the W25Q128FVEJQ TR?
The W25Q128FVEJQ TR uses a 24-ball TFBGA package measuring 8mm × 6mm with a 6×4 ball array (Package Code C). It has a 0.8mm ball pitch and is RoHS-compliant and lead-free. This footprint differs from the 8-pin SOIC or WSON variants and requires precise PCB land pattern alignment per Winbond's AN-1007 layout guide.
Does the W25Q128FVEJQ TR support Quad Peripheral Interface (QPI) mode, and how is it enabled?
Yes, the W25Q128FVEJQ TR supports QPI mode. It is enabled by setting the Quad Enable (QE) bit in Status Register-2 using the Write Status Register-2 (31h) instruction. Once QE=1, pins /WP and /HOLD become IO2 and IO3, allowing 4-bit command/address/data transfers. The Enter QPI Mode (38h) instruction then switches the interface to QPI protocol.
How does hardware write protection work on the W25Q128FVEJQ TR?
Hardware write protection on the W25Q128FVEJQ TR is implemented via the /WP pin (active-low) and controlled Block Protect (BP2–BP0), Top/Bottom (TB), and Complement Protect (CMP) bits in the status register. When /WP is held low and SRP0/SRP1 are set, writes to protected sectors and status registers are blocked - independent of software commands.
What is the purpose of the /HOLD pin on the W25Q128FVEJQ TR, and is it available in QPI mode?
The /HOLD pin on the W25Q128FVEJQ TR pauses ongoing SPI transactions while /CS remains low, allowing shared bus arbitration. However, in QPI mode (QE=1), this pin functions as IO3 and the /HOLD feature is disabled. For hold functionality in quad configurations, software-controlled transaction suspension must be used instead.
Can the W25Q128FVEJQ TR be used for Execute-in-Place (XIP) applications, and what features enable this?
Yes, the W25Q128FVEJQ TR supports true XIP via Continuous Read Mode with ≤8-clock instruction overhead and configurable wrap lengths (8/16/32/64 bytes). Combined with 104MHz clock support and QPI's 416MHz effective bandwidth, it delivers deterministic read latency suitable for direct code execution from flash in Cortex-M and RISC-V MCUs without external RAM buffering.
W25Q128FVEJQ TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 8-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O, QPI
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 50µs, 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WSON (8x6)
W25Q128FVEJQ TR FAQ
1.How can I place an order for W25Q128FVEJQ TR through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q128FVEJQ TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q128FVEJQ TR reliable?
The price and inventory of W25Q128FVEJQ TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q128FVEJQ TR is usually 5 days.
3.What payment methods are accepted for W25Q128FVEJQ TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q128FVEJQ TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q128FVEJQ TR?
W25Q128FVEJQ TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q128FVEJQ TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q128FVEJQ TR?
For technical support, including W25Q128FVEJQ TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q128FVEJQ TR requirements.
6.How does Aetrix verify that W25Q128FVEJQ TR is sourced from the original manufacturer or authorized distributors?
All W25Q128FVEJQ TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q128FVEJQ TR meets industry standards.
7.What is the process for return or replacement of W25Q128FVEJQ TR?
All W25Q128FVEJQ TR units undergo pre-shipment inspection (PSI). If there is an issue with W25Q128FVEJQ TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q128FVEJQ TR part is unused and in its original packaging.
Return procedure for W25Q128FVEJQ TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
W25Q128FVEJQ TR Tags
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M24C02-WMN6TP
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AT24C02C-XHM-T
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AT21CS01-STUM10-T
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M24C02-FMC6TG
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AT24CS02-SSHM-T
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93LC46BT-I/OT
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AT24C04C-SSHM-T
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