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Winbond Electronics Corporation W25Q128FVPIG
- Part No.:
- W25Q128FVPIG
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 8-WDFN Exposed Pad
- Datasheet:
-
W25Q128FVPIG.pdf
- Description:
- IC FLASH 128MBIT SPI/QUAD 8WSON
- Quantity:
- Payment:
- Shipping:
Inventory:2,301
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Product details
Overview
W25Q128FVPIG from Winbond is a 128M-bit (16MB) serial NOR flash memory IC supporting Standard/Dual/Quad SPI and QPI interfaces, operating at up to 104MHz clock frequency with 50MB/s continuous read throughput, 4KB uniform sector erase granularity, and single 2.7–3.6V supply - deployed for XIP code execution, firmware storage, and parameter retention in microcontroller-based embedded systems.
For engineers reviewing the W25Q128FVPIG datasheet, W25Q128FVPIG pinout, W25Q128FVPIG application, or W25Q128FVPIG equivalent, key selection criteria include Quad Enable (QE) bit configuration, /HOLD vs /RESET pin mapping per package, 4KB sector protection granularity, and JEDEC SFDP register support for auto-configuration.
Technical Context
The W25Q128FVPIG implements a flexible SPI-compatible command set with hardware-accelerated erase/program suspend-resume, volatile/non-volatile status register control (BP2–BP0, TB, SEC, CMP, SRP0/SRP1), and configurable I/O roles: IO0–IO3 become active in Quad SPI mode only when QE=1 in Status Register-2. Its architecture supports true execute-in-place (XIP) via Continuous Read Mode with ≤8-clock instruction overhead.
It integrates three 256-byte one-time-programmable (OTP) security registers, 64-bit unique device ID, and JEDEC-standard SFDP register for vendor-agnostic parameter discovery. The /WP and /HOLD pins function exclusively in Standard/Dual SPI modes; in Quad SPI, those pins remap to IO2 and IO3 respectively - a critical layout constraint confirmed across SOIC, WSON, and TFBGA packages.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 M-bit (16 MB), organized as 65,536 × 256-byte pages |
| Interface Modes | Standard SPI (4-wire), Dual SPI (4-wire), Quad SPI (4-wire), QPI (6-wire); QE bit required for Quad I/O |
| Max Clock Frequency | 104 MHz (SPI), enabling 208 MHz dual-I/O and 416 MHz quad-I/O effective throughput |
| Erase Granularity | Uniform 4 KB sectors (4,096 total), 32 KB blocks (256 total), 64 KB blocks (128 total), full-chip erase |
| Write/Erase Endurance | ≥100,000 program/erase cycles per sector |
| Data Retention | ≥20 years at +25°C; validated per JEDEC JESD22-A117 |
| Supply Voltage | 2.7 V to 3.6 V; no separate VIO required - simplifies single-rail power design |
| Operating Temperature | −40°C to +85°C industrial grade - qualified per AEC-Q100 not applicable; rated for extended industrial use |
Pinout & Package
W25Q128FVPIG is supplied in 8-pin PDIP 300-mil (Package Code A), with pinout identical to SOIC/VSOP 208-mil: Pin 1 = /CS, Pin 2 = DO (IO1), Pin 3 = /WP (IO2), Pin 4 = GND, Pin 5 = DI (IO0), Pin 6 = CLK, Pin 7 = /HOLD or /RESET (IO3), Pin 8 = VCC. /WP and /HOLD are functional only in Standard/Dual SPI; QE=1 reassigns them to IO2/IO3 in Quad mode.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| /CS (Pin 1) | Chip Select Input | Active-low enable: high = high-Z output, low = active communication; must toggle high→low after power-up before first command |
| DO / IO1 (Pin 2) | Data Output / Quad I/O Line 1 | Unidirectional output in Standard SPI; bidirectional I/O in Dual/Quad SPI; requires QE=1 for Quad role |
| /WP / IO2 (Pin 3) | Hardware Write Protect / Quad I/O Line 2 | Active-low hardware lock for status register; disabled and repurposed as IO2 when QE=1 |
| GND (Pin 4) | Ground Reference | Primary return path for VCC and all I/O signals; decoupling capacitor placement critical near this pin |
| DI / IO0 (Pin 5) | Data Input / Quad I/O Line 0 | Unidirectional input in Standard SPI; bidirectional I/O in Dual/Quad SPI; always active in all modes |
| CLK (Pin 6) | Serial Clock Input | Edge-triggered timing reference for all SPI/QPI operations; max 104 MHz; requires clean signal integrity |
| /HOLD or /RESET / IO3 (Pin 7) | Hold Input or Reset Input / Quad I/O Line 3 | Pauses ongoing operation when low (/HOLD); resets internal state when pulsed (/RESET); becomes IO3 if QE=1 |
| VCC (Pin 8) | Power Supply | 2.7–3.6 V main supply; typical active current 4 mA, power-down current <1 µA (typ.) |
Key Features
| Feature | Design Value |
|---|---|
| Continuous Read Mode | Enables true XIP with ≤8-clock instruction overhead per 24-bit address access - eliminates wait states in MCU boot code fetch |
| Quad Peripheral Interface (QPI) | Reduces command overhead by encoding multi-byte instructions into single-cycle opcodes - cuts bus transactions by >50% vs standard SPI |
| 4KB Uniform Sector Architecture | Allows independent firmware partitioning (e.g., bootloader, app, config) without cross-sector write interference - essential for OTA updates |
| Volatile & Non-Volatile Status Control | BP2–BP0, TB, SEC, CMP bits support mixed protection schemes: top/bottom array lock, complement lock, and individual sector lock via 36h/39h commands |
| Security Registers & Unique ID | Three 256-byte OTP security registers + 64-bit factory-programmed unique ID - enables secure key storage and device authentication |
| SFDP Register Support | JEDEC JESD216-compliant Serial Flash Discoverable Parameters table - allows host MCU to auto-detect density, timing, and feature set without hard-coded assumptions |
Applications
| Industrial HMI Firmware Storage | IoT Edge Device Configuration |
|---|---|
|
Use Scenario: Storing GUI assets, localized language strings, and firmware binaries in programmable logic controllers with limited PCB space. IC Role / Device Role / Timing Role: Non-volatile code and data repository accessed via Quad SPI for low-latency XIP execution during HMI boot and runtime asset loading. Use Value: 4KB sector erase enables atomic firmware patching without disrupting active UI rendering; 20-year retention ensures field-deployed units maintain integrity over lifecycle. |
Use Scenario: Holding device-specific calibration data, network credentials, and OTA update staging buffers in battery-powered sensor nodes. IC Role / Device Role / Timing Role: Parameter and credential vault with hardware write-protection (/WP pin + BP bits) and OTP security registers for TLS key storage. Use Value: <1 µA power-down current extends battery life; SFDP register allows dynamic driver initialization without firmware version lock-in. |
| Automotive Infotainment Boot Memory | Medical Diagnostic Instrument Code Storage |
|
Use Scenario: Hosting boot ROM, safety-critical startup routines, and display initialization firmware in head-unit ECUs requiring AEC-Q200-aligned components. IC Role / Device Role / Timing Role: Primary boot image storage accessed via QPI for deterministic <50 ns instruction fetch latency during cold start. Use Value: 104 MHz QPI clock + Continuous Read Mode achieves sub-100 ms boot time; 100K-cycle endurance supports frequent calibration updates. |
Use Scenario: Storing FDA-compliant diagnostic algorithms, calibration coefficients, and audit logs in portable ultrasound and ECG devices. IC Role / Device Role / Timing Role: Secure, tamper-resistant firmware and log archive with individual sector lock (36h command) and 64-bit unique ID for traceability. Use Value: Three OTP security registers store encrypted keys; non-volatile status bits prevent accidental overwrite of regulatory-critical parameters. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L12833FZC-10G | 128Mb density, 104MHz max clock, but lacks QPI mode and SFDP register; uses different status register layout (no QE bit) | No native QPI acceleration; requires software-emulated quad commands - increases CPU load and reduces effective throughput | Select when QPI and SFDP are unnecessary and legacy MXIC driver compatibility is prioritized |
| S25FL128SAGMFI001 | 128Mb, 133MHz, supports Octal DTR mode (not supported by W25Q128FVPIG); includes built-in ECC and sector protection lock bits | Higher bandwidth potential via Octal mode; ECC enables use in safety-critical contexts where bit errors must be corrected | Select when system-level ECC capability or >104MHz interface speed is required; not drop-in compatible due to command set differences |
Compared with MX25L12833FZC-10G, W25Q128FVPIG delivers faster real-world throughput via QPI and auto-configurability via SFDP; versus S25FL128SAGMFI001, it trades Octal DTR and ECC for lower cost, simpler driver stack, and broader ecosystem support in resource-constrained MCUs.
Availability
W25Q128FVPIG is available at Aetrix Electronics and suitable for industrial HMI, IoT edge node, and medical diagnostic equipment requiring stable component supply, long-term obsolescence management, and consistent parametric performance across production batches.
Supply support for W25Q128FVPIG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor manufacturer specializing in specialty memory solutions, including serial flash, RAM, and mobile DRAM, serving industrial, automotive, and consumer markets since 1987.
The W25Q series targets cost-sensitive, space-constrained embedded systems needing high-speed, low-power, and secure non-volatile storage - optimized for MCU co-location with minimal board area and single-supply simplicity.
FAQ
What is the pin configuration of W25Q128FVPIG?
W25Q128FVPIG uses an 8-pin PDIP 300-mil package (Package Code A) with pinout: Pin 1 = /CS, Pin 2 = DO (IO1), Pin 3 = /WP (IO2), Pin 4 = GND, Pin 5 = DI (IO0), Pin 6 = CLK, Pin 7 = /HOLD or /RESET (IO3), Pin 8 = VCC. In Quad SPI mode (QE=1), Pins 3 and 7 become IO2 and IO3; /WP and /HOLD functions are disabled.
Does W25Q128FVPIG support execute-in-place (XIP) operation?
Yes, W25Q128FVPIG supports true XIP via Continuous Read Mode, which requires only ≤8 clocks to initiate a memory access and enables efficient instruction fetch directly from flash. This capability is enhanced by Quad SPI and QPI modes, delivering up to 416 MHz effective throughput - outperforming many parallel flash alternatives in real-world MCU boot and runtime code execution.
How is write protection implemented on W25Q128FVPIG?
W25Q128FVPIG implements multi-layer write protection: hardware via /WP pin (active-low, functional only in Standard/Dual SPI), and software via status register bits (BP2–BP0, TB, SEC, CMP, SRP0/SRP1). These allow granular locking of 4KB sectors, top/bottom array regions, or entire memory - with volatile/non-volatile persistence options. When QE=1, /WP is reassigned to IO2 and hardware protection is unavailable.
What is the purpose of the SFDP register in W25Q128FVPIG?
The SFDP (Serial Flash Discoverable Parameters) register in W25Q128FVPIG is a JEDEC JESD216-compliant table that exposes device capabilities - including density, timing parameters, erase block sizes, and supported instruction sets - in standardized format. Host MCUs read this register at startup to auto-configure drivers without hardcoded assumptions, improving firmware portability and reducing integration effort.
Can W25Q128FVPIG be used in automotive applications?
W25Q128FVPIG is rated for −40°C to +85°C industrial temperature range and widely deployed in automotive infotainment and body control modules. However, it is not AEC-Q100 qualified. For automotive safety-critical applications requiring formal qualification, designers should verify system-level compliance and consider AEC-Q100-certified alternatives - while leveraging W25Q128FVPIG's QPI speed and 4KB sector flexibility for non-safety firmware layers.
W25Q128FVPIG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 8-WDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O, QPI
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 50µs, 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WSON (6x5)
W25Q128FVPIG FAQ
1.How can I place an order for W25Q128FVPIG through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q128FVPIG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q128FVPIG reliable?
The price and inventory of W25Q128FVPIG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q128FVPIG is usually 5 days.
3.What payment methods are accepted for W25Q128FVPIG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q128FVPIG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q128FVPIG?
W25Q128FVPIG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q128FVPIG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q128FVPIG?
For technical support, including W25Q128FVPIG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q128FVPIG requirements.
6.How does Aetrix verify that W25Q128FVPIG is sourced from the original manufacturer or authorized distributors?
All W25Q128FVPIG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q128FVPIG meets industry standards.
7.What is the process for return or replacement of W25Q128FVPIG?
All W25Q128FVPIG units undergo pre-shipment inspection (PSI). If there is an issue with W25Q128FVPIG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q128FVPIG part is unused and in its original packaging.
Return procedure for W25Q128FVPIG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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