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Winbond Electronics Corporation W25Q128FVSJP
- Part No.:
- W25Q128FVSJP
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
W25Q128FVSJP.pdf
- Description:
- IC FLASH 128MBIT SPI/QUAD 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,963
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Product details
Overview
W25Q128FVSJP from Winbond is a 128M-bit (16MB) serial NOR flash memory supporting Standard/Dual/Quad SPI and QPI interfaces, operating from 2.7V to 3.6V with 104MHz max clock, 4KB uniform sector erase, and 256-byte page programming - used for code storage, XIP boot, firmware updates, and parameter retention in embedded microcontrollers and IoT edge devices.
For engineers reviewing the W25Q128FVSJP datasheet, W25Q128FVSJP pinout, W25Q128FVSJP application, or W25Q128FVSJP equivalent, key selection considerations include Quad I/O enable (QE bit), /HOLD vs /RESET pin configuration per package, 4KB sector granularity for data logging, and JEDEC SFDP register support for auto-configuration.
Technical Context
The W25Q128FVSJP implements a flexible SPI-compatible command set with hardware write protection via /WP and /HOLD pins, plus software-controlled protection through Status Register bits (BP2–BP0, TB, SEC, CMP, SRP0/SRP1). It supports erase suspend/resume and programmable output drive strength (DRV1/DRV0).
Its architecture enables true execute-in-place (XIP) operation via Continuous Read Mode (as few as 8 clocks overhead) and QPI mode (reduced instruction overhead), delivering up to 50MB/s effective throughput using Fast Read Quad I/O (6Bh) or QPI instructions at 104MHz clock.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 M-bit (16 MB), organized as 65,536 × 256-byte pages |
| Interface Support | Standard SPI, Dual I/O SPI, Quad I/O SPI, and Quad Peripheral Interface (QPI) |
| Max Clock Frequency | 104 MHz (supports 208 MHz dual-I/O and 416 MHz quad-I/O effective rates) |
| Erase Granularity | Uniform 4 KB sectors (4,096 total), plus 32 KB and 64 KB blocks |
| Write Endurance | 100,000 program/erase cycles per sector |
| Data Retention | 20 years at +25°C, verified per JEDEC JESD22-A117 |
| Supply Voltage | 2.7 V to 3.6 V - compatible with 3.3 V logic systems without level shifting |
| Power Consumption | 4 mA active current (typ.), <1 µA power-down current (typ.) |
Pinout & Package
W25Q128FVSJP uses an 8-pin SOIC 208-mil (Package Code S) with exposed pad, pin-compatible with standard SOIC-8 footprint. Pin functions are shared across SPI modes: IO0–IO3 serve bidirectional roles in Quad mode, while /WP and /HOLD revert to dedicated control pins in Standard/Dual mode.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 /CS | Chip Select Input | Active-low enable; high-impedance DO during deselect; required high-to-low transition after power-up before first instruction |
| 2 DO (IO1) | Data Output / I/O1 | Unidirectional output in Standard SPI; bidirectional I/O in Dual/Quad SPI; high-impedance when /CS high or /HOLD low |
| 3 /WP (IO2) | Write Protect Input / I/O2 | Hardware lock for Status Register writes; disabled as /WP when QE=1 (becomes IO2 in Quad mode) |
| 4 GND | Ground Reference | Primary return path for VCC and I/O signals; requires low-impedance PCB connection |
| 5 DI (IO0) | Data Input / I/O0 | Unidirectional input in Standard SPI; bidirectional I/O in Dual/Quad SPI; sampled on CLK rising edge |
| 6 CLK | Serial Clock Input | Master-generated timing signal; all I/O transitions referenced to CLK edges; max 104 MHz frequency |
| 7 /HOLD (IO3) | Hold Input / I/O3 | Pauses ongoing read/write without deselecting; disabled as /HOLD when QE=1 (becomes IO3 in Quad mode) |
| 8 VCC | Power Supply | 2.7–3.6 V supply; decoupling capacitor (0.1 µF) required near pin for noise immunity |
Key Features
| Feature | Design Value |
|---|---|
| Quad Enable (QE) bit | Non-volatile Status Register-2 bit enabling IO2 (/WP) and IO3 (/HOLD) for Quad SPI operation |
| Continuous Read Mode | Reduces instruction overhead to ≤8 clocks per address; enables efficient XIP execution from flash |
| Erase/Program Suspend | Allows temporary halt of erase or program operations to service higher-priority reads |
| 64-bit Unique ID | Factory-programmed read-only serial number for device authentication and traceability |
| SFDP Register | JEDEC-standard 64-byte Serial Flash Discoverable Parameters table for automatic driver configuration |
| Security Registers | Three 256-byte OTP-lockable registers for secure key or calibration data storage |
Applications
| Firmware Storage | Boot Code Execution |
|---|---|
|
Use Scenario: Storing MCU firmware images, bootloader binaries, and OTA update packages in resource-constrained edge nodes. IC Role / Device Role / Timing Role: Non-volatile code storage with fast random access and reliable sector-level erase for incremental updates. Use Value: 4KB sector granularity enables precise overwrite of firmware segments without disturbing adjacent code or config data. |
Use Scenario: Direct execution of boot code from flash on ARM Cortex-M or RISC-V SoCs without RAM copy. IC Role / Device Role / Timing Role: XIP-capable serial NOR providing deterministic instruction fetch latency via Continuous Read and QPI modes. Use Value: 104MHz Quad I/O delivers >40MB/s sustained read bandwidth, matching or exceeding parallel NOR performance. |
| Industrial Data Logging | Secure Configuration Storage |
|
Use Scenario: Recording sensor readings, event timestamps, and diagnostic logs in PLCs and gateway controllers. IC Role / Device Role / Timing Role: Parameter storage with wear-leveling-friendly 4KB erase units and suspend/resume for real-time logging. Use Value: 100,000 erase cycles per sector ensures >10-year field life under daily logging at 100-sector writes/day. |
Use Scenario: Storing cryptographic keys, calibration coefficients, and device-specific credentials in medical or automotive ECUs. IC Role / Device Role / Timing Role: Secure non-volatile storage with OTP-locked Security Registers and hardware write-protection pins. Use Value: Three 256-byte Security Registers with individual OTP locks prevent unauthorized readback or modification post-programming. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L12833FZNI-10G | 128Mb density, 104MHz max clock, but lacks QPI mode and SFDP register; uses different status register layout | No QPI or SFDP support limits auto-configuration capability in modern bootloaders | Prefer W25Q128FVSJP where QPI, SFDP, or security registers are required |
| S25FL128SAGMFI000 | 128Mb, 133MHz, supports Octal DTR mode; includes hardware reset pin on all packages and deeper security (AES-128) | Higher performance and stronger crypto, but larger footprint (16-pin SOIC or BGA) and higher cost | Choose W25Q128FVSJP for cost-sensitive SOIC-8 designs needing QPI/SFDP balance |
Compared with MX25L12833FZNI-10G and S25FL128SAGMFI000, the W25Q128FVSJP uniquely combines QPI interface, JEDEC SFDP, 4KB sector erase, and OTP-secured registers in an industry-standard 8-pin SOIC package - making it optimal for compact, configurable, and secure embedded firmware storage.
Availability
W25Q128FVSJP is available at Aetrix Electronics and suitable for industrial control systems, IoT edge gateways, and automotive infotainment modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for W25Q128FVSJP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor company specializing in specialty memory solutions, including serial NOR/NAND flash, RAM, and mobile DRAM.
The W25Q128FVSJP belongs to Winbond's W25Q SpiFlash family, designed specifically for high-reliability embedded code storage, XIP boot, and firmware update applications in space- and pin-constrained systems.
FAQ
What is the package type and pin count of W25Q128FVSJP?
W25Q128FVSJP uses an 8-pin SOIC 208-mil package (Package Code S) with standard 1.27 mm pitch and integrated heat-dissipating exposed pad. It is pin-compatible with legacy SOIC-8 footprints and supports all W25Q128FV instruction sets and timing specifications.
Does W25Q128FVSJP support Quad SPI mode, and how is it enabled?
Yes, W25Q128FVSJP supports Quad SPI mode via the non-volatile Quad Enable (QE) bit in Status Register-2. Setting QE=1 reassigns the /WP and /HOLD pins to IO2 and IO3 respectively. This configuration must be written before issuing Quad I/O commands like 6Bh (Fast Read Quad I/O) or 32h (Quad Input Page Program).
What is the minimum erase unit size for W25Q128FVSJP, and why does it matter?
The minimum erase unit for W25Q128FVSJP is 4 KB (one sector), with 4,096 such sectors in the full 16 MB array. This granularity enables fine-grained firmware updates and robust data logging - allowing partial rewrites without disturbing adjacent code or configuration data, critical for fail-safe OTA and industrial logging applications.
How does the /HOLD pin function in W25Q128FVSJP, and when is it disabled?
The /HOLD pin on W25Q128FVSJP pauses ongoing read/write operations while maintaining /CS assertion, useful in multi-device SPI buses. It is active-low and disabled when the QE bit is set (Quad SPI mode), as pin 7 becomes IO3. In that mode, hold functionality must be managed via software or external arbitration.
Is W25Q128FVSJP compatible with JEDEC-standard SFDP, and what does that enable?
Yes, W25Q128FVSJP implements the JEDEC JESD216 SFDP standard via its 64-byte SFDP register. This allows host bootloaders to automatically detect memory geometry, timing parameters, and supported instructions - eliminating hardcoded flash drivers and enabling plug-and-play compatibility across firmware versions and platforms.
W25Q128FVSJP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O, QPI
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 50µs, 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
W25Q128FVSJP FAQ
1.How can I place an order for W25Q128FVSJP through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q128FVSJP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q128FVSJP reliable?
The price and inventory of W25Q128FVSJP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q128FVSJP is usually 5 days.
3.What payment methods are accepted for W25Q128FVSJP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q128FVSJP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q128FVSJP?
W25Q128FVSJP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q128FVSJP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q128FVSJP?
For technical support, including W25Q128FVSJP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q128FVSJP requirements.
6.How does Aetrix verify that W25Q128FVSJP is sourced from the original manufacturer or authorized distributors?
All W25Q128FVSJP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q128FVSJP meets industry standards.
7.What is the process for return or replacement of W25Q128FVSJP?
All W25Q128FVSJP units undergo pre-shipment inspection (PSI). If there is an issue with W25Q128FVSJP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q128FVSJP part is unused and in its original packaging.
Return procedure for W25Q128FVSJP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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