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Winbond Electronics Corporation W25Q128FVSJQ TR
- Part No.:
- W25Q128FVSJQ TR
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
W25Q128FVSJQ TR.pdf
- Description:
- IC FLASH 128MBIT SPI/QUAD 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,443
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Product details
Overview
W25Q128FVSJQ TR from Winbond is a 128M-bit (16MB) serial NOR flash memory supporting Standard/Dual/Quad SPI and QPI interfaces, operating at 2.7–3.6V with 104MHz max clock, 4KB uniform sectors, and hardware write protection via /WP and /HOLD pins - used for code storage, XIP boot, and firmware updates in embedded microcontrollers.
For engineers reviewing the W25Q128FVSJQ TR datasheet, W25Q128FVSJQ TR pinout, W25Q128FVSJQ TR application, or W25Q128FVSJQ TR equivalent, key selection criteria include Quad I/O support (QE bit enabled), 4KB sector erase granularity, JEDEC ID and SFDP register compliance, and compatibility with space-constrained 8-pin SOIC-208mil layouts.
Technical Context
The W25Q128FVSJQ TR implements a flexible SPI-compatible architecture with configurable I/O modes: Standard SPI uses DI/DO unidirectionally; Dual/Quad SPI repurposes /WP and /HOLD as IO2/IO3 when the non-volatile Quad Enable (QE) bit in Status Register-2 is set. QPI mode enables 4-bit instruction/data transfers with reduced command overhead.
It supports multiple erase granularities (4KB sector, 32KB/64KB block, full chip), program suspend/resume, volatile/non-volatile status register bits (BP2–BP0, TB, SEC, CMP, SRP0/SRP1), and three 256-byte OTP-lockable security registers - all accessible via defined instruction sets including Fast Read Quad I/O (EBh) and Quad Input Page Program (32h).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 M-bit (16 MB), organized as 65,536 × 256-byte pages |
| Interface Modes | Standard SPI, Dual SPI, Quad SPI, and QPI - requires QE bit set for Quad I/O operation |
| Max Clock Frequency | 104 MHz (SPI), enabling 416 MB/s effective throughput in Quad I/O mode |
| Erase Granularity | Uniform 4KB sectors (4,096 total), plus 32KB/64KB blocks and full-chip erase |
| Write Protection | Hardware /WP pin + software-configurable BP/TB/SEC/CMP bits in Status Registers 1–3 |
| Operating Voltage | 2.7 V to 3.6 V - compatible with 3.3V logic systems without level shifting |
| Data Retention | 20 years minimum at +25°C - validated for long-term firmware storage in industrial environments |
| Endurance | 100,000 program/erase cycles per sector - suitable for field-upgradable firmware partitions |
Pinout & Package
W25Q128FVSJQ TR is supplied in an 8-pin SOIC-208mil package (Package Code S), with pin 1 = /CS, pin 2 = DO (IO1), pin 3 = /WP (IO2), pin 4 = GND, pin 5 = DI (IO0), pin 6 = CLK, pin 7 = /HOLD or /RESET (IO3), pin 8 = VCC. Pin functions change under Quad SPI mode when QE=1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| /CS (Pin 1) | Chip Select input | Active-low enable; places DO in high-Z when deasserted; required high-to-low transition before instruction acceptance after power-up |
| DO (IO1) (Pin 2) | Serial data output / bidirectional I/O | Unidirectional output in Standard SPI; becomes IO1 in Dual/Quad modes - used for read data and status feedback |
| /WP (IO2) (Pin 3) | Write protect input / bidirectional I/O | Active-low hardware lock for Status Register writes; repurposed as IO2 in Quad mode when QE=1 |
| GND (Pin 4) | Ground reference | Primary return path for VCC and I/O signals; must be low-impedance for stable timing and noise immunity |
| DI (IO0) (Pin 5) | Serial data input / bidirectional I/O | Unidirectional input in Standard SPI; becomes IO0 in Dual/Quad modes - carries instructions, addresses, and write data |
| CLK (Pin 6) | Serial clock input | Edge-triggered timing source; rising edge latches input, falling edge samples output - supports up to 104 MHz |
| /HOLD or /RESET (IO3) (Pin 7) | Hold or reset input / bidirectional I/O | Pauses ongoing SPI transaction when low; repurposed as IO3 in Quad mode when QE=1; dedicated /RESET on 16-pin variant only |
| VCC (Pin 8) | Power supply | 2.7–3.6V single supply; powers core logic and I/O buffers; decoupling capacitor required per layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| Continuous Read Mode | Enables true XIP execution with ≤8-clock instruction overhead per 24-bit address access - reduces CPU wait states during code fetch |
| Quad Peripheral Interface (QPI) | Reduces command overhead by encoding instructions and data in 4-bit nibbles - improves throughput vs. standard SPI in bandwidth-limited designs |
| Erase/Program Suspend & Resume | Allows background operations (e.g., firmware update) to pause and resume - prevents interruption of time-critical real-time tasks |
| 64-bit Unique Serial Number | Factory-programmed per-device identifier - enables secure device authentication and firmware binding in IoT endpoints |
| JEDEC SFDP Register | Standardized, read-only parameter table (5Ah) - allows automatic configuration of timing, voltage, and feature sets by host bootloader without hardcoding |
| Three 256-byte Security Registers | OTP-lockable storage for cryptographic keys or calibration data - protected by LB1–LB3 bits and write-protection logic |
Applications
| Boot Code Storage | Firmware Over-the-Air (OTA) |
|---|---|
Use Scenario: Storing primary bootloader and application firmware for ARM Cortex-M or RISC-V microcontrollers requiring fast, reliable startup. IC Role / Device Role / Timing Role: Non-volatile code storage with XIP-capable Quad I/O interface - delivers deterministic read latency for first-instruction fetch. Use Value: 4KB sector granularity enables atomic firmware partitioning; 100K endurance ensures >10 years of field updates at monthly intervals. | Use Scenario: Secure storage of encrypted firmware images in connected medical devices or industrial gateways. IC Role / Device Role / Timing Role: Trusted firmware repository with OTP-locked security registers - holds decryption keys and signature verification parameters. Use Value: JEDEC SFDP and unique ID support automated image validation; suspend/resume avoids OTA corruption during power loss. |
| Configuration & Calibration Data | Human-Machine Interface (HMI) |
Use Scenario: Persistent storage of sensor calibration coefficients, user preferences, and runtime logs in automotive ECUs. IC Role / Device Role / Timing Role: Parameter storage with hardware write protection (/WP pin + BP bits) - prevents accidental overwrite during CAN bus diagnostics. Use Value: 4KB sectors allow independent locking of calibration vs. log regions; 20-year retention meets automotive lifecycle requirements. | Use Scenario: Storing GUI assets (fonts, icons, bitmaps) and localized language strings in smart home displays. IC Role / Device Role / Timing Role: High-bandwidth asset cache using Fast Read Quad I/O (EBh) - accelerates screen refresh and animation rendering. Use Value: 416 MB/s effective throughput eliminates display stutter; continuous read mode reduces CPU polling overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L12833FZC-10G | 128M-bit, 104MHz max, SOIC-16 package with dedicated /RESET; no /HOLD pin; supports DTR mode | Requires 16-pin footprint; lacks /HOLD functionality but adds dual-transfer-rate capability for higher throughput in specific controllers | Select when /RESET independence is critical and board layout accommodates larger SOIC-16; verify host SPI controller supports DTR commands |
| S25FL128SAGMFV001 | 128M-bit, 80MHz max, SOIC-16; includes on-die ECC and sector lockdown; no QPI mode | Targeted at safety-critical applications needing error correction; lacks QPI but offers enhanced data integrity features | Prefer for automotive ASIL-B designs where ECC and lockdown outweigh raw speed; not drop-in due to lower clock and missing QPI |
Compared with MX25L12833FZC-10G and S25FL128SAGMFV001, W25Q128FVSJQ TR provides balanced performance, Quad I/O flexibility, and compact SOIC-208mil packaging - making it optimal for cost-sensitive, space-constrained embedded systems requiring XIP and field-upgrade capability without ECC or DTR dependencies.
Availability
W25Q128FVSJQ TR is available at Aetrix Electronics and suitable for boot code storage, firmware OTA updates, configuration data retention, HMI asset caching, and industrial logging applications requiring stable component supply across multi-year production cycles.
Supply support for W25Q128FVSJQ TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor manufacturer specializing in specialty DRAM, mobile DRAM, and serial flash memory solutions for consumer, industrial, and automotive markets.
The W25Q series targets embedded systems requiring high-speed, low-power, and secure code/data storage - designed specifically for microcontroller boot, XIP execution, and firmware update resilience in resource-constrained environments.
FAQ
What interface protocols does the W25Q128FVSJQ TR support?
The W25Q128FVSJQ TR supports Standard SPI, Dual SPI, Quad SPI, and Quad Peripheral Interface (QPI). Quad SPI and QPI require the non-volatile Quad Enable (QE) bit in Status Register-2 to be set. Standard SPI uses dedicated DI/DO pins; Dual/Quad modes repurpose /WP and /HOLD as IO2/IO3. QPI reduces instruction overhead by encoding commands and data in 4-bit nibbles, enabling faster sequential reads than standard SPI.
Does the W25Q128FVSJQ TR have hardware write protection?
Yes, the W25Q128FVSJQ TR includes hardware write protection via the active-low /WP pin, which locks Status Register writes when asserted. This works in conjunction with software-configurable Block Protect (BP2–BP0), Top/Bottom (TB), Sector Protect (SEC), and Complement Protect (CMP) bits in Status Registers 1–3. When /WP is held low and BP bits are set, sectors as small as 4KB can be permanently locked against accidental erase or program - critical for safeguarding bootloader code.
What is the significance of the "SJQ" suffix in W25Q128FVSJQ TR?
The "SJQ" suffix in W25Q128FVSJQ TR indicates an 8-pin SOIC-208mil package (S), industrial temperature range (−40°C to +85°C) (J), and lead-free, halogen-free, RoHS-compliant finish (Q). The "TR" denotes tape-and-reel packaging for automated assembly. This specific variant uses Package Code S per Winbond's ordering guide and is optimized for surface-mount manufacturing in commercial and industrial PCBs.
Can the W25Q128FVSJQ TR be used for execute-in-place (XIP) operation?
Yes, the W25Q128FVSJQ TR supports true XIP operation via Continuous Read Mode and Quad I/O instructions. With as few as 8 clocks to address memory and Fast Read Quad I/O (EBh) achieving up to 416 MB/s effective throughput, it delivers deterministic latency for instruction fetches. XIP is enabled by configuring the device in Quad SPI or QPI mode and ensuring the host controller supports memory-mapped SPI access - commonly implemented in ARM Cortex-M7/M33 and RISC-V SoCs.
How many program/erase cycles does the W25Q128FVSJQ TR guarantee?
The W25Q128FVSJQ TR guarantees a minimum of 100,000 program/erase cycles per sector, validated per JEDEC JESD22-A117. This endurance rating applies to each 4KB sector individually and supports long-term field upgrades - for example, monthly firmware updates over 8+ years. Endurance is maintained across the full industrial temperature range (−40°C to +85°C) and 2.7–3.6V supply, with no derating required under typical operating conditions.
W25Q128FVSJQ TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O, QPI
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 50µs, 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
W25Q128FVSJQ TR FAQ
1.How can I place an order for W25Q128FVSJQ TR through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q128FVSJQ TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q128FVSJQ TR reliable?
The price and inventory of W25Q128FVSJQ TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q128FVSJQ TR is usually 5 days.
3.What payment methods are accepted for W25Q128FVSJQ TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q128FVSJQ TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q128FVSJQ TR?
W25Q128FVSJQ TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q128FVSJQ TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q128FVSJQ TR?
For technical support, including W25Q128FVSJQ TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q128FVSJQ TR requirements.
6.How does Aetrix verify that W25Q128FVSJQ TR is sourced from the original manufacturer or authorized distributors?
All W25Q128FVSJQ TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q128FVSJQ TR meets industry standards.
7.What is the process for return or replacement of W25Q128FVSJQ TR?
All W25Q128FVSJQ TR units undergo pre-shipment inspection (PSI). If there is an issue with W25Q128FVSJQ TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q128FVSJQ TR part is unused and in its original packaging.
Return procedure for W25Q128FVSJQ TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
W25Q128FVSJQ TR Tags
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