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Winbond Electronics Corporation W25Q128FVTIG
- Part No.:
- W25Q128FVTIG
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
W25Q128FVTIG.pdf
- Description:
- IC FLASH 128MBIT SPI/QUAD 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,381
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Product details
Overview
W25Q128FVTIG from Winbond is a 128M-bit (16MB) serial NOR flash memory supporting Standard/Dual/Quad SPI and QPI interfaces, operating at 2.7–3.6V with 104MHz max clock, 4KB uniform sectors, and hardware write protection via /WP and /HOLD pins - used for code storage, XIP boot, firmware updates, and parameter retention in microcontroller-based embedded systems.
For engineers reviewing the W25Q128FVTIG datasheet, W25Q128FVTIG pinout, W25Q128FVTIG application, or W25Q128FVTIG equivalent, key selection considerations include Quad Enable (QE) bit configuration, /HOLD vs /RESET pin behavior across package variants, 4KB sector erase granularity, JEDEC ID (EF4018), SFDP register support, and compatibility with SPI host controllers requiring continuous read mode or suspend/resume functionality.
Technical Context
The W25Q128FVTIG implements a flexible SPI-compatible command set with volatile/non-volatile status register control (SRP0/SRP1, BP0–BP2, TB, SEC, CMP, QE, DRV0/DRV1, HOLD/RST), enabling hardware- and software-based memory protection. Its architecture supports simultaneous instruction execution and data transfer via Dual/Quad I/O modes, reducing instruction overhead through QPI's 2-clock-cycle instruction cycle.
It features Erase/Program Suspend & Resume (75h/7Ah), power-down mode (B9h) with 1µA typical current, and 64-bit unique ID (4Bh). The device uses a 65,536-page array (256 bytes/page), with erasable units of 4KB (sector), 32KB (block), 64KB (block), or full chip - all supported across all package types without functional variation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 M-bit (16 MB) - sufficient for full MCU firmware images and persistent configuration data in space-constrained designs. |
| Interface Modes | Standard SPI, Dual SPI, Quad SPI, QPI - enables scalable bandwidth: up to 416 MB/s effective throughput in Quad I/O mode. |
| Max Clock Frequency | 104 MHz - allows high-speed read/write operations compatible with modern ARM Cortex-M and RISC-V host controllers. |
| Erase Granularity | Uniform 4KB sectors (4,096 total) - supports fine-grained firmware patching and secure parameter partitioning without over-erasing. |
| Write Endurance | 100,000 program/erase cycles - ensures long-term reliability for field-updatable systems with frequent OTA updates. |
| Data Retention | 20 years at +25°C - meets industrial and automotive storage longevity requirements without refresh logic. |
| Operating Voltage | 2.7 V to 3.6 V - compatible with 3.3V logic families and mixed-voltage SoC interfaces without level-shifting. |
| Unique ID | 64-bit factory-programmed serial number (read via 4Bh) - enables device authentication, secure provisioning, and BOM traceability. |
Pinout & Package
W25Q128FVTIG is supplied in an 8-pin TSSOP (Thin Shrink Small Outline Package) 208-mil variant (JEDEC MO-153, package code "T"), with lead-free, RoHS-compliant finish and matte tin plating.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 /CS | Chip Select Input | Active-low enable signal; must transition high→low before instruction acceptance; controls DO high-impedance state during deselect. |
| 2 DO (IO1) | Data Output / Bidirectional I/O | Unidirectional output in Standard SPI; bidirectional I/O in Dual/Quad SPI; requires QE=1 for Quad mode operation. |
| 3 /WP (IO2) | Write Protect Input / Bidirectional I/O | Hardware lock for Status Register when active low; repurposed as IO2 in Quad mode (QE=1); not available in QPI. |
| 4 GND | Ground Reference | Primary signal and power return path; must be low-impedance and decoupled near VCC pin. |
| 5 DI (IO0) | Data Input / Bidirectional I/O | Unidirectional input in Standard SPI; bidirectional I/O in Dual/Quad SPI; used for instruction/address/data loading on CLK rising edge. |
| 6 CLK | Serial Clock Input | Synchronous timing reference for all SPI/QPI operations; supports up to 104 MHz; edge-triggered (rising for input, falling for output). |
| 7 /HOLD (IO3) | Hold Input / Bidirectional I/O | Pauses ongoing SPI transaction when pulled low; repurposed as IO3 in Quad mode (QE=1); function disabled in QPI. |
| 8 VCC | Power Supply | 2.7–3.6V core supply; requires local 0.1 µF ceramic decoupling capacitor placed adjacent to pin. |
Key Features
| Feature | Design Value |
|---|---|
| Quad Peripheral Interface (QPI) | Reduces instruction overhead to 2 clocks per instruction, enabling true XIP execution without external cache or prefetch logic. |
| Erase/Program Suspend & Resume | Allows background firmware update while servicing real-time interrupts - critical for safety-critical and deterministic embedded applications. |
| JEDEC SFDP Register | Provides standardized, host-readable flash parameter table (5Ah), eliminating hard-coded timing constants in bootloader firmware. |
| Three 256-byte Security Registers | OTP-lockable storage for cryptographic keys, calibration data, or licensing tokens - isolated from main array and inaccessible via standard read commands. |
| Continuous Read Mode with Wrap | Enables burst reads of 8/16/32/64-byte aligned blocks using single instruction, minimizing CPU overhead during sequential code fetch. |
| Volatile & Non-Volatile Status Control | Enables runtime reconfiguration of protection (e.g., BP bits) while preserving settings across power cycles - essential for field-serviceable devices. |
Applications
| Industrial PLC Firmware Storage | Automotive Infotainment Boot Memory |
|---|---|
|
Use Scenario: Storing and executing boot loader and real-time control firmware in programmable logic controllers with no external RAM. IC Role / Device Role / Timing Role: Primary non-volatile code storage with XIP capability; provides deterministic 104MHz read access to instruction stream. Use Value: Eliminates need for parallel NOR flash or external SRAM caching, reducing BOM cost and PCB footprint by >30% versus legacy solutions. |
Use Scenario: Holding boot code, OS kernel, and UI assets for head-unit systems requiring fast cold-start (<500ms) and secure firmware updates. IC Role / Device Role / Timing Role: Dual-role memory: executes boot code directly (XIP) and stores encrypted OTA update payloads in protected sectors. Use Value: Leverages 4KB sector erase and security registers to isolate update partitions and prevent rollback attacks during multi-stage flashing. |
| Medical Device Configuration Archive | IoT Edge Node Parameter Log |
|
Use Scenario: Retaining calibrated sensor offsets, user preferences, and audit logs across power cycles in portable diagnostic equipment. IC Role / Device Role / Timing Role: Parameter storage with hardware write protection (/WP pin + BP bits) and 20-year data retention guarantee. Use Value: Ensures regulatory compliance (IEC 62304) by preventing accidental or malicious corruption of calibration data without physical intervention. |
Use Scenario: Logging sensor telemetry, network credentials, and firmware version history in battery-powered wireless sensors. IC Role / Device Role / Timing Role: Low-power persistent storage: draws only 1µA in power-down mode and supports sector-level wear leveling via host firmware. Use Value: Extends coin-cell battery life beyond 5 years by minimizing active current (4mA typ.) and enabling deep-sleep between log writes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L12833FZNI-08G | 128M-bit, 3V, 133MHz max clock, supports DTR mode; no QPI; different SFDP layout and JEDEC ID (C22018). | Lacks QPI and continuous read wrap; requires modified driver stack for DTR timing; higher clock tolerance but no suspend/resume. | Choose when maximum read speed is prioritized over instruction flexibility and XIP efficiency. |
| S25FL128SAGMFI001 | 128M-bit, 3V, 108MHz max clock, supports HyperBus interface; includes built-in ECC; different security register implementation. | Requires HyperBus controller or bridge IC; ECC reduces effective usable capacity; no /HOLD pin in 8-pin variant. | Prefer for safety-critical applications needing on-the-fly error correction, but avoid if host lacks HyperBus PHY. |
Compared with MX25L12833FZNI-08G and S25FL128SAGMFI001, the W25Q128FVTIG delivers superior instruction efficiency via QPI and seamless XIP support, while maintaining broader host compatibility through standard SPI fallback - making it optimal for resource-constrained MCUs without dedicated HyperBus or DTR peripherals.
Availability
W25Q128FVTIG is available at Aetrix Electronics and suitable for industrial automation, automotive infotainment, medical diagnostics, and IoT edge node designs requiring stable component supply, long-lifecycle assurance, and RoHS-compliant packaging.
Supply support for W25Q128FVTIG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor company specializing in specialty memory solutions, including serial NOR/NAND flash, RAM, and mobile DRAM, serving industrial, automotive, and consumer markets since 1987.
The W25Q series was designed specifically for embedded systems requiring high-speed, low-power, and secure code and data storage - emphasizing XIP capability, flexible protection schemes, and broad host controller interoperability.
FAQ
What is the pin configuration of W25Q128FVTIG?
W25Q128FVTIG uses an 8-pin TSSOP-208 package with pins: 1=/CS, 2=DO(IO1), 3=/WP(IO2), 4=GND, 5=DI(IO0), 6=CLK, 7=/HOLD(IO3), 8=VCC. In Quad SPI mode (QE=1), /WP and /HOLD become IO2 and IO3; these functions are disabled in QPI mode. The /RESET function is not available on this 8-pin variant.
Does W25Q128FVTIG support execute-in-place (XIP) operation?
Yes, W25Q128FVTIG supports true XIP via Continuous Read Mode and QPI interface. With as few as 8 clocks to address memory and wrap sizes up to 64 bytes, it enables direct code execution from flash without copying to RAM - validated in ARM Cortex-M4/M7 and RISC-V RV32IMC platforms.
How is hardware write protection implemented on W25Q128FVTIG?
W25Q128FVTIG implements hardware write protection using the /WP pin (active low) in conjunction with non-volatile status register bits (BP0–BP2, TB, SEC, CMP, SRP0/SRP1). When /WP is asserted, Status Register writes are blocked unless SRP0/SRP1 are cleared - protecting sectors from accidental overwrite even during power cycling.
What is the purpose of the QE bit in W25Q128FVTIG Status Register-2?
The Quad Enable (QE) bit in Status Register-2 (bit 1) must be set to '1' to activate Quad SPI mode. When QE=1, pins /WP and /HOLD become IO2 and IO3 respectively; their hardware protection functions are disabled. QE can be set via Write Status Register-2 (31h) command and is non-volatile unless cleared.
Can W25Q128FVTIG be used in automotive temperature-grade applications?
W25Q128FVTIG is rated for –40°C to +85°C operation and qualified to AEC-Q100 Class 3 standards in automotive-grade variants (e.g., W25Q128FVSIQ), but the W25Q128FVTIG suffix denotes industrial grade. For automotive use, specify the SIQ or other AEC-Q100 qualified part number - W25Q128FVTIG itself is not automotive-qualified.
W25Q128FVTIG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O, QPI
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 50µs, 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
W25Q128FVTIG FAQ
1.How can I place an order for W25Q128FVTIG through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q128FVTIG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q128FVTIG reliable?
The price and inventory of W25Q128FVTIG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q128FVTIG is usually 5 days.
3.What payment methods are accepted for W25Q128FVTIG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q128FVTIG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q128FVTIG?
W25Q128FVTIG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q128FVTIG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q128FVTIG?
For technical support, including W25Q128FVTIG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q128FVTIG requirements.
6.How does Aetrix verify that W25Q128FVTIG is sourced from the original manufacturer or authorized distributors?
All W25Q128FVTIG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q128FVTIG meets industry standards.
7.What is the process for return or replacement of W25Q128FVTIG?
All W25Q128FVTIG units undergo pre-shipment inspection (PSI). If there is an issue with W25Q128FVTIG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q128FVTIG part is unused and in its original packaging.
Return procedure for W25Q128FVTIG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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