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Winbond Electronics Corporation W25Q128JVCJQ
- Part No.:
- W25Q128JVCJQ
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 24-TBGA
- Datasheet:
-
W25Q128JVCJQ.pdf
- Description:
- IC FLASH 128MBIT SPI 24TFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:4,504
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Product details
Overview
W25Q128JVCJQ from Winbond is a 128M-bit (16MB) serial NOR flash memory with Dual/Quad SPI interface, organized into 65,536 pages of 256 bytes each and supporting 4KB sector, 32KB block, 64KB block, and chip erase. It operates on a single 2.7V–3.6V supply, draws ≤1µA in power-down mode, and delivers up to 133MHz SPI clock frequency for 532MB/s equivalent Quad I/O throughput. It is used for code execution-in-place (XIP), firmware storage, and parameter retention in industrial embedded systems.
For engineers reviewing the W25Q128JVCJQ datasheet, W25Q128JVCJQ pinout, W25Q128JVCJQ application, or W25Q128JVCJQ equivalent, key selection considerations include Quad Enable (QE) bit configuration, /HOLD vs /RESET pin availability per package, 4KB sector granularity for data logging, JEDEC ID and SFDP register support for auto-configuration, and hardware write protection via /WP and status register bits.
Technical Context
The W25Q128JVCJQ implements a standard SPI bus with Mode 0 and Mode 3 compatibility, supports Dual SPI (IO0/IO1) and Quad SPI (IO0–IO3) via non-volatile QE bit in Status Register-2, and uses dedicated high-voltage generators for erase/program operations. Its command set includes Fast Read Quad I/O (EBh), Quad Input Page Program (32h), and Erase/Program Suspend (75h) for real-time interrupt handling.
It integrates three 256-byte security registers with OTP locks, a 64-bit unique serial number, and configurable output driver strength (DRV1/DRV0). Block protection is implemented via volatile/non-volatile BP2–BP0, TB, SEC, and CMP bits, enabling hardware-level locking of individual 4KB sectors or top/bottom array regions without software intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 M-bit (16 MB), enabling full firmware image storage for mid-size microcontrollers |
| SPI Clock Frequency | Up to 133 MHz - supports 532 MB/s effective bandwidth in Quad I/O mode for XIP latency reduction |
| Erase Granularity | Uniform 4 KB sectors (4,096 total), allowing fine-grained field-upgrade partitioning and wear leveling |
| Endurance & Retention | 100,000 program/erase cycles per sector; >20 years data retention at +85°C - suitable for industrial logging |
| Supply Voltage | 2.7 V to 3.6 V - compatible with 3.3 V logic rails and brown-out tolerant in wide-temperature environments |
| Power-Down Current | ≤1 µA typical - enables ultra-low-power sleep modes in battery-backed or energy-harvesting systems |
| Operating Temperature | −40°C to +105°C (Industrial Plus grade) - validated for under-hood automotive and factory-floor deployment |
Pinout & Package
W25Q128JVCJQ is supplied in an 8-pin SOIC 208-mil package (Package Code S), with pins arranged as follows:
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | /CS | Active-low chip select - must transition high→low after power-up before instruction acceptance |
| 2 | DO (IO1) | Bidirectional data line - functions as DO in Standard/Dual SPI; IO1 in Quad SPI when QE=1 |
| 3 | /WP (IO2) | Hardware write protect input - active-low; becomes IO2 in Quad SPI mode when QE=1 |
| 4 | GND | Ground reference - decoupling capacitor placement critical for signal integrity at 133 MHz |
| 5 | DI (IO0) | Bidirectional data line - functions as DI in Standard/Dual SPI; IO0 in Quad SPI when QE=1 |
| 6 | CLK | Serial clock input - supports Mode 0/3; timing-critical path requiring controlled impedance routing |
| 7 | /HOLD (IO3) | Hold or reset input - active-low; becomes IO3 in Quad SPI; not available as /RESET in this SOIC-8 variant |
| 8 | VCC | Power supply - requires local 100 nF ceramic decoupling adjacent to pin |
Key Features
| Feature | Design Value |
|---|---|
| Quad SPI Interface | Enables 532 MB/s effective throughput via IO0–IO3; requires QE bit set in Status Register-2 for persistent activation |
| Erase/Program Suspend | Allows interruption of long erase/program cycles (e.g., 64KB block erase) to service higher-priority reads or writes |
| Individual Sector Lock | Permits hardware-level locking of any 4KB sector using 32h/39h/3Dh instructions - no firmware overhead required |
| Security Registers | Three 256-byte OTP-lockable registers store cryptographic keys or calibration data immune to bulk erase |
| Continuous Read Wrap | Supports 8/16/32/64-byte wrap modes - reduces address overhead and enables seamless streaming for audio/video buffers |
Applications
| Firmware Boot Storage | Industrial Data Logger |
|---|---|
|
Use Scenario: Storing boot loader and application firmware for ARM Cortex-M7 microcontrollers in PLC controllers. IC Role / Device Role / Timing Role: Non-volatile code storage with XIP capability via Fast Read Quad I/O (EBh) to reduce boot time by >40% vs parallel flash. Use Value: Eliminates external RAM copy step; leverages 133 MHz Quad SPI to achieve <120 ms full-image load at 532 MB/s effective rate. |
Use Scenario: Recording sensor timestamps, fault codes, and operational parameters in railway signaling equipment. IC Role / Device Role / Timing Role: Parameter storage with atomic 4KB sector erase - isolates logging partitions from firmware updates. Use Value: Enables independent wear leveling across 4,096 sectors; guarantees 100K cycles per sector for >10-year field life. |
| Secure OTA Update Partition | Automotive Infotainment Cache |
|
Use Scenario: Holding signed firmware delta patches and root-of-trust certificates in telematics gateways. IC Role / Device Role / Timing Role: Secure storage using three 256-byte OTP-locked security registers and 64-bit unique ID for device binding. Use Value: Prevents unauthorized patch injection; ensures certificate persistence across full chip erase during recovery. |
Use Scenario: Caching map tiles and UI assets in head-unit systems where NAND flash latency is unacceptable. IC Role / Device Role / Timing Role: High-speed read cache using Continuous Read with 64-byte wrap to sustain burst streaming. Use Value: Delivers consistent <80 ns random access latency - 3× faster than eMMC for GUI asset loading. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L12833FZC-10G | 128 M-bit, 104 MHz max SPI clock, no Quad I/O suspend/resume, lacks SFDP register | Lower throughput; no dynamic suspend for real-time systems; requires fixed configuration instead of auto-discovery | Choose for cost-sensitive designs where 133 MHz and suspend features are unnecessary |
| S25FL128SAGMFI000 | 128 M-bit, 80 MHz max SPI clock, supports HyperBus interface, includes ECC on read | HyperBus enables x16 parallel-equivalent bandwidth but requires different controller IP; ECC adds reliability overhead | Choose when system uses Cypress-compatible controllers and soft-error resilience is mandatory |
Compared with MX25L12833FZC-10G and S25FL128SAGMFI000, W25Q128JVCJQ provides the highest SPI clock rate (133 MHz), integrated Quad I/O suspend/resume, and JEDEC SFDP for automatic configuration - making it optimal for XIP-critical, field-upgradable industrial systems requiring both speed and flexibility.
Availability
W25Q128JVCJQ is available at Aetrix Electronics and suitable for industrial control systems, railway signaling modules, and automotive infotainment units requiring stable component supply across extended temperature ranges and multi-year production cycles.
Supply support for W25Q128JVCJQ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor company specializing in specialty memory solutions, including serial flash, mobile DRAM, and code storage devices for industrial and automotive markets.
The W25Q series was designed specifically for embedded systems needing high-speed, low-power, and secure code/data storage - with emphasis on XIP performance, sector-level protection, and industrial-grade reliability.
FAQ
What is the package type and pin count of W25Q128JVCJQ?
W25Q128JVCJQ is packaged in an 8-pin SOIC 208-mil (Package Code S) with standard SPI pinout: /CS, DO (IO1), /WP (IO2), GND, DI (IO0), CLK, /HOLD (IO3), and VCC. It does not include a dedicated /RESET pin - that function is only available on SOIC-16 and TFBGA variants of the W25Q128JV family.
Does W25Q128JVCJQ support Quad SPI operation out of the box?
No - W25Q128JVCJQ requires the Quad Enable (QE) bit in Status Register-2 to be set (via Write Status Register-2 instruction 31h) to activate Quad SPI mode. Until QE=1, pins /WP and /HOLD remain functional as hardware controls; after enabling, they become IO2 and IO3 respectively.
How many program/erase cycles does W25Q128JVCJQ guarantee per sector?
W25Q128JVCJQ guarantees a minimum of 100,000 program/erase cycles per 4KB sector, validated under industrial operating conditions (−40°C to +105°C). This endurance rating applies to all sectors regardless of location within the 16MB array and is specified in the official Winbond datasheet Revision F.
Can W25Q128JVCJQ be used for execute-in-place (XIP) applications?
Yes - W25Q128JVCJQ supports true XIP via Fast Read Quad I/O (EBh) and Continuous Read with wrap modes. Its 133 MHz SPI clock and 532 MB/s effective bandwidth enable low-latency instruction fetch directly from flash, eliminating the need for RAM shadowing in resource-constrained microcontrollers.
What hardware write protection mechanisms does W25Q128JVCJQ provide?
W25Q128JVCJQ provides dual-layer hardware write protection: (1) the /WP pin (active-low) to lock status register writes, and (2) non-volatile block protect bits (BP2–BP0, TB, SEC, CMP) that can permanently or temporarily lock any 4KB sector or top/bottom array region - independent of /WP state once configured.
W25Q128JVCJQ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 24-TBGA
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O, QPI, DTR
- Clock Frequency:
- 133 MHz
- Write Cycle Time - Word, Page:
- 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TFBGA (6x8)
W25Q128JVCJQ FAQ
1.How can I place an order for W25Q128JVCJQ through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q128JVCJQ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q128JVCJQ reliable?
The price and inventory of W25Q128JVCJQ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q128JVCJQ is usually 5 days.
3.What payment methods are accepted for W25Q128JVCJQ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q128JVCJQ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q128JVCJQ?
W25Q128JVCJQ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q128JVCJQ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q128JVCJQ?
For technical support, including W25Q128JVCJQ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q128JVCJQ requirements.
6.How does Aetrix verify that W25Q128JVCJQ is sourced from the original manufacturer or authorized distributors?
All W25Q128JVCJQ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q128JVCJQ meets industry standards.
7.What is the process for return or replacement of W25Q128JVCJQ?
All W25Q128JVCJQ units undergo pre-shipment inspection (PSI). If there is an issue with W25Q128JVCJQ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q128JVCJQ part is unused and in its original packaging.
Return procedure for W25Q128JVCJQ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
W25Q128JVCJQ Tags
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