Winbond Electronics Corporation W25Q128JVPJQ
- Part No.:
- W25Q128JVPJQ
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 8-WDFN Exposed Pad
- Datasheet:
-
W25Q128JVPJQ.pdf
- Description:
- IC FLASH 128MBIT SPI/QUAD 8WSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
W25Q128JVPJQ from Winbond is a 128M-bit (16MB) serial NOR flash memory IC supporting Standard/Dual/Quad SPI interfaces, organized into 65,536 × 256-byte pages with uniform 4KB sector erase capability, operating from 2.7V to 3.6V, and rated for -40°C to +105°C industrial-plus temperature range - used for code storage, XIP execution, and firmware parameter retention in embedded controllers.
For engineers reviewing the W25Q128JVPJQ datasheet, W25Q128JVPJQ pinout, W25Q128JVPJQ application, or W25Q128JVPJQ equivalent, key selection criteria include Quad SPI enable (QE bit), hardware /RESET availability, 133MHz max clock support, 4KB sector granularity, and JEDEC SFDP compliance for automatic configuration.
Technical Context
The W25Q128JVPJQ implements a SPI-compatible command set with three instruction modes: Standard (DI/DO), Dual (IO0/IO1), and Quad (IO0–IO3), where Quad mode requires non-volatile QE bit setting in Status Register-2. It supports continuous read with wrap (8/16/32/64-byte), erase/program suspend/resume, and true execute-in-place (XIP) operation via Fast Read Quad I/O (EBh).
Its architecture includes three 256-byte security registers with OTP locks, 64-bit unique ID, and flexible protection via volatile/non-volatile status bits (BP2–BP0, TB, SEC, CMP, SRP), enabling hardware write-protection down to individual 4KB sectors using /WP and /HOLD pins - with /RESET available only on SOIC-16 and TFBGA packages.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 M-bit (16 MB), organized as 65,536 × 256-byte programmable pages |
| Operating Voltage | 2.7 V to 3.6 V - compatible with 3.3 V logic systems without level shifting |
| SPI Clock Max | 133 MHz single I/O; 266 MHz equivalent dual I/O; 532 MHz equivalent quad I/O - enables 66 MB/s sustained read throughput |
| Erase Granularity | Uniform 4 KB sectors (4,096 total), 32 KB blocks (2,048), 64 KB blocks (256), and full chip - supports fine-grained firmware update partitioning |
| Data Retention | 20+ years at +85°C - validated for long-life industrial deployments |
| Endurance | 100,000 program/erase cycles per sector - sufficient for frequent OTA firmware updates |
| Temperature Range | -40°C to +105°C - qualified for industrial-plus grade applications including automotive infotainment and motor control |
| Security Features | 64-bit unique ID, JEDEC SFDP register, three 256-byte OTP-lockable security registers, and configurable sector-level lock/unlock (36h/39h) |
Pinout & Package
W25Q128JVPJQ uses an 8-pin SOIC 208-mil package (Package Code S), with no dedicated /RESET pin - /HOLD functionality is implemented on Pin 7, and Quad SPI mode repurposes /WP (Pin 3) and /HOLD (Pin 7) as IO2 and IO3 respectively when QE=1.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 (/CS) | Chip Select Input | Active-low enable; high-impedance DO during deselect; must transition high→low after power-up before first instruction |
| 2 (DO / IO1) | Data Output / Bidirectional I/O | Standard SPI output only; becomes bidirectional IO1 in Dual/Quad mode - used for read data and status |
| 3 (/WP / IO2) | Write Protect Input / Bidirectional I/O | Hardware sector lock enable when low; becomes IO2 in Quad mode (QE=1); requires external pull-up if unused |
| 4 (GND) | Ground Reference | Primary return path for VCC and all I/O signals; must be low-inductance connection for signal integrity |
| 5 (DI / IO0) | Data Input / Bidirectional I/O | Standard SPI input only; becomes bidirectional IO0 in Dual/Quad mode - carries instructions, addresses, and write data |
| 6 (CLK) | Serial Clock Input | Edge-triggered timing reference; supports SPI Mode 0 and Mode 3; max 133 MHz frequency determines read/write speed |
| 7 (/HOLD / IO3) | Hold Input / Bidirectional I/O | Pauses ongoing read/write when low (active-low); becomes IO3 in Quad mode (QE=1); not available during Quad operation |
| 8 (VCC) | Power Supply | 2.7–3.6 V supply; decoupling capacitor (0.1 µF) required near pin for stable operation during fast read bursts |
Key Features
| Feature | Design Value |
|---|---|
| Quad SPI Enable (QE bit) | Non-volatile Status Register-2 bit that unlocks IO2/IO3 for 4-line data transfer - enables 532 MHz equivalent bandwidth and XIP performance |
| Erase/Program Suspend | Allows pausing active erase or program operations (75h) to service urgent reads - critical for real-time interrupt handling in firmware |
| Individual Sector Lock | Per-sector write protection via 36h/39h commands - isolates bootloader, calibration data, or secure keys from accidental overwrite |
| Continuous Read Wrap | Configurable 8/16/32/64-byte address wrap reduces overhead for sequential access - eliminates address retransmission in streaming applications |
| JEDEC SFDP Support | Standard Flash Discovery Parameter table (5Ah) provides auto-configurable timing, voltage, and feature parameters - simplifies driver portability across flash vendors |
| 64-bit Unique ID | Factory-programmed immutable identifier per die - enables device authentication, secure boot binding, and field failure traceability |
Applications
| Industrial PLC Firmware Storage | Automotive Infotainment Boot Memory |
|---|---|
|
Use Scenario: Storing firmware images and configuration tables in programmable logic controllers deployed in factory automation environments with wide ambient temperature swings. IC Role / Device Role / Timing Role: Primary non-volatile code storage device accessed via Quad SPI for fast boot and runtime XIP execution - directly mapped into MCU address space. Use Value: 4KB sector erase enables atomic firmware patching without disrupting operational logic; 100K endurance supports decades of field updates under industrial duty cycles. |
Use Scenario: Hosting boot loader, OS kernel, and UI assets in head-unit systems requiring AEC-Q100-compliant components and rapid cold-start response. IC Role / Device Role / Timing Role: High-speed serial boot memory interfaced to application processor via Quad SPI with 133 MHz clock - delivers >60 MB/s read throughput for sub-second boot. Use Value: -40°C to +105°C rating ensures reliability in under-dash thermal environments; 64-bit UID enables secure firmware signing and anti-cloning enforcement. |
| Medical Diagnostic Device Data Logging | Smart Energy Meter Firmware & Calibration |
|
Use Scenario: Capturing time-stamped sensor waveforms and diagnostic logs in portable ultrasound or ECG units where data integrity and long-term retention are critical. IC Role / Device Role / Timing Role: Dual-purpose memory: executes embedded control firmware (XIP) while allocating dedicated 4KB sectors for cyclic logging buffers with hardware write-protection. Use Value: Individual sector lock (36h) prevents corruption of calibration constants during field updates; 20-year data retention meets medical device regulatory requirements. |
Use Scenario: Storing metrology firmware, tariff tables, and factory calibration coefficients in ANSI C12.20-certified electricity meters exposed to outdoor temperature extremes. IC Role / Device Role / Timing Role: Secure, temperature-hardened firmware repository with hardware-based write protection activated via /WP pin and status register bits. Use Value: Top/bottom block protect (TB bit) isolates bootloader from user-modifiable application partitions; power-down current <1 µA extends battery backup life during outages. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L12833FZC-10G | 128 M-bit, 104 MHz max clock, no hardware /RESET, supports SFDP but lacks security registers and unique ID | Suitable for cost-sensitive consumer devices where security features are optional and thermal range is limited to -40°C to +85°C | Select when full industrial-plus temperature range and cryptographic identifiers are not required |
| S25FL128SAGMFI000 | 128 M-bit, 80 MHz max clock, includes HyperBus interface option, integrated ECC, but no Quad SPI wrap mode or suspend/resume | Better suited for high-reliability aerospace/defense systems needing error correction, but less optimal for XIP-critical embedded Linux boot | Choose when built-in ECC and deterministic latency outweigh raw Quad SPI bandwidth needs |
Compared with MX25L12833FZC-10G and S25FL128SAGMFI000, W25Q128JVPJQ delivers higher bandwidth (133 MHz vs. 104/80 MHz), broader temperature support (+105°C), and stronger security (64-bit UID, OTP security registers), making it optimal for industrial-plus and automotive-tier firmware storage where speed, longevity, and identity assurance are jointly critical.
Availability
W25Q128JVPJQ is available at Aetrix Electronics and suitable for industrial PLCs, automotive infotainment systems, medical diagnostics equipment, and smart energy metering applications requiring stable component supply, long-lifecycle support, and guaranteed industrial-plus grade qualification.
Supply support for W25Q128JVPJQ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor company specializing in specialty memory solutions, including serial flash, RAM, and trusted computing components, serving industrial, automotive, and communications markets since 1987.
The W25Q series was designed specifically for high-performance, secure, and temperature-resilient embedded firmware storage - emphasizing Quad SPI bandwidth, sector-level protection, and long-term data integrity in resource-constrained systems.
FAQ
What is the package type and pin count of W25Q128JVPJQ?
W25Q128JVPJQ uses an 8-pin SOIC 208-mil package (Package Code S). It has no dedicated /RESET pin; instead, Pin 7 functions as /HOLD in Standard/Dual SPI mode and as IO3 in Quad SPI mode when the QE bit is set. This matches the mechanical and electrical specifications defined in Winbond's W25Q128JV datasheet Revision F.
Does W25Q128JVPJQ support Quad SPI operation, and how is it enabled?
Yes, W25Q128JVPJQ supports Quad SPI operation using instructions like Fast Read Quad I/O (EBh). It is enabled by setting the non-volatile Quad Enable (QE) bit in Status Register-2 via Write Status Register-2 (31h) command. Once QE=1, Pins 3 (/WP) and 7 (/HOLD) become IO2 and IO3, allowing four-line data transfer.
What is the maximum clock frequency supported by W25Q128JVPJQ in different SPI modes?
W25Q128JVPJQ supports up to 133 MHz in Standard SPI mode, 133 MHz in Dual SPI mode (yielding 266 Mbps effective rate), and 133 MHz in Quad SPI mode (yielding 532 Mbps effective rate). These values are specified in the AC Electrical Characteristics section of the official datasheet and validated across the full -40°C to +105°C operating range.
How does hardware write protection work on W25Q128JVPJQ?
Hardware write protection on W25Q128JVPJQ is implemented via the /WP pin (Pin 3), which - when held low - prevents writes to the status register. Combined with status bits (BP2–BP0, TB, SEC), it enables hardware locking of sectors or blocks. The /WP pin is active-low and requires external pull-up if unused; its function is replaced by IO2 in Quad SPI mode when QE=1.
Is W25Q128JVPJQ qualified for automotive applications?
W25Q128JVPJQ is rated for Industrial Plus grade (-40°C to +105°C) and is commonly used in automotive infotainment and body control modules, though it is not AEC-Q100 certified. For AEC-Q100-compliant alternatives, designers should consider Winbond's automotive-grade W25Q128JW series or consult Winbond's qualified part list for specific qualification status of W25Q128JVPJQ.
W25Q128JVPJQ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 8-WDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O, QPI, DTR
- Clock Frequency:
- 133 MHz
- Write Cycle Time - Word, Page:
- 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WSON (6x5)
W25Q128JVPJQ FAQ
1.How can I place an order for W25Q128JVPJQ through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q128JVPJQ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q128JVPJQ reliable?
The price and inventory of W25Q128JVPJQ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q128JVPJQ is usually 5 days.
3.What payment methods are accepted for W25Q128JVPJQ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q128JVPJQ transactions.
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4.How is shipping managed for W25Q128JVPJQ?
W25Q128JVPJQ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q128JVPJQ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q128JVPJQ?
For technical support, including W25Q128JVPJQ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q128JVPJQ requirements.
6.How does Aetrix verify that W25Q128JVPJQ is sourced from the original manufacturer or authorized distributors?
All W25Q128JVPJQ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q128JVPJQ meets industry standards.
7.What is the process for return or replacement of W25Q128JVPJQ?
All W25Q128JVPJQ units undergo pre-shipment inspection (PSI). If there is an issue with W25Q128JVPJQ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q128JVPJQ part is unused and in its original packaging.
Return procedure for W25Q128JVPJQ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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