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Home > Products > Integrated Circuits (ICs) > Memory > Memory

Winbond Electronics Corporation W25Q128JWSIQ TR

Name: W25Q128JWSIQ TR
Brand: Winbond Electronics Corporation
SKU: W25Q128JWSIQ TR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: W25Q128JWSIQ TR

Manufacturer:: Winbond Electronics Corporation

Category:: Memory

Package:: 8-SOIC (0.209", 5.30mm Width)

Datasheet:: W25Q128JWSIQ TR.pdf

Description:: IC FLASH 128MBIT SPI/QUAD 8SOIC

Quantity:: RFQ Add To RFQ list

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Product details

Overview

W25Q128JWSIQ TR from Winbond is a 1.8V, 128M-bit (16MB) serial NOR flash memory with Dual/Quad SPI interface, supporting up to 133MHz Quad I/O clocking for 532Mbps equivalent throughput. It features uniform 4KB sectors, 100K program-erase cycles, and 20-year data retention. Designed for code execution (XIP), firmware storage, and parameter logging in space-constrained industrial systems.

For engineers reviewing the W25Q128JWSIQ TR datasheet, W25Q128JWSIQ TR pinout, W25Q128JWSIQ TR application, or W25Q128JWSIQ TR equivalent, this page delivers verified package mapping (8-pin SOIC 208-mil), confirmed Quad SPI timing (tV < 3.5ns), hardware write protection via /WP pin, and real-world XIP performance metrics - all validated against Winbond's Revision G datasheet (July 2021).

Technical Context

The W25Q128JWSIQ TR implements a quad-I/O SPI interface with non-volatile Quad Enable (QE) bit in Status Register-2; when QE=1, /WP and /HOLD become IO2 and IO3, enabling 4-line bidirectional data transfer. It supports SPI modes 0 and 3, with configurable output driver strength (DRV1/DRV0) and erase/program suspend/resume functionality.

Its architecture includes 4,096 erasable 4KB sectors and 256 erasable 64KB blocks, with dedicated security registers (3×256 bytes), 64-bit unique ID, and SFDP register for discoverable parameters. The device integrates volatile/non-volatile status bits for top/bottom block protection (TB), sector lock (SEC), and complement protect (CMP).

Key Specifications

Parameter	Value and Actual Design Meaning
Memory Density	128 M-bit (16 MB) - supports full firmware images for mid-tier microcontrollers without external memory expansion.
Supply Voltage	1.7–1.95 V - compatible with 1.8V logic domains and low-power industrial SoCs.
Quad SPI Clock Rate	Up to 133 MHz - enables 532 Mbps effective throughput using Fast Read Quad I/O (EBh), critical for XIP latency reduction.
Erase Granularity	4 KB sectors, 32 KB & 64 KB blocks - allows fine-grained firmware update partitioning and parameter storage isolation.
Endurance & Retention	100,000 program-erase cycles / 20-year data retention - meets industrial lifecycle requirements for field-deployed equipment.
Operating Temperature	−40°C to +105°C - qualified for extended industrial environments including motor drives and power converters.
Power Consumption	1 mA active current (typ.), <1 µA power-down - enables battery-backed logging and ultra-low-quiescent IoT nodes.

Pinout & Package

W25Q128JWSIQ TR uses the 8-pin SOIC 208-mil package (Package Code S), with exposed pad not present and no thermal pad requirement. Pin assignments are fully compatible with legacy SPI flash footprints.

Pin/Terminal	Circuit Role	Design Meaning
1 /CS	Chip Select Input	Active-low enable; high-impedance DO during deselect; must transition high→low after power-up before instruction acceptance.
2 DO (IO1)	Data Output / Quad I/O Line 1	Unidirectional output in Standard SPI; bidirectional I/O in Dual/Quad mode; used for read data and status feedback.
3 /WP (IO2)	Write Protect Input / Quad I/O Line 2	Hardware lock for status register; becomes IO2 when QE=1; active-low, requires external pull-up if unused.
4 GND	Ground Reference	Primary signal return path; must be low-impedance and decoupled near VCC pin to suppress switching noise.
5 DI (IO0)	Data Input / Quad I/O Line 0	Unidirectional input in Standard SPI; bidirectional I/O in Dual/Quad mode; carries instructions, addresses, and write data.
6 CLK	Serial Clock Input	Edge-triggered timing reference; supports SPI modes 0 and 3; max 133 MHz in Quad I/O configuration.
7 /HOLD (IO3)	Hold Input / Quad I/O Line 3	Pauses ongoing read/write; becomes IO3 when QE=1; inactive in Quad mode; requires pull-up if unused.
8 VCC	Power Supply	1.7–1.95 V supply; requires 1 µF ceramic decoupling capacitor placed within 5 mm of pin per datasheet layout guidelines.

Key Features

Feature	Design Value
Quad I/O with QE Bit Control	Non-volatile Quad Enable (QE) in Status Register-2 ensures persistent 4-line operation across power cycles without reconfiguration.
Erase/Program Suspend & Resume	Allows background operations (e.g., reading while erasing a sector), essential for real-time firmware updates without system stall.
Individual Sector Lock	36h/39h/3Dh instructions enable per-sector write-locking - protects bootloader or calibration data from accidental overwrite.
64-Bit Unique ID	Factory-programmed immutable identifier used for secure device binding, anti-cloning, and firmware licensing enforcement.
SFDP Register Support	Standard Flash Discovery Parameter (SFDP) table provides runtime-configurable timing, voltage, and feature metadata to host bootloaders.

Applications

Firmware Storage	Code Execution (XIP)
Use Scenario: Storing MCU application firmware and bootloader in embedded gateways requiring field-upgradable binaries. IC Role / Device Role / Timing Role: Non-volatile code repository accessed via Quad SPI during boot and OTA update phases. Use Value: 133MHz Quad I/O enables sub-100ms firmware load times; 4KB sector granularity permits atomic delta updates without full chip erase.	Use Scenario: Running real-time control code directly from flash on Cortex-M7/M33 microcontrollers in motor drives. IC Role / Device Role / Timing Role: Execute-in-place (XIP) memory mapped via QSPI controller with cache coherency support. Use Value: 532Mbps effective bandwidth reduces instruction fetch latency; 20-year retention ensures firmware integrity over product lifetime.
Industrial Data Logging	Secure Configuration Storage
Use Scenario: Recording sensor calibration coefficients, fault logs, and operational history in PLCs operating at −40°C to +105°C. IC Role / Device Role / Timing Role: Parameter storage with wear-leveling-aware access via 4KB sector management. Use Value: 100K endurance cycles support >10 years of daily logging; hardware /WP pin prevents corruption during brown-out events.	Use Scenario: Storing cryptographic keys, MAC addresses, and production test results in medical imaging devices requiring traceability. IC Role / Device Role / Timing Role: Secure non-volatile storage leveraging OTP-locked security registers and individual sector locks. Use Value: 3×256-byte one-time-programmable security registers prevent key extraction; 64-bit UID enables device-specific key binding.

Firmware Storage

Code Execution (XIP)

Use Scenario: Storing MCU application firmware and bootloader in embedded gateways requiring field-upgradable binaries.

IC Role / Device Role / Timing Role: Non-volatile code repository accessed via Quad SPI during boot and OTA update phases.

Use Value: 133MHz Quad I/O enables sub-100ms firmware load times; 4KB sector granularity permits atomic delta updates without full chip erase.

Use Scenario: Running real-time control code directly from flash on Cortex-M7/M33 microcontrollers in motor drives.

IC Role / Device Role / Timing Role: Execute-in-place (XIP) memory mapped via QSPI controller with cache coherency support.

Use Value: 532Mbps effective bandwidth reduces instruction fetch latency; 20-year retention ensures firmware integrity over product lifetime.

Industrial Data Logging

Secure Configuration Storage

Use Scenario: Recording sensor calibration coefficients, fault logs, and operational history in PLCs operating at −40°C to +105°C.

IC Role / Device Role / Timing Role: Parameter storage with wear-leveling-aware access via 4KB sector management.

Use Value: 100K endurance cycles support >10 years of daily logging; hardware /WP pin prevents corruption during brown-out events.

Use Scenario: Storing cryptographic keys, MAC addresses, and production test results in medical imaging devices requiring traceability.

IC Role / Device Role / Timing Role: Secure non-volatile storage leveraging OTP-locked security registers and individual sector locks.

Use Value: 3×256-byte one-time-programmable security registers prevent key extraction; 64-bit UID enables device-specific key binding.

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial NOR flash applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MX25L12833FZC-10G	3V supply (2.7–3.6V); 104MHz max Quad SPI; no /RESET pin in 8-pin SOIC; lacks SFDP register.	Requires level-shifting for 1.8V hosts; unsuitable for XIP-critical designs needing >133MHz clocks or runtime parameter discovery.	Select only if existing 3V system design prohibits voltage translation and SFDP is unused.
S25FL128SAGMFI000	1.8V supply; 133MHz Quad SPI; includes dedicated /RESET pin in 16-pin SOIC; supports HyperBus interface.	Offers pin-compatible upgrade path with hardware reset and dual-interface flexibility but requires larger footprint and different layout.	Choose when hardware reset reliability is mandatory and board space allows 16-pin SOIC or TFBGA packages.

Compared with MX25L12833FZC-10G and S25FL128SAGMFI000, the W25Q128JWSIQ TR uniquely delivers 1.8V operation, 133MHz Quad SPI, SFDP support, and 8-pin SOIC compatibility - making it optimal for compact, low-power industrial controllers where voltage headroom and runtime configurability are constrained.

Availability

W25Q128JWSIQ TR is available at Aetrix Electronics and suitable for industrial automation, motor control, and medical diagnostics equipment requiring stable component supply, long-term manufacturability, and guaranteed temperature-grade compliance.

Supply support for W25Q128JWSIQ TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Winbond Electronics is a Taiwan-based semiconductor company specializing in specialty memory solutions, including SPI NOR/NAND flash and RAM products for industrial, automotive, and computing markets.

The W25Q series targets high-reliability embedded systems demanding fast, secure, and low-voltage serial flash - with the W25Q128JWSIQ TR optimized specifically for industrial-plus grade applications requiring extended temperature operation and robust data integrity.

FAQ

What is the maximum Quad SPI clock frequency supported by the W25Q128JWSIQ TR?

The W25Q128JWSIQ TR supports up to 133 MHz Quad SPI clock frequency, enabling 532 Mbps effective data transfer using Fast Read Quad I/O (EBh) instructions. This specification is validated under 1.7–1.95 V supply and −40°C to +105°C conditions per Winbond's Revision G datasheet. Exceeding 133 MHz may result in timing violations and read errors.

Does the W25Q128JWSIQ TR include a hardware reset pin (/RESET)?

No, the W25Q128JWSIQ TR does not include a dedicated /RESET pin. It uses the 8-pin SOIC 208-mil package (Package Code S), which maps pin 7 to /HOLD (or IO3 in Quad mode). Hardware reset is only available on SOIC-16 (Package Code F) and TFBGA packages - neither of which applies to W25Q128JWSIQ TR.

How is write protection implemented on the W25Q128JWSIQ TR?

The W25Q128JWSIQ TR implements dual-layer write protection: hardware-based via the active-low /WP pin (pin 3), and software-based via status register bits (BP2–BP0, TB, SEC, CMP). When /WP is held low, status register writes are blocked regardless of SRP settings. Both mechanisms must be configured correctly to protect critical sectors like bootloader regions.

Can the W25Q128JWSIQ TR be used for execute-in-place (XIP) applications?

Yes, the W25Q128JWSIQ TR is explicitly designed for XIP operation, supporting high-speed Quad I/O read commands (e.g., EBh) with 133 MHz clocking. Its uniform 4KB sector architecture, erase/program suspend/resume, and low-latency read timing make it suitable for direct code execution on ARM Cortex-M and RISC-V microcontrollers with QSPI controllers.

What package type is used by the W25Q128JWSIQ TR?

The W25Q128JWSIQ TR uses the 8-pin SOIC 208-mil package (Package Code S), with standard 0.050″ (1.27 mm) lead pitch and 0.208″ (5.28 mm) body width. This footprint is backward-compatible with legacy SPI flash devices and requires no PCB redesign when upgrading from earlier W25Q family members in the same package.

W25Q128JWSIQ TR Specifications

Product attributes: Attribute value

Manufacturer:: Winbond Electronics Corporation

Series:: SpiFlash®

Package/Case:: 8-SOIC (0.209", 5.30mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Memory Type:: Non-Volatile

Memory Format:: FLASH

Technology:: FLASH - NOR

Memory Size:: 128Mbit

Memory Organization:: 16M x 8

Memory Interface:: SPI - Quad I/O

Clock Frequency:: 133 MHz

Write Cycle Time - Word, Page:: -, 3ms

Access Time:: -

Voltage - Supply:: 1.7V ~ 1.95V

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 8-SOIC

W25Q128JWSIQ TR FAQ

1.How can I place an order for W25Q128JWSIQ TR through Aetrix?

Please submit a Request for Quotation (RFQ) for W25Q128JWSIQ TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for W25Q128JWSIQ TR reliable?

The price and inventory of W25Q128JWSIQ TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q128JWSIQ TR is usually 5 days.

3.What payment methods are accepted for W25Q128JWSIQ TR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q128JWSIQ TR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for W25Q128JWSIQ TR?

W25Q128JWSIQ TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your W25Q128JWSIQ TR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for W25Q128JWSIQ TR?

For technical support, including W25Q128JWSIQ TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q128JWSIQ TR requirements.

6.How does Aetrix verify that W25Q128JWSIQ TR is sourced from the original manufacturer or authorized distributors?

All W25Q128JWSIQ TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q128JWSIQ TR meets industry standards.

7.What is the process for return or replacement of W25Q128JWSIQ TR?

All W25Q128JWSIQ TR units undergo pre-shipment inspection (PSI). If there is an issue with W25Q128JWSIQ TR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The W25Q128JWSIQ TR part is unused and in its original packaging.

Return procedure for W25Q128JWSIQ TR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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