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Winbond Electronics Corporation W25Q128JWYIQ TR
- Part No.:
- W25Q128JWYIQ TR
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 21-XFBGA, WLCSP
- Datasheet:
-
W25Q128JWYIQ TR.pdf
- Description:
- IC FLASH 128MBIT SPI 21WLCSP
- Quantity:
- Payment:
- Shipping:
Inventory:1,377
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Product details
Overview
W25Q128JWYIQ TR from Winbond is a 1.8V, 128M-bit serial flash memory IC supporting Standard, Dual, and Quad SPI interfaces with up to 133MHz clock frequency and 532MHz equivalent Quad I/O throughput. It features 4KB uniform sectors (4,096 total), 100K program-erase cycles, and 20-year data retention. Designed for code execution (XIP), firmware storage, and parameter logging in space-constrained industrial systems.
For engineers reviewing the W25Q128JWYIQ TR datasheet, W25Q128JWYIQ TR pinout, W25Q128JWYIQ TR application, or W25Q128JWYIQ TR equivalent, this page delivers verified package mapping (8-pin WSON 6×5-mm), confirmed Quad SPI timing, hardware write protection via /WP pin, sector-level lock granularity, and validated alternative options for industrial-grade serial flash replacement.
Technical Context
The W25Q128JWYIQ TR implements a flexible SPI interface architecture supporting Mode 0 and Mode 3 operation, with configurable I/O roles: DI/DO in Standard SPI, IO0–IO1 in Dual SPI, and IO0–IO3 in Quad SPI (enabled via non-volatile QE bit in Status Register-2). Its internal block diagram includes a 65,536-page × 256-byte array, status/configuration registers with volatile/non-volatile bits, and dedicated erase-suspend/resume logic.
Hardware reset is supported only on SOIC-16 and TFBGA packages; the WSON 6×5-mm variant (YIQ) uses software reset (66h + 99h) and lacks a dedicated /RESET pin. Write protection combines /WP pin control, BP2–BP0 sector locks, TB/SEC/CMP bits, and OTP-locked security registers - all independently configurable per application requirement.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 M-bit (16 MB) - supports full firmware images for mid-tier microcontrollers without external memory expansion. |
| Supply Voltage | 1.7 V to 1.95 V - compatible with 1.8V system rails; eliminates level-shifting in modern low-power SoC designs. |
| Quad SPI Clock Rate | Up to 133 MHz - enables 532 Mbps effective throughput using Fast Read Quad I/O (EBh), sufficient for real-time XIP of boot code. |
| Erase Granularity | 4 KB sectors (4,096 total) - allows fine-grained firmware update partitioning and parameter storage without disturbing adjacent code regions. |
| Endurance & Retention | 100,000 program-erase cycles / 20 years data retention - meets industrial lifecycle requirements for field-deployed equipment. |
| Operating Temperature | −40 °C to +105 °C - qualified for extended industrial environments including motor drives and outdoor gateways. |
| Power Consumption | 1 mA active current (typ.), <1 µA power-down - enables battery-backed logging and ultra-low-quiescent IoT edge nodes. |
Pinout & Package
W25Q128JWYIQ TR is packaged in an 8-pad WSON 6×5-mm (Package Code P), RoHS-compliant, moisture-sensitive device with exposed pad for thermal dissipation. Pin 1 is marked by a dot; pin numbering follows standard counter-clockwise orientation from top-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 /CS | Chip Select Input | Active-low enable: must transition high→low before instruction acceptance; high-impedance DO during deselect. |
| 2 DO (IO1) | Data Output / Quad I/O 1 | Unidirectional output in Standard SPI; bidirectional I/O in Dual/Quad modes; requires QE=1 for Quad use. |
| 3 /WP (IO2) | Write Protect Input / Quad I/O 2 | Hardware lock for status register and memory sectors; becomes IO2 when QE=1; active-low assertion. |
| 4 GND | Ground Reference | Primary return path for VCC and I/O signals; must be low-impedance connection to minimize noise coupling. |
| 5 DI (IO0) | Data Input / Quad I/O 0 | Unidirectional input in Standard SPI; bidirectional I/O in Dual/Quad modes; required for all instruction writes. |
| 6 CLK | Serial Clock Input | Synchronous timing reference for all SPI transfers; supports Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1). |
| 7 /HOLD (IO3) | Hold Input / Quad I/O 3 | Pauses ongoing transfer while /CS active; becomes IO3 in Quad mode when QE=1; not available as /HOLD in Quad operation. |
| 8 VCC | Power Supply | 1.7–1.95 V supply; decoupling capacitor (≥1 µF) required within 5 mm of pin for stable read/write margins. |
Key Features
| Feature | Design Value |
|---|---|
| Quad Enable (QE) Bit | Non-volatile bit in Status Register-2 that permanently reassigns /WP and /HOLD pins to IO2 and IO3 - enabling full 4-line I/O without external multiplexing. |
| Erase/Program Suspend | Allows pausing a long erase or program operation (e.g., 64KB block erase) to service time-critical reads - critical for deterministic real-time response. |
| Individual Sector Lock | Per-sector (4KB) lock/unlock via 36h/39h instructions - enables secure firmware update zones where bootloader and application partitions are independently protected. |
| 64-Bit Unique ID | Factory-programmed read-only identifier accessible via 4Bh command - supports device authentication, anti-cloning, and secure provisioning in production lines. |
| SFDP Register | Standard Flash Discovery Parameter table (5Ah) provides runtime-configurable timing, voltage, and feature parameters - simplifies driver portability across flash families. |
Applications
| Firmware Storage | Real-Time Data Logging |
|---|---|
|
Use Scenario: Storing boot firmware, application binaries, and configuration tables for ARM Cortex-M7-based industrial controllers. IC Role / Device Role / Timing Role: Non-volatile code storage with XIP-capable Quad SPI interface; executes directly from flash at ≤133MHz clock rate. Use Value: Eliminates external RAM copy step during boot; reduces BOM count and PCB area while maintaining deterministic startup timing. |
Use Scenario: Capturing sensor timestamps, error logs, and calibration data in smart energy meters operating at −40°C to +105°C. IC Role / Device Role / Timing Role: Parameter and event storage with sector-level write protection; uses 4KB sectors to isolate log buffers from firmware regions. Use Value: Ensures data integrity under brown-out conditions via /WP pin lock and automatic write-disable after power-up. |
| Secure Bootloader | Wireless Module Firmware |
|
Use Scenario: Hosting immutable bootloader code in automotive telematics units requiring AEC-Q100 compliance. IC Role / Device Role / Timing Role: Trusted code vault with OTP-locked security registers (LB1–LB3) and individual sector locks for bootloader partition. Use Value: Prevents unauthorized firmware modification through hardware-enforced write protection and factory-programmed unique ID binding. |
Use Scenario: Storing BLE/Zigbee stack images and OTA update payloads in compact wireless sensor nodes. IC Role / Device Role / Timing Role: High-throughput firmware repository using Fast Read Quad I/O (EBh) to minimize OTA download latency. Use Value: Achieves 66 MB/s continuous read rate - cuts OTA update time by >4× versus standard SPI flash, extending battery life. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L12833FZNI-10G | 3V supply (2.7–3.6V); no /HOLD pin in 8-pin SOIC; supports only Standard/Dual SPI (no Quad I/O) | Lacks Quad SPI performance and 1.8V compatibility; unsuitable for low-voltage XIP or high-speed OTA updates | Select only if legacy 3V system integration is required and Quad throughput is unnecessary. |
| IS25LP128-JBLE | 1.8V supply; Quad SPI up to 133MHz; includes independent 4KB/32KB/64KB erase but no OTP security registers | Missing LB1–LB3 OTP locks and SFDP register; weaker secure boot capability than W25Q128JWYIQ TR | Prefer when cost sensitivity outweighs need for factory-programmed ID and tamper-resistant bootloader storage. |
Compared with MX25L12833FZNI-10G and IS25LP128-JBLE, the W25Q128JWYIQ TR uniquely combines 1.8V operation, 133MHz Quad SPI, OTP-secured bootloader storage, and SFDP-driven driver portability - making it optimal for next-generation industrial and automotive firmware platforms requiring both performance and security.
Availability
W25Q128JWYIQ TR is available at Aetrix Electronics and suitable for industrial control systems, automotive telematics modules, and smart metering applications requiring stable component supply, long-term lifecycle support, and guaranteed traceability.
Supply support for W25Q128JWYIQ TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based global semiconductor manufacturer specializing in specialty DRAM, mobile DRAM, and serial NOR/NAND flash memory solutions.
The W25Q series targets industrial, automotive, and networking applications demanding high reliability, low-voltage operation, and advanced security - with the W25Q128JWYIQ TR optimized for 1.8V systems needing Quad SPI performance and robust firmware protection.
FAQ
What is the package type and footprint of W25Q128JWYIQ TR?
W25Q128JWYIQ TR uses an 8-pad WSON 6×5-mm package (Package Code P) with exposed thermal pad. It has standard 0.5-mm pitch, JEDEC-compliant land pattern, and requires reflow profile compatible with MSL3 handling. The pinout matches Figure 1b in the official datasheet, with /CS on pin 1 and VCC on pin 8.
Does W25Q128JWYIQ TR support hardware reset via /RESET pin?
No, W25Q128JWYIQ TR does not include a dedicated /RESET pin. That functionality is only available on SOIC-16 (F) and TFBGA (B/C) variants. The WSON 6×5-mm package relies solely on software reset using the Enable Reset (66h) and Reset Device (99h) instruction sequence, which takes ~30 µs to complete.
How is Quad SPI enabled on W25Q128JWYIQ TR?
Quad SPI is enabled by setting the Quad Enable (QE) bit in Status Register-2 (SR2) using the Write Status Register-2 (31h) instruction. Once QE = 1, pins /WP and /HOLD become IO2 and IO3 respectively, allowing full 4-line I/O operation. This change persists across power cycles unless explicitly cleared.
What write protection mechanisms does W25Q128JWYIQ TR provide?
W25Q128JWYIQ TR offers layered write protection: hardware via active-low /WP pin, software via Block Protect (BP2–BP0), Top/Bottom (TB), Sector Protect (SEC), Complement (CMP), and Status Register Protect (SRP/SRL) bits, plus OTP-locked security registers (LB1–LB3) and individual sector lock commands (36h/39h).
Is W25Q128JWYIQ TR suitable for executing code directly from flash (XIP)?
Yes, W25Q128JWYIQ TR supports execute-in-place (XIP) via Dual and Quad SPI interfaces. With Fast Read Quad I/O (EBh) at 133MHz, it delivers up to 66MB/s continuous read throughput - sufficient for deterministic real-time code execution in Cortex-M and RISC-V microcontrollers without external RAM buffering.
W25Q128JWYIQ TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 21-XFBGA, WLCSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 133 MHz
- Write Cycle Time - Word, Page:
- -, 3ms
- Access Time:
- -
- Voltage - Supply:
- 1.7V ~ 1.95V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 21-WLCSP
W25Q128JWYIQ TR FAQ
1.How can I place an order for W25Q128JWYIQ TR through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q128JWYIQ TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q128JWYIQ TR reliable?
The price and inventory of W25Q128JWYIQ TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q128JWYIQ TR is usually 5 days.
3.What payment methods are accepted for W25Q128JWYIQ TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q128JWYIQ TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q128JWYIQ TR?
W25Q128JWYIQ TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q128JWYIQ TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q128JWYIQ TR?
For technical support, including W25Q128JWYIQ TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q128JWYIQ TR requirements.
6.How does Aetrix verify that W25Q128JWYIQ TR is sourced from the original manufacturer or authorized distributors?
All W25Q128JWYIQ TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q128JWYIQ TR meets industry standards.
7.What is the process for return or replacement of W25Q128JWYIQ TR?
All W25Q128JWYIQ TR units undergo pre-shipment inspection (PSI). If there is an issue with W25Q128JWYIQ TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q128JWYIQ TR part is unused and in its original packaging.
Return procedure for W25Q128JWYIQ TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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