Winbond Electronics Corporation W25Q20CLSNIG TR
- Part No.:
- W25Q20CLSNIG TR
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
W25Q20CLSNIG TR.pdf
- Description:
- IC FLASH 2MBIT SPI/QUAD 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,842
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
W25Q20CLSNIG TR from Winbond is a 2 M-bit (256 KB) serial NOR flash memory IC supporting Standard, Dual, and Quad SPI interfaces with 4 KB uniform sectors, 104 MHz max clock, and XIP-capable continuous read mode - deployed in embedded boot code storage, firmware update partitions, and IoT sensor node configuration retention.
For engineers reviewing the W25Q20CLSNIG TR datasheet, W25Q20CLSNIG TR pinout, W25Q20CLSNIG TR application, or W25Q20CLSNIG TR equivalent, this page delivers verified package mapping (SOIC-8 SN), confirmed Quad SPI timing (416 Mbps effective), JEDEC ID validation (EF4013), and hardware/software write protection architecture - all critical for secure, low-power, space-constrained MCU designs.
Technical Context
The W25Q20CLSNIG TR implements a SPI-compatible command set with three operational modes: Standard (DI/DO), Dual I/O (IO0/IO1), and Quad I/O (IO0–IO3), where Quad mode requires non-volatile QE bit (SR2[1]) to be set. Its internal architecture includes a 1,024-page × 256-byte array, 64 × 4 KB sectors, and dedicated status registers (SR1/SR2) controlling BP2–BP0, TB, SEC, CMP, and SUS bits.
It supports full erase granularity (4 KB sector / 32 KB block / 64 KB block / chip), program suspend/resume, and auto-write-disable after erase/program cycles. Power management includes 1 µA typical power-down current, 2.3–3.6 V single-supply operation, and -40°C to +85°C industrial temperature range - enabling use in battery-powered edge nodes and automotive body control modules.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 2 M-bit (256 KB) organized as 1,024 pages × 256 bytes - enables fine-grained firmware partitioning and OTA update staging. |
| Interface Speed | 104 MHz SPI clock; 208 Mbps (Dual I/O); 416 Mbps (Quad I/O) - exceeds parallel Flash bandwidth while using only 4–6 pins. |
| Erase Granularity | Uniform 4 KB sectors, plus 32 KB and 64 KB blocks - allows selective parameter updates without disturbing adjacent boot code. |
| Write Endurance | 100,000 program/erase cycles per sector - supports frequent field firmware upgrades over 10+ year product life. |
| Data Retention | 20 years at +85°C - ensures configuration and calibration data integrity in industrial gateways and medical devices. |
| Supply Voltage | 2.3 V to 3.6 V - compatible with 3.3 V logic families and brown-out tolerant in wide-input DC-DC systems. |
| Power Consumption | 1 mA active current; 1 µA typical power-down - extends battery life in wireless sensor nodes during sleep intervals. |
Pinout & Package
W25Q20CLSNIG TR uses an 8-pin SOIC-150-mil (package code SN) with gull-wing leads, 1.27 mm pitch, and RoHS-compliant matte tin plating - suitable for reflow soldering and automated optical inspection in high-volume SMT lines.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 /CS | Chip Select Input | Active-low enable; must transition high→low after power-up before first instruction - critical for multi-device SPI bus arbitration. |
| 2 DO (IO1) | Data Output / Bidirectional I/O1 | Unidirectional output in Standard SPI; bidirectional in Dual/Quad modes - used for Fast Read Dual Output (3Bh) and Quad I/O instructions. |
| 3 /WP (IO2) | Write Protect Input / Bidirectional I/O2 | Hardware lock for Status Register when QE=0; becomes IO2 in Quad mode - requires external pull-up if unused in Quad config. |
| 4 GND | Ground Reference | Primary return path for VCC and I/O signals - must be low-impedance and decoupled within 5 mm of VCC pin. |
| 5 DI (IO0) | Data Input / Bidirectional I/O0 | Unidirectional input in Standard SPI; bidirectional in Dual/Quad - carries instructions, addresses, and data on rising CLK edge. |
| 6 CLK | Serial Clock Input | Edge-triggered timing reference; supports SPI Modes 0 and 3 - clock polarity/idle state must match host controller configuration. |
| 7 /HOLD (IO3) | Hold Input / Bidirectional I/O3 | Pauses ongoing SPI transfer when low (Standard/Dual only); becomes IO3 in Quad mode - enables bus sharing with other peripherals. |
| 8 VCC | Power Supply | 2.3–3.6 V supply; requires 100 nF ceramic decoupling capacitor placed adjacent to pin - voltage must exceed VWI before /CS activation. |
Key Features
| Feature | Design Value |
|---|---|
| Quad SPI Enable (QE bit) | Non-volatile SR2[1] bit enables 4-line I/O for 416 Mbps throughput - eliminates need for external multiplexers in high-speed XIP designs. |
| Continuous Read Mode | As few as 8 clocks overhead to address memory - reduces instruction latency for real-time code execution directly from flash. |
| Hardware Write Protection | /WP pin + SRP0/SRP1 bits allow permanent or temporary lock of status register - prevents accidental firmware corruption during field updates. |
| Erase/Program Suspend | 75h/7Ah commands pause and resume operations - enables time-critical interrupt handling without data loss in safety-critical applications. |
| Unique 64-bit Serial ID | Read via 4Bh instruction - provides device-level traceability for secure boot key binding and counterfeit detection in certified systems. |
Applications
| Industrial PLC Firmware Storage | Smart Meter Boot Code Partition |
|---|---|
|
Use Scenario: Storing bootloader and application firmware in DIN-rail mounted programmable logic controllers operating continuously at 60°C ambient. IC Role / Device Role / Timing Role: Non-volatile code storage with XIP support and hardware write protection - serves as primary boot source for ARM Cortex-M7 microcontrollers. Use Value: 20-year data retention and 100K endurance ensure firmware integrity across 15+ year deployments without field replacement. |
Use Scenario: Holding metrology calibration tables and tariff logic in ANSI C12.22-compliant electricity meters with tamper-evident housing. IC Role / Device Role / Timing Role: Secure configuration storage with 64-bit unique ID and sector-level protection - isolates sensitive parameters from user-accessible firmware regions. Use Value: 4 KB sector granularity enables independent update of tariff schedules without erasing metering algorithms or cryptographic keys. |
| Wireless Sensor Node OTA Update Buffer | Automotive Body Control Module Parameter Table |
|
Use Scenario: Acting as dual-bank update buffer in BLE/Zigbee end-nodes powered by coin-cell batteries with 10-year target lifetime. IC Role / Device Role / Timing Role: Low-power (1 µA) storage for staged firmware images - supports atomic swap after CRC validation and power-fail-safe programming. Use Value: 1 mA active current and fast Quad Read (6Bh) minimize radio-on time during OTA downloads, extending battery life by >35%. |
Use Scenario: Storing seat position presets, mirror angles, and lighting profiles in Class-D LED headlamp control units meeting AEC-Q100 Grade 2. IC Role / Device Role / Timing Role: Automotive-grade parameter storage with -40°C to +85°C operation and JEDEC ID verification - retains user preferences across ignition cycles. Use Value: Hardware /WP pin + SRP0 locking prevents EEPROM-like corruption during load dump transients on 12 V vehicle power rails. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L2006EM1I-12G | 2 M-bit, 8-pin SOIC, 80 MHz max clock, no Quad I/O support - uses standard SPI only. | Lacks Quad SPI and continuous read mode - unsuitable for XIP or high-throughput OTA. | Select when cost sensitivity outweighs speed requirements and host lacks Quad SPI peripheral. |
| S25FL032P0XMFI001 | 32 M-bit density, 104 MHz, Quad SPI, but requires 2.7–3.6 V supply - no 2.3 V low-voltage support. | Higher density and same interface, but incompatible with sub-2.7 V battery systems. | Choose for future-proofing with larger firmware footprints, provided system VCC ≥ 2.7 V. |
Compared with MX25L2006EM1I-12G and S25FL032P0XMFI001, the W25Q20CLSNIG TR uniquely balances ultra-low-voltage operation (2.3 V), Quad SPI performance (416 Mbps), and 4 KB sector flexibility - making it optimal for compact, battery-aware, and XIP-capable embedded systems where pin count and power are constrained.
Availability
W25Q20CLSNIG TR is available at Aetrix Electronics and suitable for industrial automation firmware storage, smart meter boot code partitioning, and wireless sensor node OTA update buffering requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for W25Q20CLSNIG TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor company specializing in specialty DRAM, mobile DRAM, and serial flash memory solutions for consumer, industrial, and automotive markets.
The W25Q series was designed specifically for embedded systems needing high-speed, low-pin-count, secure, and reliable non-volatile storage - with emphasis on XIP capability, robust write protection, and extended temperature reliability.
FAQ
What is the exact memory organization of the W25Q20CLSNIG TR?
The W25Q20CLSNIG TR contains 2 M-bit (256 KB) of NOR flash memory organized into 1,024 programmable pages of 256 bytes each, 64 uniform 4 KB sectors, 8 × 32 KB blocks, and 4 × 64 KB blocks. This structure enables flexible firmware partitioning, where boot code occupies protected top sectors and application data resides in lower-addressed, frequently updated sectors - all managed via standard SPI commands without external address latches.
Does the W25Q20CLSNIG TR support execute-in-place (XIP) operation?
Yes, the W25Q20CLSNIG TR supports true XIP through its Continuous Read Mode, which requires only 8 clock cycles of instruction overhead to address memory - enabling ARM Cortex-M or RISC-V cores to fetch and execute instructions directly from flash without copying to RAM. This capability is fully enabled using Fast Read Quad I/O (EBh) with QE bit set, delivering up to 416 Mbps effective bandwidth for deterministic real-time code execution.
How is hardware write protection implemented on the W25Q20CLSNIG TR?
The W25Q20CLSNIG TR implements hardware write protection via the /WP pin in conjunction with Status Register Protect (SRP0/SRP1) bits. When /WP is held low and SRP0=1, writes to the status register - including block protect bits (BP2–BP0), Quad Enable (QE), and security locks - are disabled. This prevents accidental firmware corruption during power transients or software faults, and is factory-default inactive (SRP0=0), requiring explicit configuration for permanent protection.
What package type does the W25Q20CLSNIG TR use, and is it RoHS-compliant?
The W25Q20CLSNIG TR uses an 8-pin SOIC-150-mil package (package code SN) with gull-wing leads, 1.27 mm pitch, and matte tin surface finish. It is RoHS-compliant, halogen-free, and qualified for lead-free reflow soldering per J-STD-020D.3 - meeting IPC-A-610 Class 2 requirements for industrial electronics assembly and ensuring compatibility with standard SMT pick-and-place and reflow processes.
Can the W25Q20CLSNIG TR be used in automotive applications?
The W25Q20CLSNIG TR is rated for -40°C to +85°C industrial temperature operation and meets AEC-Q200 stress test requirements for passive components, but it is not officially AEC-Q100 qualified as an integrated circuit. For automotive body control modules or infotainment subsystems operating within this temperature range and requiring robustness against ESD and voltage transients, the W25Q20CLSNIG TR is widely deployed - however, mission-critical powertrain or ADAS applications require AEC-Q100 Grade 1 or 2 qualified alternatives.
W25Q20CLSNIG TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 2Mbit
- Memory Organization:
- 256K x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 800µs
- Access Time:
- 8 ns
- Voltage - Supply:
- 2.3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
W25Q20CLSNIG TR FAQ
1.How can I place an order for W25Q20CLSNIG TR through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q20CLSNIG TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q20CLSNIG TR reliable?
The price and inventory of W25Q20CLSNIG TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q20CLSNIG TR is usually 5 days.
3.What payment methods are accepted for W25Q20CLSNIG TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q20CLSNIG TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q20CLSNIG TR?
W25Q20CLSNIG TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q20CLSNIG TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q20CLSNIG TR?
For technical support, including W25Q20CLSNIG TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q20CLSNIG TR requirements.
6.How does Aetrix verify that W25Q20CLSNIG TR is sourced from the original manufacturer or authorized distributors?
All W25Q20CLSNIG TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q20CLSNIG TR meets industry standards.
7.What is the process for return or replacement of W25Q20CLSNIG TR?
All W25Q20CLSNIG TR units undergo pre-shipment inspection (PSI). If there is an issue with W25Q20CLSNIG TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q20CLSNIG TR part is unused and in its original packaging.
Return procedure for W25Q20CLSNIG TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
W25Q20CLSNIG TR Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

