Winbond Electronics Corporation W25Q80BVDAIG
- Part No.:
- W25Q80BVDAIG
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
W25Q80BVDAIG.pdf
- Description:
- IC FLASH 8MBIT SPI/QUAD 8DIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,524
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
W25Q80BVDAIG from Winbond is an 8 M-bit (1 MB) serial NOR flash memory IC supporting Standard, Dual, and Quad SPI interfaces with 104 MHz clock capability, 4 KB uniform sector architecture, and hardware/software write protection - used for code storage, XIP execution, and firmware parameter retention in microcontroller-based embedded systems.
For engineers reviewing the W25Q80BVDAIG datasheet, W25Q80BVDAIG pinout, W25Q80BVDAIG application, or W25Q80BVDAIG equivalent, key selection considerations include Quad SPI enable (QE bit), /WP and /HOLD dual-role behavior in Quad mode, 2.5–3.6 V supply compatibility, 4KB sector erase granularity, and JEDEC ID/Unique Serial Number support for secure boot and device authentication.
Technical Context
The W25Q80BVDAIG implements a SPI command-set compatible with Mode 0 and Mode 3 clock polarity, supports continuous read mode with ≤8-clock instruction overhead, and enables true execute-in-place (XIP) operation via Fast Read Quad I/O (EBh) at up to 416 MHz effective throughput. Its status register includes non-volatile Quad Enable (QE), Block Protect (BP2–BP0), and Security Register Lock (LB3–LB1) bits.
It features three independent 256-byte security registers with OTP lock capability, SFDP (Serial Flash Discoverable Parameters) register for runtime configuration discovery, and Erase/Program Suspend & Resume functionality - allowing background operations to be paused during high-priority CPU interrupts without data loss.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 8 M-bit (1,048,576 bytes), organized as 4,096 × 256-byte pages |
| SPI Clock Max | 104 MHz - enables 416 MHz effective Quad I/O transfer rate (EBh/E7h) |
| Erase Granularity | 4 KB sectors (256 total), 32 KB blocks (32 total), 64 KB blocks (16 total), full chip |
| Write Cycle Endurance | 100,000 program/erase cycles per sector - supports frequent firmware updates |
| Data Retention | 20 years at +85°C - suitable for industrial and automotive life-cycle requirements |
| Supply Voltage | 2.5 V to 3.6 V - compatible with 3.3 V logic domains and low-power MCU systems |
| Operating Temp | –40°C to +85°C - qualified for extended industrial temperature range |
Pinout & Package
W25Q80BVDAIG is packaged in an 8-pin PDIP 300-mil (package code DA), with pins arranged in dual in-line format for through-hole mounting and legacy board compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 /CS | Chip Select Input | Active-low enable; must transition high→low after power-up before first instruction |
| 2 DO (IO1) | Data Output / I/O1 | Unidirectional output in Standard SPI; bidirectional I/O in Dual/Quad SPI |
| 3 /WP (IO2) | Write Protect Input / I/O2 | Hardware write protect when QE=0; becomes IO2 in Quad SPI mode (QE=1) |
| 4 GND | Ground Reference | Signal and power return path; requires low-impedance connection to system ground plane |
| 5 DI (IO0) | Data Input / I/O0 | Unidirectional input in Standard SPI; bidirectional I/O in Dual/Quad SPI |
| 6 CLK | Serial Clock Input | Edge-triggered timing source; supports Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1) |
| 7 /HOLD (IO3) | Hold Input / I/O3 | Pauses active SPI transaction when low; becomes IO3 in Quad SPI mode (QE=1) |
| 8 VCC | Power Supply | 2.5–3.6 V main supply; decoupling capacitor required within 10 mm of pin |
Key Features
| Feature | Design Value |
|---|---|
| Quad SPI Enable (QE) | Non-volatile Status Register-2 bit enabling IO2 (/WP) and IO3 (/HOLD) for 4-line data transfer |
| Continuous Read Mode | ≤8-clock instruction overhead per 24-bit address access - enables deterministic XIP latency |
| Security Registers | Three 256-byte OTP-lockable registers for keys, certificates, or calibration data storage |
| SFDP Support | JEDEC JESD216-compliant register enabling runtime discovery of erase sizes, timing, and vendor parameters |
| Erase/Program Suspend | Allows pausing long erase/program operations to service interrupts - resumes from exact byte offset |
Applications
| Boot Code Storage | Firmware Over-the-Air (OTA) |
|---|---|
Use Scenario: Storing bootloader and primary application firmware for ARM Cortex-M or RISC-V MCUs requiring cold-start execution. IC Role / Device Role / Timing Role: Non-volatile code storage with XIP-capable Quad SPI interface enabling direct CPU fetch from flash. Use Value: Eliminates need for external RAM loading; reduces BOM cost and boot time by >30% vs. parallel flash. | Use Scenario: Secure storage of encrypted firmware images updated wirelessly in IoT edge nodes. IC Role / Device Role / Timing Role: Trusted firmware repository with 64-bit unique serial number and OTP-locked security registers. Use Value: Enables cryptographic signature verification and anti-rollback protection using immutable device identity. |
| Industrial HMI Configuration | Automotive Diagnostic Module |
Use Scenario: Retaining display layouts, language packs, and user preferences across power cycles in factory HMIs. IC Role / Device Role / Timing Role: Parameter storage with 4 KB sector granularity allowing atomic updates without erasing unrelated settings. Use Value: Prevents partial-write corruption during brownout; supports field-upgradable UI assets without full reflash. | Use Scenario: Storing UDS (Unified Diagnostic Services) diagnostic routines and vehicle-specific calibration tables in Tier-1 ECUs. IC Role / Device Role / Timing Role: AEC-Q100-qualified (via package variant) non-volatile memory for ASAM-compliant diagnostic firmware. Use Value: Meets ISO 14229-1 timing constraints for fast read access during ECU reset sequences. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L8006EM1I-12G | 8 M-bit, 104 MHz max clock, SOIC-8 only; lacks SFDP and security registers | No Unique ID or OTP security registers; limited for secure boot or device identity use cases | Prefer W25Q80BVDAIG where cryptographic binding or field-upgrade traceability is required |
| S25FL008KAGMFI011 | 8 M-bit, 80 MHz max clock; supports HyperBus but not Quad SPI; different pinout and command set | Requires HyperFlash controller; incompatible with standard SPI host without firmware adaptation | Choose W25Q80BVDAIG for drop-in SPI compatibility and higher throughput in existing Quad SPI designs |
Compared with MX25L8006EM1I-12G and S25FL008KAGMFI011, W25Q80BVDAIG delivers superior secure boot readiness via 64-bit UID and OTP security registers, higher Quad SPI bandwidth (416 MHz vs. 320 MHz effective), and broader host controller compatibility due to JEDEC-standard command set and SFDP support.
Availability
W25Q80BVDAIG is available at Aetrix Electronics and suitable for industrial HMIs, automotive diagnostic modules, and IoT OTA firmware updates requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant through-hole packaging.
Supply support for W25Q80BVDAIG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor company specializing in specialty memory solutions including NOR/NAND flash, SRAM, and mobile DRAM for industrial, automotive, and consumer applications.
The W25Q series targets high-performance embedded systems requiring reliable, low-power, and secure serial flash - optimized for XIP, firmware storage, and parameter retention in resource-constrained environments.
FAQ
What is the package type of W25Q80BVDAIG?
W25Q80BVDAIG uses an 8-pin PDIP 300-mil package (package code DA), designed for through-hole mounting and legacy PCB compatibility. It is distinct from SOIC, WSON, or USON variants and shares identical pinout and electrical behavior with other W25Q80BV family members in PDIP form.
Does W25Q80BVDAIG support Quad SPI mode out of the box?
No - W25Q80BVDAIG requires the Quad Enable (QE) bit in Status Register-2 to be set via Write Status Register (01h) instruction before Quad SPI operation is enabled. Until QE=1, /WP and /HOLD remain dedicated hardware control pins; setting QE reassigns them as IO2 and IO3.
What is the minimum erase unit size for W25Q80BVDAIG?
The minimum erase unit for W25Q80BVDAIG is a 4 KB sector. The device contains 256 uniform sectors, each erasable independently via Sector Erase (20h) instruction - enabling fine-grained firmware partitioning and safe over-the-air update schemes without disturbing adjacent data.
How does W25Q80BVDAIG handle power-up write protection?
W25Q80BVDAIG enforces automatic write disable after power-up: the Write Enable Latch (WEL) resets to 0, and all program/erase instructions are blocked for tPUW (typically 20 µs). Additionally, /CS must track VCC rise to prevent spurious commands - a pull-up resistor on /CS is recommended to ensure clean initialization.
Can W25Q80BVDAIG store cryptographic keys securely?
Yes - W25Q80BVDAIG includes three 256-byte security registers with One-Time-Programmable (OTP) lock bits (LB3–LB1). Once locked, these registers become read-only and immune to accidental overwrite, making them suitable for storing private keys, device certificates, or calibration secrets in production firmware.
W25Q80BVDAIG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 8Mbit
- Memory Organization:
- 1M x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
W25Q80BVDAIG FAQ
1.How can I place an order for W25Q80BVDAIG through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q80BVDAIG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q80BVDAIG reliable?
The price and inventory of W25Q80BVDAIG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q80BVDAIG is usually 5 days.
3.What payment methods are accepted for W25Q80BVDAIG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q80BVDAIG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q80BVDAIG?
W25Q80BVDAIG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q80BVDAIG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q80BVDAIG?
For technical support, including W25Q80BVDAIG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q80BVDAIG requirements.
6.How does Aetrix verify that W25Q80BVDAIG is sourced from the original manufacturer or authorized distributors?
All W25Q80BVDAIG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q80BVDAIG meets industry standards.
7.What is the process for return or replacement of W25Q80BVDAIG?
All W25Q80BVDAIG units undergo pre-shipment inspection (PSI). If there is an issue with W25Q80BVDAIG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q80BVDAIG part is unused and in its original packaging.
Return procedure for W25Q80BVDAIG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
W25Q80BVDAIG Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

