Winbond Electronics Corporation W25Q80BWSSIG
- Part No.:
- W25Q80BWSSIG
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
W25Q80BWSSIG.pdf
- Description:
- IC FLASH 8MBIT SPI/QUAD 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,742
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
W25Q80BWSSIG from Winbond is an 8 M-bit (1 MB) serial NOR flash memory IC designed for code storage and XIP execution in space-constrained embedded systems. It supports Standard, Dual, and Quad SPI interfaces with up to 80 MHz clock frequency, 4 KB uniform sector erase granularity, and operates from a single 1.65–1.95 V supply with 4 mA active and <1 µA power-down current. It is commonly used in microcontroller boot code storage and firmware update storage.
For engineers reviewing the W25Q80BWSSIG datasheet, W25Q80BWSSIG pinout, W25Q80BWSSIG application, or W25Q80BWSSIG equivalent, key selection criteria include Quad SPI enable (QE bit), hardware write protection via /WP and /HOLD pins, 4 KB sector flexibility, JEDEC ID compatibility, and support for continuous read mode with ≤8-clock address overhead.
Technical Context
The W25Q80BWSSIG implements a SPI command-set architecture supporting three operational modes: Standard (DI/DO), Dual (IO0/IO1), and Quad (IO0–IO3), with Quad mode requiring the non-volatile QE bit in Status Register-2 to be set. Its internal array is organized into 4,096 × 256-byte pages across 256 erasable 4 KB sectors and 16 erasable 64 KB blocks.
It features dual-level write protection: hardware-based via active-low /WP and /HOLD pins (disabled in Quad mode), and software-based via status register bits (BP2–BP0, TB, SEC, CMP, SRP0/SRP1). The device includes a 64-bit unique serial number, four 256-byte security registers with OTP locks, and erase/program suspend/resume capability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 8 M-bit (1,048,576 bytes), organized as 4,096 × 256-byte pages |
| Supply Voltage | 1.65 V to 1.95 V - enables low-power operation in battery-backed and portable designs |
| Max Clock Frequency | 80 MHz - supports 160 MB/s dual-I/O and 320 MB/s quad-I/O effective throughput |
| Erase Granularity | 4 KB sectors (256 total), 32 KB blocks (8 total), 64 KB blocks (16 total), full chip - enables fine-grained firmware partitioning |
| Data Retention | 20+ years - ensures long-term reliability for industrial and automotive firmware storage |
| Endurance | 100,000 program/erase cycles - suitable for field-updatable applications with frequent reprogramming |
| Operating Temp | –40°C to +85°C - qualified for industrial-grade embedded environments |
Pinout & Package
W25Q80BWSSIG is supplied in an 8-pin SOIC 208-mil package (package code SS), with lead-free, RoHS-compliant construction and surface-mount footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 /CS | Chip Select Input | Active-low enable signal; places DO/IO pins in high-impedance state when deasserted |
| 2 DO (IO1) | Data Output / I/O1 | Unidirectional output in Standard SPI; bidirectional I/O in Dual/Quad SPI |
| 3 /WP (IO2) | Write Protect Input / I/O2 | Hardware lock for status register; repurposed as IO2 in Quad SPI when QE=1 |
| 4 GND | Ground Reference | Primary return path for all I/O and core logic; requires low-impedance PCB connection |
| 5 DI (IO0) | Data Input / I/O0 | Unidirectional input in Standard SPI; bidirectional I/O in Dual/Quad SPI |
| 6 CLK | Serial Clock Input | Synchronizes all SPI transfers; supports Mode 0 and Mode 3 clock polarity/phasing |
| 7 /HOLD (IO3) | Hold Input / I/O3 | Pauses ongoing SPI transaction; repurposed as IO3 in Quad SPI when QE=1 |
| 8 VCC | Power Supply | Single 1.65–1.95 V supply; decoupling capacitor required per layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| Quad SPI Interface | Enables 320 MB/s effective read throughput via IO0–IO3 and QE-bit activation - accelerates boot time and XIP performance |
| Continuous Read Mode | Reduces instruction overhead to ≤8 clocks per 24-bit address - enables true execute-in-place (XIP) without external RAM buffering |
| Uniform 4 KB Sector Architecture | Allows independent erasure of firmware partitions (e.g., bootloader, app, config) without disturbing adjacent data |
| 64-bit Unique Serial Number | Provides hardware-rooted device identity for secure firmware binding and anti-cloning in certified systems |
| Volatile & Non-volatile Status Protection | SRP0/SRP1 bits lock status register configuration against accidental overwrite - critical for production reliability |
Applications
| Boot Code Storage | Firmware Update Storage |
|---|---|
Use Scenario: Storing primary bootloader and initial firmware image for ARM Cortex-M or RISC-V microcontrollers during cold start. IC Role / Device Role / Timing Role: Non-volatile code storage with XIP-capable Quad SPI interface enabling direct CPU execution without RAM load delay. Use Value: Reduces system boot time by >40% vs. standard SPI flash and eliminates need for external RAM pre-load buffers. | Use Scenario: Holding over-the-air (OTA) firmware updates in IoT edge nodes before validation and atomic swap. IC Role / Device Role / Timing Role: Field-updatable persistent storage with 4 KB sector granularity enabling safe dual-bank update schemes. Use Value: Enables atomic firmware rollback and reduces risk of bricking during partial writes or power loss. |
| Secure Configuration Storage | Industrial HMI Display Firmware |
Use Scenario: Storing encrypted calibration data, MAC addresses, and cryptographic keys in medical or industrial controllers. IC Role / Device Role / Timing Role: Tamper-resistant storage leveraging 4×256-byte OTP-locked security registers and 64-bit unique ID. Use Value: Prevents unauthorized key extraction and ensures device-specific credential binding without external secure element. | Use Scenario: Hosting GUI assets, font tables, and display controller firmware in factory HMIs with frequent UI revisions. IC Role / Device Role / Timing Role: High-reliability, temperature-stable flash with 20-year data retention and 100K-cycle endurance. Use Value: Eliminates field service visits for display firmware replacement and supports 10+ years of unattended operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial NOR flash applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX25L8006EM1I-12G | Same density (8 M-bit), 3 V supply (2.7–3.6 V), no Quad SPI support - only Standard/Dual SPI | Lacks QE-bit and IO2/IO3 functionality; unsuitable for XIP-critical or high-throughput boot paths | Select only if system uses 3 V rail and does not require >80 MB/s read bandwidth or Quad I/O pin multiplexing |
| S25FL008KAGMFI010 | 8 M-bit, 1.7–2.0 V supply, supports Quad SPI but requires different status register bit mapping (SR2[1] vs. W25Q80BW's SR2[1]) | Different QE bit location and command set timing; requires firmware driver modification for initialization | Choose only when migrating existing Cypress-based designs and validating full command compatibility, including suspend/resume behavior |
Compared with MX25L8006EM1I-12G and S25FL008KAGMFI010, the W25Q80BWSSIG delivers higher effective bandwidth via native Quad I/O, tighter voltage tolerance for ultra-low-power systems, and simpler status register control - making it optimal for new designs prioritizing boot speed, power efficiency, and firmware agility.
Availability
W25Q80BWSSIG is available at Aetrix Electronics and suitable for industrial control panels, medical diagnostic boot loaders, and automotive infotainment firmware storage requiring stable component supply across multi-year production cycles.
Supply support for W25Q80BWSSIG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor manufacturer specializing in specialty memory solutions, including SPI NOR flash, PSRAM, and TrustME secure memory products.
The W25Q series was designed specifically for embedded code storage and XIP execution in resource-constrained microcontroller systems, emphasizing low-voltage operation, high-speed Quad SPI, and robust data integrity features.
FAQ
What is the operating voltage range for the W25Q80BWSSIG?
The W25Q80BWSSIG operates from a single 1.65 V to 1.95 V supply. This narrow low-voltage range enables integration into battery-powered and energy-harvesting systems while maintaining full functionality, including Quad SPI mode and status register programming. Operation outside this range may result in undefined behavior or failure to execute commands such as Page Program or Sector Erase. The W25Q80BWSSIG includes built-in power-on reset circuitry that holds the device in reset until VCC exceeds the VWI threshold.
Does the W25Q80BWSSIG support execute-in-place (XIP) operation?
Yes, the W25Q80BWSSIG supports true XIP via its Continuous Read Mode, which reduces instruction overhead to as few as 8 clock cycles for addressing - enabling efficient sequential instruction fetch directly from flash. When configured for Quad SPI (QE bit set), the W25Q80BWSSIG achieves up to 320 MB/s effective read bandwidth, making it suitable for real-time XIP execution in Cortex-M4/M7 and RISC-V cores without intermediate RAM caching. The W25Q80BWSSIG also supports wrap modes (8/16/32/64-byte) to optimize burst access patterns.
How is hardware write protection implemented on the W25Q80BWSSIG?
The W25Q80BWSSIG implements hardware write protection using two dedicated pins: /WP (pin 3) and /HOLD (pin 7), both active-low. When /WP is driven low, writes to the status register are blocked - preventing accidental changes to block protection bits (BP2–BP0) or Quad Enable (QE). /HOLD pauses ongoing SPI transactions but does not affect write protection state. Both functions are disabled in Quad SPI mode, where /WP and /HOLD become IO2 and IO3. The W25Q80BWSSIG also supports software write protection via SRP0/SRP1 bits, which lock the entire status register until next power cycle.
What package type does the W25Q80BWSSIG use, and is it RoHS-compliant?
The W25Q80BWSSIG uses an 8-pin SOIC 208-mil package (package code SS), with gull-wing leads and Pb-free, RoHS-compliant finish. Its 208-mil body width (5.33 mm) provides mechanical stability and thermal dissipation advantages over narrower 150-mil variants, while remaining compatible with standard SOIC footprints and reflow profiles. The W25Q80BWSSIG's marking "W25Q80BW SSIG" appears on the top surface, and the device meets JEDEC J-STD-020 moisture sensitivity level 3 (MSL3) requirements.
Can the W25Q80BWSSIG be used in automotive applications?
The W25Q80BWSSIG is rated for –40°C to +85°C operation and meets industrial temperature requirements, but it is not AEC-Q100 qualified and lacks automotive-specific qualification documentation (e.g., HTOL, ESD, TCT). While functionally capable in under-hood or dashboard environments, Winbond does not guarantee automotive-grade reliability or lifetime performance for the W25Q80BWSSIG. For automotive applications, Winbond offers the AEC-Q100 qualified W25Q80DV variant; the W25Q80BWSSIG should be used only in non-safety-critical, non-automotive-certified systems unless fully validated per customer-specific automotive qualification protocols.
W25Q80BWSSIG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 8Mbit
- Memory Organization:
- 1M x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 80 MHz
- Write Cycle Time - Word, Page:
- 800µs
- Access Time:
- -
- Voltage - Supply:
- 1.65V ~ 1.95V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
W25Q80BWSSIG FAQ
1.How can I place an order for W25Q80BWSSIG through Aetrix?
Please submit a Request for Quotation (RFQ) for W25Q80BWSSIG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25Q80BWSSIG reliable?
The price and inventory of W25Q80BWSSIG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25Q80BWSSIG is usually 5 days.
3.What payment methods are accepted for W25Q80BWSSIG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25Q80BWSSIG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25Q80BWSSIG?
W25Q80BWSSIG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25Q80BWSSIG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25Q80BWSSIG?
For technical support, including W25Q80BWSSIG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25Q80BWSSIG requirements.
6.How does Aetrix verify that W25Q80BWSSIG is sourced from the original manufacturer or authorized distributors?
All W25Q80BWSSIG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25Q80BWSSIG meets industry standards.
7.What is the process for return or replacement of W25Q80BWSSIG?
All W25Q80BWSSIG units undergo pre-shipment inspection (PSI). If there is an issue with W25Q80BWSSIG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25Q80BWSSIG part is unused and in its original packaging.
Return procedure for W25Q80BWSSIG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
W25Q80BWSSIG Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
