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Winbond Electronics Corporation W25R128JVSIQ
- Part No.:
- W25R128JVSIQ
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
W25R128JVSIQ.pdf
- Description:
- IC FLASH 128MBIT SPI/QUAD 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:1,204
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Product details
Overview
W25R128JVSIQ from Winbond is a 128M-bit (16MB) Serial Flash memory IC supporting Dual/Quad SPI and Replay Protection Monotonic Counter (RPMC) security. It operates from 2.7V to 3.6V, delivers up to 133MHz clock rate (532MHz equivalent Quad I/O), features uniform 4KB sectors, 100,000+ program/erase cycles, and 20-year data retention. It serves as code storage for XIP (execute-in-place) and secure firmware boot in resource-constrained embedded systems.
For engineers reviewing the W25R128JVSIQ datasheet, W25R128JVSIQ pinout, W25R128JVSIQ application, or W25R128JVSIQ equivalent, key selection criteria include Quad SPI throughput, RPMC cryptographic integrity, individual block locking, 64-bit unique ID, and SOIC-8/WSON-8 package compatibility with industrial temperature range (–40°C to +85°C).
Technical Context
The W25R128JVSIQ implements a standard SPI interface extended to Dual and Quad I/O modes using shared bidirectional IO0–IO3 pins, with mode selection controlled via volatile/non-volatile QE bit in Status Register-1. Its internal architecture includes three 256-byte OTP-locked Security Registers and four 32-bit monotonic counters managed via HMAC-SHA-256 for replay-protected read/write operations.
RPMC functionality requires controller-initiated command sequences (e.g., 9Bh + 00h–03h) to write root keys, update HMAC keys, increment or request counters - all validated against hardware-enforced cryptographic state. Write protection is configurable via multiple overlapping mechanisms: status register bits (BP2–BP0, TB, SEC, CMP), WPS-selectable individual block locks (254 × 64KB blocks + 32 × 4KB sectors), and hardware /WP pin support.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 M-bit (16 MB) organized as 32,768 × 4KB sectors |
| Supply Voltage | 2.7 V to 3.6 V - enables direct integration with 3.3V logic and low-power microcontrollers |
| Max Clock Frequency | 133 MHz (Single SPI); 266 MHz equiv. (Dual I/O); 532 MHz equiv. (Quad I/O) - supports fast code shadowing and XIP |
| Program/Erase Endurance | 100,000 cycles minimum - ensures long-term reliability in firmware update-intensive applications |
| Data Retention | 20 years at +85°C - guarantees persistent storage integrity across industrial lifecycle requirements |
| Security Features | RPMC with HMAC-SHA-256, 64-bit unique ID, three 256-byte OTP-locked Security Registers - provides hardware-rooted anti-cloning and replay attack mitigation |
| Operating Temperature | –40°C to +85°C - qualified for industrial and automotive under-hood environments |
Pinout & Package
W25R128JVSIQ is supplied in an 8-pin SOIC 208-mil (Package Code S) package, with lead-free, RoHS-compliant construction and surface-mount compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| /CS | Chip Select Input | Active-low enable signal; places device in high-impedance state when deasserted, reducing standby current to ~1 µA |
| IO0 | Bidirectional Data I/O (Standard/Dual/Quad) | Serves as DI (input) in Standard SPI, DO (output) in Fast Read, and bidirectional I/O0 in Dual/Quad modes |
| IO1 | Bidirectional Data I/O (Dual/Quad) | Used with IO0 for Dual SPI; added with IO2/IO3 for Quad SPI - enables 4x bandwidth over Standard SPI |
| GND | Ground Reference | Primary return path for VCC and I/O signals; must be low-impedance to maintain signal integrity at 133 MHz |
| VCC | Power Supply | 2.7–3.6 V supply input; internal voltage regulator ensures stable core operation across full range |
| IO3 | Bidirectional Data I/O (Quad only) | Enables full Quad SPI operation (IO0–IO3); required for 532 MHz equivalent transfer rates and RPMC command execution |
| IO2 | Bidirectional Data I/O (Quad only) | Completes Quad I/O bus; necessary for EBh (Fast Read Quad I/O) and 9Bh-based RPMC instructions |
| CLK | Serial Clock Input | Edge-triggered timing reference; supports SPI Modes 0 and 3; rising edge for input, falling edge for output |
Key Features
| Feature | Design Value |
|---|---|
| Quad SPI with 532 MHz equivalent bandwidth | Enables real-time XIP execution and rapid firmware loading without external parallel bus overhead |
| RPMC with HMAC-SHA-256 authentication | Prevents replay attacks by cryptographically binding flash reads/writes to monotonic counter state and secret keys |
| Individual Block Lock (254 × 64KB + 32 × 4KB) | Allows granular, field-updatable protection of firmware partitions - e.g., bootloader locked while application remains writable |
| Three 256-byte OTP-locked Security Registers | Stores immutable root keys, HMAC secrets, or cryptographic seeds - prevents extraction or modification post-programming |
| 64-bit unique serial number | Provides device-level identity for secure provisioning, license enforcement, and anti-counterfeiting traceability |
Applications
| Secure Bootloader Storage | Firmware Over-the-Air (FOTA) Update |
|---|---|
|
Use Scenario: Storing signed bootloader image in immutable memory region during system power-on. IC Role / Device Role / Timing Role: Non-volatile code storage with hardware-enforced read-only access and cryptographic verification via RPMC. Use Value: Prevents unauthorized bootloader replacement by enforcing monotonic counter validation and HMAC-signed execution flow. |
Use Scenario: Receiving and validating encrypted firmware patches in connected IoT edge devices. IC Role / Device Role / Timing Role: Secure storage backend for differential updates, leveraging individual block locks to isolate patched sectors. Use Value: Enables atomic, rollback-safe updates with hardware-backed integrity checks - no software-only trust assumptions. |
| Industrial HMI Code Execution | Automotive ADAS Configuration Storage |
|
Use Scenario: Running GUI application code directly from flash on ARM Cortex-M7-based HMIs. IC Role / Device Role / Timing Role: XIP-capable Serial Flash delivering >50 MB/s effective throughput via Quad SPI Fast Read (EBh). Use Value: Eliminates RAM footprint for UI assets while maintaining deterministic latency and deterministic startup time. |
Use Scenario: Storing calibrated sensor fusion parameters and safety-critical configuration profiles in ADAS ECUs. IC Role / Device Role / Timing Role: Tamper-resistant non-volatile storage with OTP-locked Security Registers for calibration keys. Use Value: Meets ISO 26262 ASIL-B requirements for parameter integrity through hardware-rooted write protection and unique ID binding. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Serial Flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| W25Q128JVSIM | Lacks RPMC, no monotonic counters or HMAC-SHA-256; supports only standard Dual/Quad SPI and basic write protection | Suitable for cost-sensitive, non-security-critical firmware storage where cryptographic integrity is not required | Select W25Q128JVSIM if security features are unnecessary and legacy compatibility with W25Q family is preferred |
| MX25L12835FZNI-10G | Offers 104 MHz max clock (vs. 133 MHz), no RPMC, no 64-bit UID, but includes SFDP v1.6 and DTR support | Better suited for legacy SPI controllers requiring Dual Transfer Rate (DTR) or strict JEDEC SFDP compliance | Choose MX25L12835FZNI-10G when interoperability with older SPI host drivers or DTR timing is mandatory |
Compared with W25Q128JVSIM and MX25L12835FZNI-10G, the W25R128JVSIQ uniquely delivers hardware-enforced replay protection, monotonic counter state management, and OTP-secured key storage - making it the only option among the three qualified for secure boot, FOTA attestation, and ASIL-B parameter storage.
Availability
W25R128JVSIQ is available at Aetrix Electronics and suitable for industrial HMIs, automotive ADAS modules, secure IoT gateways, and medical edge devices requiring stable component supply, long-term lifecycle assurance, and guaranteed traceable sourcing.
Supply support for W25R128JVSIQ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based global semiconductor manufacturer specializing in specialty memory solutions, including SPI NOR Flash, mobile DRAM, and code storage ICs for embedded and industrial markets.
The W25R series was designed specifically to address growing demand for hardware-rooted security in firmware storage - integrating RPMC, OTP-locked registers, and cryptographic primitives directly into the flash die to eliminate external security co-processors.
FAQ
What is the primary security function enabled by RPMC in the W25R128JVSIQ?
The Replay Protection Monotonic Counter (RPMC) in the W25R128JVSIQ prevents replay attacks by enforcing cryptographic binding between flash read/write operations and monotonically increasing counter values. Each RPMC command (e.g., 9Bh + 02h) increments a selected 32-bit counter, and subsequent accesses require matching HMAC-SHA-256 signatures derived from secret keys stored in OTP-locked Security Registers - ensuring data authenticity and freshness without external crypto engines. This capability is intrinsic to the W25R128JVSIQ design and cannot be replicated by standard SPI NOR Flash.
Does the W25R128JVSIQ support execute-in-place (XIP) operation, and what interface mode is required?
Yes, the W25R128JVSIQ supports execute-in-place (XIP) operation using Quad SPI Fast Read commands (e.g., EBh), which deliver up to 532 MHz equivalent bandwidth. XIP requires the QE bit in Status Register-1 to be set (non-volatile or volatile), enabling IO0–IO3 as bidirectional data lines. The device's 133 MHz clock limit and uniform 4KB sector architecture ensure deterministic instruction fetch latency - a key requirement for real-time XIP use cases like industrial HMIs. This behavior is explicitly specified for the W25R128JVSIQ in its functional descriptions and timing tables.
How does individual block locking work in the W25R128JVSIQ, and how many blocks can be protected?
The W25R128JVSIQ implements individual block locking across 254 × 64KB main array blocks and 32 × 4KB top/bottom sector blocks, each with a dedicated lock bit. When a lock bit is set to '1', erase and program commands targeting that block/sector are ignored - even if global write enable is asserted. Lock state persists across power cycles unless explicitly unlocked via 39h instruction. All lock bits power up as '1', providing default protection. This granularity allows partitioned firmware layouts (e.g., locked bootloader + writable application) and is a confirmed feature of the W25R128JVSIQ per its datasheet Section 6.3.1 and instruction set table.
What package types and markings correspond to the W25R128JVSIQ part number?
The W25R128JVSIQ uses the 8-pin SOIC 208-mil package (Package Code S), with top-side marking "W25R128JV SIQ" - where 'S' denotes SOIC, 'I' indicates industrial temperature grade (–40°C to +85°C), and 'Q' signifies lead-free/RoHS compliance. This marking and package configuration are explicitly listed in the W25R128JV datasheet Table 10.5 (Valid Part Numbers and Top Side Marking) and Figure 1a (Pin Assignments). No WSON variants carry the 'SIQ' suffix - that identifier is exclusive to the SOIC-8 industrial-grade variant.
Can the W25R128JVSIQ be used as a drop-in replacement for the W25Q128JVSIM in existing designs?
No, the W25R128JVSIQ is not a drop-in replacement for the W25Q128JVSIM. While both share identical pinout, voltage range, and basic SPI commands, the W25R128JVSIQ introduces RPMC-specific instructions (e.g., 9Bh prefix), requires QE bit initialization for Quad mode, and has different status register layouts (e.g., LB3–LB1, DRV1–DRV0). Firmware must be updated to handle RPMC key provisioning, counter management, and enhanced write protection schemes. These differences are documented in Sections 6.2, 7.1, and 8.2 of the W25R128JV datasheet and apply specifically to the W25R128JVSIQ variant.
W25R128JVSIQ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH - NOR
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 3ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
W25R128JVSIQ FAQ
1.How can I place an order for W25R128JVSIQ through Aetrix?
Please submit a Request for Quotation (RFQ) for W25R128JVSIQ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25R128JVSIQ reliable?
The price and inventory of W25R128JVSIQ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25R128JVSIQ is usually 5 days.
3.What payment methods are accepted for W25R128JVSIQ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25R128JVSIQ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25R128JVSIQ?
W25R128JVSIQ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25R128JVSIQ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25R128JVSIQ?
For technical support, including W25R128JVSIQ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25R128JVSIQ requirements.
6.How does Aetrix verify that W25R128JVSIQ is sourced from the original manufacturer or authorized distributors?
All W25R128JVSIQ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25R128JVSIQ meets industry standards.
7.What is the process for return or replacement of W25R128JVSIQ?
All W25R128JVSIQ units undergo pre-shipment inspection (PSI). If there is an issue with W25R128JVSIQ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25R128JVSIQ part is unused and in its original packaging.
Return procedure for W25R128JVSIQ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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