Winbond Electronics Corporation W25X40CLSVIG
- Part No.:
- W25X40CLSVIG
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
W25X40CLSVIG.pdf
- Description:
- IC FLASH 4MBIT SPI 104MHZ 8VSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
W25X40CLSVIG from Winbond is a 4 M-bit (512 KB) serial flash memory IC supporting standard SPI, dual-output SPI, and dual I/O SPI interfaces. It features uniform 4 KB sectors, 32 KB and 64 KB blocks, 256-byte page programming, and operates from 2.3 V to 3.6 V with 1 mA active and <1 µA power-down current. It is used in embedded boot code storage, firmware update storage, and parameter retention in space-constrained industrial controllers.
For engineers reviewing the W25X40CLSVIG datasheet, W25X40CLSVIG pinout, W25X40CLSVIG application, or W25X40CLSVIG equivalent, key selection considerations include SPI mode compatibility (Mode 0/3), dual I/O timing at up to 104 MHz clock (208 Mbps effective), hardware write protection via /WP and status register bits, continuous read mode for XIP operation, and support for JEDEC ID and 64-bit unique serial number.
Technical Context
The W25X40CLSVIG implements a SPI-compatible command interface with dedicated /CS, CLK, DI (IO0), DO (IO1), /WP, and /HOLD pins. Its internal architecture includes a 2048-page × 256-byte array, status register with BUSY, WEL, BP2–BP0, TB, and SRP bits, and high-voltage generators for erase/program operations.
It supports three SPI operational modes: standard single-I/O (DI/DO), dual-output (IO0 only for output), and dual I/O (bidirectional IO0/IO1). Dual I/O instructions like BBh enable 2× throughput over standard SPI, while continuous read mode reduces instruction overhead to as few as 16 clocks per address access-enabling true execute-in-place (XIP) execution.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 4 M-bit (512 KB), organized as 2048 pages × 256 bytes |
| Operating Voltage | 2.3 V to 3.6 V - compatible with 2.5 V, 3.0 V, and 3.3 V logic systems |
| Max Clock Frequency | 104 MHz - enables 208 Mbps effective data rate using Fast Read Dual I/O (BBh) |
| Erase Granularity | Uniform 4 KB sectors, 32 KB blocks, 64 KB blocks - supports fine-grained firmware partitioning |
| Write Endurance | 100,000 program/erase cycles - suitable for field-updatable firmware with frequent minor revisions |
| Data Retention | 20 years at +25 °C - ensures long-term reliability in unattended embedded deployments |
| Operating Temperature | −40 °C to +85 °C - qualified for industrial-grade environmental operation |
Pinout & Package
W25X40CLSVIG is packaged in an 8-pin SOIC 150-mil (package code SN), with gull-wing leads, 1.27 mm pitch, and RoHS-compliant matte tin finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 /CS | Chip Select Input | Active-low enable: drives device into high-impedance state when high; required low-to-high transition after power-up before accepting commands |
| 2 DO (IO1) | Serial Data Output / Bidirectional I/O | Outputs data during standard SPI reads; becomes bidirectional IO1 during Dual SPI instructions (e.g., BBh) |
| 3 /WP | Hardware Write Protect Input | Active-low pin that, when asserted with SRP=1, locks status register writes - enables tamper-resistant configuration |
| 4 GND | Ground Reference | Primary signal and power return path; must be low-impedance for stable SPI timing and low-noise erase/program operation |
| 5 DI (IO0) | Serial Data Input / Bidirectional I/O | Accepts instructions/addresses/data in standard SPI; becomes bidirectional IO0 during Dual SPI - shares pin function across modes |
| 6 CLK | Serial Clock Input | Edge-triggered timing reference: rising edge samples input (DI/IO0), falling edge outputs data (DO/IO1); supports Mode 0 and Mode 3 |
| 7 /HOLD | Operation Hold Input | Pauses ongoing SPI transaction without deselecting device - preserves internal state during bus arbitration with other peripherals |
| 8 VCC | Power Supply | Single 2.3–3.6 V supply; powers internal charge pumps for erase/program; requires local 0.1 µF ceramic decoupling |
Key Features
| Feature | Design Value |
|---|---|
| Dual I/O SPI Interface | Enables BBh instruction for 2× bandwidth vs. standard SPI - critical for fast boot code shadowing and real-time firmware loading |
| Continuous Read Mode | Reduces instruction overhead to ≤16 clocks per address - allows efficient XIP execution without external RAM buffering |
| Hardware + Software Write Protection | Combines /WP pin control with non-volatile BP2–BP0, TB, and SRP bits - supports hierarchical, field-configurable memory lockdown |
| Uniform 4 KB Sector Architecture | Allows independent erasure of smallest unit - ideal for storing calibrated sensor offsets, network credentials, or runtime parameters |
| JEDEC ID & Unique 64-bit Serial Number | Enables automated BOM verification and secure device identity binding in production and field diagnostics |
Applications
| Industrial PLC Firmware Storage | Medical Device Bootloader Memory |
|---|---|
|
Use Scenario: Stores boot firmware and safety-critical configuration data in DIN-rail mounted programmable logic controllers operating continuously in factory environments. IC Role / Device Role / Timing Role: Non-volatile code storage with XIP-capable continuous read mode - eliminates need for external RAM during startup and enables deterministic boot timing. Use Value: 20-year data retention and −40 °C to +85 °C operation ensure firmware integrity across equipment lifetime without recalibration or replacement. |
Use Scenario: Holds certified bootloader and regulatory-compliant firmware images in portable diagnostic devices requiring traceable, immutable software versions. IC Role / Device Role / Timing Role: Secure, write-protected storage with JEDEC ID and unique serial number - enables audit-ready version tracking and anti-counterfeit validation. Use Value: Hardware /WP + SRP/BP bits prevent unauthorized firmware modification, satisfying IEC 62304 software lifecycle requirements. |
| Smart Energy Meter Parameter Log | Automotive Body Control Module Code Storage |
|
Use Scenario: Records time-stamped energy consumption metrics and tariff tables in utility-grade meters deployed outdoors for >15 years. IC Role / Device Role / Timing Role: High-endurance 4 KB sector erase - permits daily parameter updates without wearing out adjacent firmware regions. Use Value: 100,000 erase/write cycles and robust power-down current (<1 µA) extend battery life and reduce maintenance frequency. |
Use Scenario: Stores vehicle-specific calibration maps and CAN protocol stacks in body control units subject to automotive temperature cycling and EMI. IC Role / Device Role / Timing Role: Dual I/O SPI interface with 104 MHz clock - accelerates firmware updates over diagnostic CAN gateways with minimal host CPU overhead. Use Value: Fast Read Dual I/O (BBh) achieves 208 Mbps effective throughput - cuts reprogramming time by >50% vs. standard SPI alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| W25Q40EWSSIG | Successor generation: quad I/O support, 133 MHz max clock, 4 KB sectors retained, but uses newer 1.8 V / 3.3 V dual-voltage design | Requires updated driver support for QPI mode; not drop-in for legacy dual-I/O-only designs | Select W25Q40EWSSIG only if quad I/O bandwidth or extended voltage flexibility is required and firmware can be modified. |
| AT25SF041-SSHD-B | Same density and 4 KB sectors; supports standard/dual SPI but lacks continuous read mode and unique ID; rated for −40 °C to +105 °C | Better high-temp suitability, but no XIP optimization or device-level traceability | Choose AT25SF041-SSHD-B where extended temperature range is mandatory and XIP or serial number features are unnecessary. |
Compared with W25X40CLSVIG, W25Q40EWSSIG adds quad I/O and higher clock speed but requires firmware adaptation, while AT25SF041-SSHD-B trades XIP capability and unique ID for wider temperature tolerance - making W25X40CLSVIG optimal for cost-sensitive, XIP-dependent industrial firmware storage.
Availability
W25X40CLSVIG is available at Aetrix Electronics and suitable for industrial PLC firmware storage, medical device bootloader memory, and smart energy meter parameter logging requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for W25X40CLSVIG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor company specializing in specialty DRAM, mobile DRAM, and serial NOR/NAND flash memory solutions for industrial, communications, and consumer markets.
The W25X series was designed specifically for cost-sensitive, space-constrained embedded systems needing reliable boot code and parameter storage with SPI simplicity and performance beyond legacy serial flash devices.
FAQ
What is the maximum SPI clock frequency supported by the W25X40CLSVIG?
The W25X40CLSVIG supports a maximum SPI clock frequency of 104 MHz. When using Fast Read Dual I/O (instruction BBh), this yields an effective data transfer rate of 208 Mbps. This timing is validated across the full −40 °C to +85 °C operating range and requires adherence to AC electrical characteristics including tCH and tCL specifications in the datasheet. The W25X40CLSVIG does not support quad I/O or higher frequencies beyond 104 MHz.
Does the W25X40CLSVIG support execute-in-place (XIP) operation?
Yes, the W25X40CLSVIG supports true XIP operation via its Continuous Read Mode, which reduces instruction overhead to as few as 16 clock cycles per memory address access. This enables direct code execution from the flash array without copying to RAM, provided the host controller implements proper address auto-increment and timing alignment. The W25X40CLSVIG's 104 MHz dual I/O capability further enhances XIP performance in latency-sensitive applications.
How is hardware write protection implemented on the W25X40CLSVIG?
Hardware write protection on the W25X40CLSVIG is implemented using the active-low /WP pin in conjunction with the Status Register Protect (SRP) bit. When SRP = 1 and /WP is driven low, writes to the status register-including block protect bits (BP2–BP0) and top/bottom control (TB)-are disabled. This prevents accidental or malicious reconfiguration of memory protection settings. The /WP pin has no effect on status register writes when SRP = 0 (factory default).
What package type does the W25X40CLSVIG use, and what are its key mechanical dimensions?
The W25X40CLSVIG uses an 8-pin SOIC 150-mil package (package code SN), measuring 3.90 mm × 4.90 mm × 1.75 mm with 1.27 mm lead pitch and gull-wing leads. It complies with JEDEC MS-012 standards and is RoHS-compliant with matte tin lead finish. This package is pin-compatible with other W25X40CL variants in SOIC 150-mil, VSOP 150-mil, and WSON 6x5-mm footprints, though layout adaptation is required for non-SOIC variants.
Can the W25X40CLSVIG be used in automotive applications?
The W25X40CLSVIG is specified for industrial temperature range (−40 °C to +85 °C) and is not AEC-Q100 qualified. While it may function in some automotive body control or infotainment subsystems, Winbond does not guarantee automotive-grade reliability, failure-in-time (FIT) rates, or extended temperature performance beyond +85 °C. For automotive applications, Winbond recommends the AEC-Q100 qualified W25Q40EW or W25Q80DV families instead of the W25X40CLSVIG.
W25X40CLSVIG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- SpiFlash®
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH
- Memory Size:
- 4Mbit
- Memory Organization:
- 512K x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 800µs
- Access Time:
- -
- Voltage - Supply:
- 2.3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-VSOP
W25X40CLSVIG FAQ
1.How can I place an order for W25X40CLSVIG through Aetrix?
Please submit a Request for Quotation (RFQ) for W25X40CLSVIG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W25X40CLSVIG reliable?
The price and inventory of W25X40CLSVIG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W25X40CLSVIG is usually 5 days.
3.What payment methods are accepted for W25X40CLSVIG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W25X40CLSVIG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W25X40CLSVIG?
W25X40CLSVIG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W25X40CLSVIG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W25X40CLSVIG?
For technical support, including W25X40CLSVIG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W25X40CLSVIG requirements.
6.How does Aetrix verify that W25X40CLSVIG is sourced from the original manufacturer or authorized distributors?
All W25X40CLSVIG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W25X40CLSVIG meets industry standards.
7.What is the process for return or replacement of W25X40CLSVIG?
All W25X40CLSVIG units undergo pre-shipment inspection (PSI). If there is an issue with W25X40CLSVIG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W25X40CLSVIG part is unused and in its original packaging.
Return procedure for W25X40CLSVIG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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