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Winbond Electronics Corporation W947D6HBHX5I
- Part No.:
- W947D6HBHX5I
- Manufacturer:
- Winbond Electronics Corporation
- Category:
- Memory
- Package:
- 60-TFBGA
- Datasheet:
-
W947D6HBHX5I.pdf
- Description:
- IC DRAM 128MBIT LVCMOS 60VFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:2,502
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Product details
Overview
W947D6HBHX5I from Winbond is a 128Mb mobile LPDDR SDRAM in x16 configuration, operating at 166MHz (CL=3), with VDD/VDDQ = 1.7–1.95V, four internal banks, and support for Partial Array Self Refresh (PASR) and Automatic Temperature Compensated Self Refresh (ATCSR). It serves as main memory in space-constrained portable devices requiring low standby power and burst-oriented data access.
For engineers reviewing the W947D6HBHX5I datasheet, W947D6HBHX5I pinout, W947D6HBHX5I application, or W947D6HBHX5I equivalent, key selection criteria include its 60-ball VFBGA package, LPDDR-specific command protocol (CK/CK#, CKE, CS, BA0/BA1), CAS latency options (CL=2/3), burst length configurability (2/4/8/16), and industrial temperature range (–40°C to +85°C).
Technical Context
This LPDDR SDRAM implements a synchronous double-data-rate interface with differential clock inputs (CK/CK#), bidirectional data strobes (UDQS/LDQS), and LVCMOS-compatible signaling. Its four-bank architecture enables bank interleaving to hide precharge latency during sequential accesses.
Initialization requires strict sequencing: stable power with CKE high, ≥200μs of NOP/DESELECT after clock enable, PRECHARGE ALL, two AUTO REFRESH commands, then Mode Register and Extended Mode Register programming. The device supports programmable output drive strength, clock stop during idle, and deep power-down mode for ultra-low leakage.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128Mb (16M × 16-bit organization) |
| Interface Standard | JEDEC-compliant Mobile LPDDR (Low Power DDR SDRAM) |
| Max Clock Frequency | 166MHz - defines maximum sustained data transfer rate of 332 MT/s |
| CAS Latency | CL=2 or CL=3 - determines minimum read-to-output delay in clock cycles |
| Burst Length | 2, 4, 8, or 16 - sets number of consecutive data transfers per READ/WRITE command |
| Supply Voltage | VDD = VDDQ = 1.7–1.95V - dual-rail supply enables I/O noise isolation and low-power operation |
| Operating Temperature | –40°C to +85°C - qualified for industrial-grade embedded and mobile applications |
| Refresh Interval | 64ms - required periodic refresh to retain data; tREFI = 15.6μs per bank |
Pinout & Package
W947D6HBHX5I uses a 60-ball Very Thin Fine-Pitch Ball Grid Array (VFBGA) package, 8mm × 10.5mm × 0.6mm, optimized for mobile PCB layouts with tight spacing and thermal constraints.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A11 | Address Input | Row/column address bus; A10 doubles as Auto Precharge select |
| BA0, BA1 | Bank Address | Selects one of four internal banks for ACTIVE/READ/WRITE/PRECHARGE commands |
| CS, RAS, CAS, WE | Command Control | Encoded command inputs (e.g., CS+RAS+CAS+WE = PRECHARGE); all sampled synchronously on CK/CK# crossing |
| CK, CK# | Differential Clock | Edge-triggered reference for all timing; input sampling and DQ/DQS alignment occur at CK/CK# crossings |
| CKE | Clock Enable | Asynchronous entry into POWER DOWN, SELF REFRESH, or DEEP POWER DOWN when driven LOW |
| DQ0–DQ15 | Data I/O | 16-bit bidirectional data bus; double-data-rate transfers aligned to DQS edges |
| UDQS, LDQS | Data Strobe | UDQS clocks DQ8–DQ15; LDQS clocks DQ0–DQ7; edge-aligned on reads, center-aligned on writes |
| UDM, LDM | Data Mask | LDM masks DQ0–DQ7; UDM masks DQ8–DQ15; sampled on both DQS edges during WRITE |
| VDD, VSS | Core Power/Ground | Supplies logic core and command/address buffers; separate from I/O rails to reduce switching noise coupling |
| VDDQ, VSSQ | I/O Power/Ground | Isolated supply for DQ/DQS/DM drivers - critical for signal integrity and low-noise output |
Key Features
| Feature | Design Value |
|---|---|
| Partial Array Self Refresh (PASR) | Reduces self-refresh current by refreshing only active memory sub-arrays - cuts IDD6 by up to 50% in partial-use scenarios |
| Automatic Temperature Compensated Self Refresh (ATCSR) | Adjusts refresh rate dynamically based on die temperature - maintains data retention while minimizing power at low ambient temps |
| Deep Power Down (DPD) Mode | Enters ultra-low-leakage state (<10μA typical) with full register retention - enables rapid wake-up without reinitialization |
| Programmable Output Drive Strength | Configurable via Extended Mode Register - allows tuning of slew rate and termination to match PCB trace impedance and reduce EMI |
| Four Independent Banks | Enables concurrent row activation and pipelined access - hides tRP/tRC delays and improves effective bandwidth under mixed workloads |
| Auto Precharge Option | Automatically issues PRECHARGE after each READ/WRITE burst - simplifies controller logic and reduces command overhead |
Applications
| Smartphone Application Processor Memory | Portable Medical Imaging Buffer |
|---|---|
|
Use Scenario: Main memory for ARM-based application processors in smartphones with display rendering, camera preview, and OS multitasking. IC Role / Device Role / Timing Role: LPDDR SDRAM providing burst-accessible, low-latency storage for frame buffers, application code, and system heap. Use Value: PASR and ATCSR reduce average system power by 18–22% during screen-off and background operation, extending battery life without compromising performance. |
Use Scenario: Real-time image buffering in handheld ultrasound or dermatology scanners capturing 12-bit grayscale video streams. IC Role / Device Role / Timing Role: High-bandwidth, low-power frame buffer supporting 30fps 1024×768 capture with minimal thermal rise. Use Value: 166MHz clock rate and configurable burst length (8/16) deliver sustained 2.66 GB/s read throughput needed for lossless raw sensor data ingestion. |
| Industrial HMI Display Controller | Wearable Fitness Tracker Memory |
|
Use Scenario: Graphics memory in fanless panel PCs and factory-floor HMIs operating continuously in uncontrolled ambient temperatures. IC Role / Device Role / Timing Role: Industrial-temperature LPDDR SDRAM supplying pixel data to integrated display controllers with hardware compositing. Use Value: –40°C to +85°C rating and robust clock-stop capability ensure reliable operation during thermal cycling and intermittent UI updates. |
Use Scenario: System memory in compact wearable devices with aggressive size and battery-life targets (e.g., 7-day runtime on 100mAh cell). IC Role / Device Role / Timing Role: Low-voltage (1.8V nominal), low-IDD6 memory enabling extended sleep states between sensor sampling intervals. Use Value: Deep Power Down mode achieves <10μA retention current - reducing quiescent power by 92% versus standard LPDDR standby. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LPDDR SDRAM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MT46H128M16LFCK-6 IT:F | Same density (128Mb x16), but rated for 200MHz (CL=3) and uses 1.2V VDDQ; different ball pitch (0.5mm vs 0.65mm) | Targets newer platforms with lower I/O voltage and tighter BGA pitch; lacks ATCSR and PASR | Choose if migrating to 1.2V systems or requiring higher speed; verify PCB land pattern compatibility |
| IS42S16160F-6BLI | Standard SDR SDRAM (not LPDDR); 166MHz, 3.3V VDD/VDDQ; no deep power down or differential clocks | Suitable for cost-sensitive legacy designs where power efficiency is secondary to BOM simplicity | Only consider for non-battery-powered industrial controls; incompatible with LPDDR command protocol or low-voltage rails |
Compared with MT46H128M16LFCK-6 IT:F and IS42S16160F-6BLI, W947D6HBHX5I uniquely combines industrial temperature support, ATCSR, PASR, and deep power-down in a 1.8V LPDDR interface - making it optimal for battery-constrained, thermally variable mobile and portable embedded systems where runtime and reliability are co-prioritized.
Availability
W947D6HBHX5I is available at Aetrix Electronics and suitable for smartphone application processor memory, portable medical imaging buffers, industrial HMI display controllers, and wearable fitness tracker memory requiring stable component supply across long production lifecycles.
Supply support for W947D6HBHX5I includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Winbond Electronics is a Taiwan-based semiconductor company specializing in specialty memory solutions, including NOR/NAND Flash, SRAM, and low-power DRAM products for embedded and mobile markets.
W947D6HBHX5I belongs to Winbond's Mobile LPDDR SDRAM product line, designed specifically for battery-powered portable electronics demanding high bandwidth, ultra-low standby power, and robust thermal performance across extended temperature ranges.
FAQ
What is the exact memory organization of W947D6HBHX5I?
W947D6HBHX5I is organized as 16M words × 16 bits (128Mb total), with four internal banks. Row addresses use A0–A11 (12 bits), column addresses use A0–A8 (9 bits) for x16 configuration, and bank selection is handled by BA0/BA1. This structure enables efficient page-mode access and bank-level concurrency in the W947D6HBHX5I.
Does W947D6HBHX5I support both sequential and interleaved burst types?
Yes, W947D6HBHX5I supports both sequential and interleaved burst types, selected via bit A3 in the Mode Register. Sequential bursting increments column addresses linearly (e.g., 0→1→2→3), while interleaved bursting follows a scrambled order optimized for cache-line access patterns. This flexibility allows the W947D6HBHX5I to align with different memory controller architectures and workload profiles.
How does the Partial Array Self Refresh (PASR) feature function in W947D6HBHX5I?
PASR in W947D6HBHX5I allows the memory controller to specify which sub-arrays remain active during self-refresh, reducing refresh current by skipping inactive regions. Configured via Extended Mode Register bits, PASR modes include half-array, quarter-array, and octant refresh. This directly lowers IDD6 in W947D6HBHX5I during partial-memory-use scenarios such as static UI rendering or sensor buffering.
What is the required initialization sequence for W947D6HBHX5I before normal operation?
W947D6HBHX5I requires an 11-step initialization: (1) ramp VDD/VDDQ with CKE high, (2) apply stable clock, (3) wait ≥200μs with NOP/DESELECT, (4) issue PRECHARGE ALL, (5) wait tRP, (6) issue two AUTO REFRESH commands each followed by tRFC delay, (7) program Mode Register, (8) wait tMRD, (9) program Extended Mode Register, (10) wait tMRD, (11) device ready. Skipping any step risks undefined behavior in W947D6HBHX5I.
Can W947D6HBHX5I operate in Deep Power Down mode while retaining register settings?
Yes, W947D6HBHX5I retains all Mode Register and Extended Mode Register contents during Deep Power Down (DPD) mode. Upon exit (via CKE pulse), the device resumes operation without reinitialization - preserving burst length, CAS latency, drive strength, and PASR configuration. This enables fast wake-up in battery-powered applications using W947D6HBHX5I as system memory.
W947D6HBHX5I Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Winbond Electronics Corporation
- Series:
- -
- Package/Case:
- 60-TFBGA
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Volatile
- Memory Format:
- DRAM
- Technology:
- SDRAM - Mobile LPDDR
- Memory Size:
- 128Mbit
- Memory Organization:
- 8M x 16
- Memory Interface:
- LVCMOS
- Clock Frequency:
- 200 MHz
- Write Cycle Time - Word, Page:
- 15ns
- Access Time:
- 5 ns
- Voltage - Supply:
- 1.7V ~ 1.95V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 60-VFBGA (8x9)
W947D6HBHX5I FAQ
1.How can I place an order for W947D6HBHX5I through Aetrix?
Please submit a Request for Quotation (RFQ) for W947D6HBHX5I on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for W947D6HBHX5I reliable?
The price and inventory of W947D6HBHX5I are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for W947D6HBHX5I is usually 5 days.
3.What payment methods are accepted for W947D6HBHX5I?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for W947D6HBHX5I transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for W947D6HBHX5I?
W947D6HBHX5I orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your W947D6HBHX5I order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for W947D6HBHX5I?
For technical support, including W947D6HBHX5I datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your W947D6HBHX5I requirements.
6.How does Aetrix verify that W947D6HBHX5I is sourced from the original manufacturer or authorized distributors?
All W947D6HBHX5I products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that W947D6HBHX5I meets industry standards.
7.What is the process for return or replacement of W947D6HBHX5I?
All W947D6HBHX5I units undergo pre-shipment inspection (PSI). If there is an issue with W947D6HBHX5I, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The W947D6HBHX5I part is unused and in its original packaging.
Return procedure for W947D6HBHX5I:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
W947D6HBHX5I Tags
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