Renesas X40021S14I-A
- Part No.:
- X40021S14I-A
- Manufacturer:
- Renesas
- Category:
- Supervisors
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
X40021S14I-A.pdf
- Description:
- IC SUPERVISOR 2 CHANNEL 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:323
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Product details
Overview
X40021S14I-A from Intersil is a dual-voltage supervisor IC with integrated CPU supervisor, battery backup switch, watchdog timer, and 2-wire interface. It monitors VCC (2.9V threshold) and V2MON (programmable down to 0.9V), asserts active-low RESET on brownout, provides 50mA VOUT switching from VCC/VBATT, and supports 400kHz I²C communication. Used in industrial process controllers requiring reliable power-fail detection and SRAM backup.
For engineers reviewing the X40021S14I-A datasheet, X40021S14I-A pinout, X40021S14I-A application, or X40021S14I-A equivalent, key selection considerations include its -40°C to +85°C industrial temperature range, programmable VTRIP2 threshold, battery switchover hysteresis (±30mV), fault detection register, and nonvolatile watchdog/power-up timeout configuration via 2-wire interface.
Technical Context
The X40021S14I-A implements dual independent voltage monitoring: VTRIP1 fixed at 2.9V ±50mV for VCC supervision and VTRIP2 programmable down to 0.9V for secondary supply or unregulated rail monitoring. Its reset logic asserts RESET/RESET active-low when VCC drops below VTRIP1 or MR is pulled low, with user-selectable tPURST (50/200/400/800ms).
It integrates a 2-wire (I²C-compatible) interface operating at 400kHz, enabling nonvolatile configuration of watchdog timeout (25ms/200ms/1.4s/off) and power-on reset delay. The battery switch uses internal 5Ω (VCC→VOUT) and 80Ω (VBATT→VOUT) MOSFETs with 60mV hysteresis and BATT-ON CMOS output for external PNP current boosting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VTRIP1 Threshold | 2.9V ±50mV - Fixed detection point for primary supply brownout, valid down to VCC = 1V. |
| VTRIP2 Range | Programmable down to 0.9V - Enables precise secondary supply monitoring via I²C write sequence. |
| Power-on Reset Delay | Selectable: 50ms / 200ms (default) / 400ms / 800ms - Configurable nonvolatile timing for safe processor initialization. |
| Watchdog Timeout | Selectable: 25ms / 200ms / 1.4s / off - Factory default disabled; set via nonvolatile control register bits WD1/WD0. |
| VOUT Drive Capability | 50mA from VCC, 250µA from VBATT - Supports SRAM backup with automatic switchover at VBATT ±30mV. |
| Operating Supply | 2.7V to 5.5V - Compatible with 3.3V and 5V systems; standby current 25µA (watchdog on) or 6µA (off). |
| Interface Speed | 400kHz 2-wire bus - Enables fast configuration of thresholds, timeouts, and lock bits without additional GPIO. |
| Temperature Range | -40°C to +85°C - Qualified for industrial environments; SOIC-14 package (MDP0027). |
Pinout & Package
Package: 14-lead SOIC (150 mil), RoHS-compliant, MDP0027 footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 V2FAIL | Open-drain fail indicator | Active-low signal asserting when V2MON < VTRIP2; no power-up delay - used for early power-fail interrupt. |
| 2 V2MON | Secondary voltage input | Monitors second supply (e.g., unregulated rail); threshold programmable via I²C; powered by VOUT. |
| 3 LOWLINE | Early VCC detect output | Active-low open-drain flag for VCC < VTRIP1; requires external pull-up; faster than RESET assertion. |
| 4 WDO | Watchdog timeout output | Active-low open-drain signal triggered when watchdog timer expires; used to force system reset or log fault. |
| 5 MR | Debounced manual reset input | Pull-low initiates reset; internal weak pull-up eliminates external resistor; holds RESET for tPURST after release. |
| 6 RESET | Active-low reset output | X40021 variant: open-drain active-low output asserted on VCC brownout or MR; remains active for tPURST. |
| 7 VSS | Ground reference | System ground connection; must be low-impedance path for accurate voltage monitoring and noise immunity. |
| 8 SDA | 2-wire bidirectional data | I²C data line with open-drain output; used for configuration reads/writes and watchdog restart (start-stop sequence). |
| 9 SCL | 2-wire clock input | Master-generated clock synchronizing all I²C transactions; required for VTRIP programming and register access. |
| 10 WP | Write protect enable | High disables all writes (registers/memory); internal pull-down ensures default unprotected state at power-up. |
| 11 VBATT | Battery backup supply | Input for backup source (e.g., coin cell); powers internal logic and VOUT during VCC failure; connect to GND if unused. |
| 12 VOUT | Switched output voltage | Delivers VCC or VBATT to load (e.g., SRAM); auto-switches at VBATT ±30mV with hysteresis; requires 0.1µF capacitor. |
| 13 BATT-ON | Battery status indicator | CMOS output HIGH when VOUT = VBATT; drives external PNP transistor to boost current beyond 50mA during normal operation. |
| 14 VCC | Main supply input | Primary power source (2.7–5.5V); powers all circuitry except VBATT-dependent functions; monitored by VTRIP1. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent voltage supervision | VTRIP1 fixed at 2.9V for main rail; VTRIP2 programmable down to 0.9V for secondary rail or unregulated supply monitoring. |
| Nonvolatile configuration via 2-wire interface | Watchdog timeout and power-on reset delay stored in EEPROM-like registers; survives power cycles without reprogramming. |
| Intelligent battery switchover with hysteresis | Automatic VOUT sourcing from VCC or VBATT with 60mV hysteresis prevents oscillation during supply transitions. |
| Fault Detection Register (FDR) | Volatile 8-bit register tracking cause of last reset (LV1F/LV2F/WDF/MRF), enabling root-cause diagnostics in field-deployed systems. |
| Low-power operation | 6µA typical standby current with watchdog disabled; 1µA battery current in backup mode - extends coin-cell life in SRAM retention. |
| Reset validity down to 1V VCC | Ensures reliable reset assertion even during deep brownout conditions where many supervisors lose functionality. |
Applications
| Industrial Process Controller | Rack-Mounted Network Server |
|---|---|
|
Use Scenario: Continuous operation in factory automation PLCs with fluctuating 24V DC supplies converted to 5V/3.3V rails. IC Role / Device Role / Timing Role: Dual-supply monitor detecting both regulated 5V (VTRIP1=2.9V) and unregulated 24V-derived rail (VTRIP2 programmed to 12V) to trigger early warning before full shutdown. Use Value: Prevents corrupted I/O state during brownout by asserting RESET before microcontroller enters undefined behavior; V2FAIL interrupt allows graceful shutdown sequence. |
Use Scenario: High-availability server chassis with redundant PSUs and battery-backed real-time clock/SRAM modules. IC Role / Device Role / Timing Role: Primary supervisor for main 3.3V rail (VTRIP1=2.9V) and backup switch controller delivering stable VOUT to RTC/SRAM during PSU switchover. Use Value: Maintains SRAM data integrity during brief AC loss using VBATT; BATT-ON signal disables high-current loads to conserve battery during extended outage. |
| Communications Router | Intelligent Power Meter |
|
Use Scenario: Carrier-grade edge router with multiple voltage domains (CPU core, I/O, PHY) and remote firmware update capability. IC Role / Device Role / Timing Role: Watchdog timer (200ms timeout) monitors CPU activity during firmware updates; RESET output held for 200ms tPURST to ensure clean boot after recovery. Use Value: Guarantees recovery from hung update state without manual intervention; FDR register identifies whether failure was due to software hang or power event. |
Use Scenario: ANSI C12.22-compliant smart meter with tamper-detection circuitry and 10-year battery life requirement. IC Role / Device Role / Timing Role: Low-power supervisor (6µA standby) monitoring 3.3V rail while enabling periodic wake-up from deep sleep; VTRIP2 set to 2.0V to detect battery depletion. Use Value: Extends lithium-thionyl chloride battery life by minimizing quiescent current; programmable VTRIP2 allows precise end-of-life voltage detection before data loss. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6361KA29+T | Fixed 2.93V VCC threshold only; no secondary voltage monitor or battery switch; no I²C interface. | Suitable for single-rail systems without backup requirements; lacks V2MON, VOUT, or programmability. | Select when cost-sensitive designs require only basic 2.9V reset with no secondary monitoring or battery support. |
| TPS3808G33DBVR | Single 3.3V supervisor; no V2MON input, no battery switch, no I²C; includes push-pull RESET output. | Designed for simple 3.3V microcontroller reset; no dual-monitoring, no backup, no configuration flexibility. | Choose for compact 3.3V-only applications needing push-pull output and minimal BOM count - not for dual-rail or battery backup. |
Compared with MAX6361KA29+T and TPS3808G33DBVR, the X40021S14I-A uniquely integrates dual-voltage monitoring, battery switchover, and I²C-configurable watchdog/reset timing in a single SOIC-14 package - essential for industrial systems requiring diagnostic visibility and SRAM retention during power loss.
Availability
X40021S14I-A is available at Aetrix Electronics and suitable for industrial process controllers, rack-mounted network servers, communications routers, and intelligent power meters requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for X40021S14I-A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil (now part of Renesas Electronics) is a semiconductor company specializing in precision analog, power management, and interface ICs for industrial, communications, and computing markets.
The X40021S14I-A belongs to Intersil's CPU supervisor family designed for systems demanding robust power sequencing, fault diagnostics, and nonvolatile configurability - particularly where dual-rail monitoring and battery-backed memory retention are critical.
FAQ
What is the factory-default VTRIP1 and VTRIP2 setting for X40021S14I-A?
The X40021S14I-A ships with VTRIP1 fixed at 2.9V ±50mV and VTRIP2 preset to 1.6V ±50mV per the "-A" suffix designation in the ordering table. These thresholds are nonvolatile and remain stable over temperature and time unless reprogrammed via the documented I²C sequence. The X40021S14I-A supports VTRIP2 adjustment down to 0.9V using the WDO-programming method described in the datasheet.
How does the battery switchover hysteresis work on X40021S14I-A?
The X40021S14I-A implements 60mV hysteresis around the VBATT switchover point: VOUT switches from VCC to VBATT when VCC falls below VBATT − 30mV, and switches back to VCC when VCC rises above VBATT + 30mV. This prevents oscillation during marginal supply conditions. The X40021S14I-A also requires a 0.1µF capacitor on VOUT for stability, as specified in the pin description.
Can X40021S14I-A generate a reset signal when V2MON drops below VTRIP2?
No - the X40021S14I-A does not assert RESET directly on V2MON failure. Instead, V2FAIL provides an open-drain output that goes active-low when V2MON < VTRIP2. System designers must wire V2FAIL to a microcontroller interrupt or OR it externally with RESET using a diode or logic gate. The X40021S14I-A's RESET output responds only to VCC (VTRIP1) or MR events.
What is the maximum current X40021S14I-A can deliver from VBATT to VOUT?
The X40021S14I-A delivers up to 250µA from VBATT to VOUT in backup mode. This is sufficient to maintain data in low-leakage SRAM devices but not for active logic. The device uses an 80Ω typical internal switch for VBATT→VOUT, and the BATT-ON output enables external PNP transistors to supply higher currents (>50mA) when VCC is present - a capability unique to the X40021S14I-A among dual supervisors.
Is X40021S14I-A still recommended for new designs?
No - the X40021S14I-A is marked "NOT RECOMMENDED FOR NEW DESIGNS" in its May 2006 datasheet (FN8112.1), with "NO RECOMMENDED REPLACEMENT" stated explicitly. However, Aetrix Electronics maintains inventory and supply chain support for legacy industrial and telecom systems requiring this specific part. Engineers should consult Renesas for modern alternatives if redesigning.
X40021S14I-A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 2
- Voltage - Threshold:
- 2.9V, 4.6V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
X40021S14I-A FAQ
1.How can I place an order for X40021S14I-A through Aetrix?
Please submit a Request for Quotation (RFQ) for X40021S14I-A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for X40021S14I-A reliable?
The price and inventory of X40021S14I-A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for X40021S14I-A is usually 5 days.
3.What payment methods are accepted for X40021S14I-A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for X40021S14I-A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for X40021S14I-A?
X40021S14I-A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your X40021S14I-A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for X40021S14I-A?
For technical support, including X40021S14I-A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your X40021S14I-A requirements.
6.How does Aetrix verify that X40021S14I-A is sourced from the original manufacturer or authorized distributors?
All X40021S14I-A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that X40021S14I-A meets industry standards.
7.What is the process for return or replacement of X40021S14I-A?
All X40021S14I-A units undergo pre-shipment inspection (PSI). If there is an issue with X40021S14I-A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The X40021S14I-A part is unused and in its original packaging.
Return procedure for X40021S14I-A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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