Renesas X9111TV14IZ
- Part No.:
- X9111TV14IZ
- Manufacturer:
- Renesas
- Category:
- Digital Potentiometers
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
X9111TV14IZ.pdf
- Description:
- IC DGTL POT 100KOHM 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,769
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
X9111TV14IZ from Intersil is a single-supply, low-power, 1024-tap digitally controlled potentiometer (XDCP™) with SPI interface, 100kΩ end-to-end resistance, ±20% tolerance, and 14-lead TSSOP package. It functions as a 3-terminal potentiometer or 2-terminal variable resistor for precision analog trimming in voltage regulators, amplifier gain control, and sensor signal conditioning.
For engineers reviewing the X9111TV14IZ datasheet, X9111TV14IZ pinout, X9111TV14IZ application, or X9111TV14IZ equivalent, this page delivers verified technical context, real-world circuit roles, confirmed SPI timing (2.5 MHz max), wiper resistance (40Ω typ at 5V), nonvolatile data register endurance (100,000 cycles), and power-up recall behavior - all specific to the industrial-grade (-40°C to +85°C) X9111TV14IZ variant.
Technical Context
The X9111TV14IZ implements a 1023-element CMOS resistor array with decoded 10-bit Wiper Counter Register (WCR) controlling one of 1024 tap switches. Its SPI interface complies with standard hardware conventions: SI latched on SCK rising edge, SO clocked out on falling edge, and CS/HOLD/ WP enabling device selection and write protection.
It integrates four 10-bit nonvolatile Data Registers (DR0–DR3) for persistent storage of wiper positions, with DR0 automatically loaded to WCR at power-up. The device supports volatile wiper updates (tWRL ≤10 µs), nonvolatile register writes (tWR ≤10 ms), and status monitoring via dedicated WIP bit.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| End-to-end resistance | 100kΩ ±20% - defines full-scale analog range for voltage divider or current-limiting applications |
| Resolution | 1024 taps (10-bit) - enables 0.1% incremental adjustment granularity across full resistance range |
| VCC operating range | 2.7V to 5.5V - supports single-supply operation across 3.3V and 5V systems without level-shifting |
| Wiper resistance | 40Ω typical at 5V - contributes minimal insertion error in precision voltage division paths |
| Standby current | <3µA maximum - enables battery-powered or ultra-low-power system integration |
| Data retention | 100 years - ensures long-term calibration stability without periodic refresh |
| SPI clock frequency | 2.5 MHz max - compatible with standard microcontroller SPI peripherals without overclocking |
| Power-on recall | Loads DR0 into WCR - guarantees known startup state without host initialization sequence |
Pinout & Package
Package: 14-lead TSSOP (4.4mm width), RoHS-compliant, M14.173 drawing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SO) | Serial data output | Tri-state SPI output; data clocked on SCK falling edge; supports bus sharing with SI |
| 2 (A0) | Device address input | LSB of 2-bit slave address; sets I²C/SPI address alongside A1 for multi-device configurations |
| 3 (NC) | No connect | Internally unused; must remain unconnected per manufacturing test requirements |
| 4 (CS) | Chip select | Active-low enable; initiates SPI communication and places SO in high-impedance when deasserted |
| 5 (SCK) | Serial clock | Master-generated clock; rising edge latches SI, falling edge clocks SO |
| 6 (SI) | Serial data input | SPI data input; accepts opcodes, addresses, and register values; supports shared SO/SI wiring |
| 7 (VSS) | System ground | Reference node for all analog and digital circuitry; requires low-impedance connection to PCB ground plane |
| 8 (WP) | Hardware write protect | Low-active lock for nonvolatile DR writes; prevents accidental overwriting of calibration data |
| 9 (A1) | Device address input | MSB of 2-bit slave address; combines with A0 to support up to four X9111 devices on same SPI bus |
| 10 (HOLD) | Serial bus pause | Halts ongoing SPI transaction without resetting state; requires SCK low before assertion |
| 11 (RW) | Wiper terminal | Analog output node; connects to amplifier feedback, regulator adjust, or sensor bias point |
| 12 (RH) | High terminal | Fixed end of resistor array; tied to VCC or reference voltage in 3-terminal pot configuration |
| 13 (RL) | Low terminal | Fixed end of resistor array; tied to VSS or return path in 3-terminal pot configuration |
| 14 (VCC) | System supply voltage | Single power rail for analog array and digital interface; must exceed RH/RL/RW voltages |
Key Features
| Feature | Design Value |
|---|---|
| Four nonvolatile Data Registers | Enables storage of multiple calibrated wiper positions (e.g., min/max/trim/default) without external EEPROM |
| Power-on recall from DR0 | Guarantees repeatable startup behavior in unattended systems like industrial sensors or remote monitors |
| Hardware write protect (WP) | Prevents field corruption of stored calibration data during firmware updates or brown-out conditions |
| 100,000-cycle endurance per register bit | Supports lifetime recalibration in maintenance-intensive equipment such as medical analyzers or test instruments |
| Low 3µA standby current | Extends battery life in portable instrumentation where the potentiometer remains powered but inactive |
| 100-year data retention | Eliminates need for periodic reprogramming in infrastructure systems with 10+ year deployment lifecycles |
Applications
| Audio Volume Control | Voltage Regulator Adjustment |
|---|---|
|
Use Scenario: Adjusting audio signal amplitude in consumer soundbars or professional mixer channels. IC Role / Device Role / Timing Role: Functions as 2-terminal variable resistor in amplifier feedback loop to set gain without mechanical wear. Use Value: Delivers 1024-step resolution for smooth volume transitions and eliminates potentiometer drift-induced channel imbalance. |
Use Scenario: Setting output voltage of adjustable linear regulators (e.g., LM317) in lab power supplies. IC Role / Device Role / Timing Role: Replaces mechanical trimmer in R1/R2 divider network to enable remote or automated voltage calibration. Use Value: Enables factory-programmed output voltages and field-updatable settings without hardware modification. |
| Sensor Signal Conditioning | Offset Voltage Trim |
|
Use Scenario: Scaling and zeroing outputs from temperature or pressure transducers in HVAC controllers. IC Role / Device Role / Timing Role: Acts as programmable gain/offset element in instrumentation amplifier front-end circuits. Use Value: Compensates for sensor unit-to-unit variation and thermal drift using stored DR values per device. |
Use Scenario: Nulling input offset errors in precision op-amp circuits used in data acquisition modules. IC Role / Device Role / Timing Role: Provides fine-adjustment resistance in op-amp input bias networks to cancel DC error. Use Value: Achieves sub-millivolt offset correction stability over time and temperature without manual recalibration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digitally controlled potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5241BRMZ10 | 256-tap (8-bit) resolution; I²C interface; 10kΩ end-to-end resistance; no hardware write protect pin | Limited resolution reduces fine-tuning capability in high-precision sensor scaling; lacks WP pin for secure calibration storage | Select when lower cost and I²C compatibility outweigh need for 10-bit resolution and write protection |
| MCP41010-I/P | 1024-tap SPI interface; 10kΩ end-to-end resistance; no nonvolatile data registers; wiper position lost on power cycle | Requires host MCU to reload wiper position at startup; unsuitable for unattended systems needing guaranteed boot state | Select when board space is constrained (8-pin PDIP) and host-controlled initialization is acceptable |
Compared with AD5241BRMZ10 and MCP41010-I/P, the X9111TV14IZ provides superior resolution, integrated nonvolatile storage for multiple calibration points, hardware write protection, and guaranteed power-on state - making it optimal for industrial systems requiring autonomous, tamper-resistant analog tuning.
Availability
X9111TV14IZ is available at Aetrix Electronics and suitable for industrial sensor calibration, programmable power supplies, and embedded audio control requiring stable component supply across extended temperature ranges (-40°C to +85°C).
Supply support for X9111TV14IZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation is a precision analog and power management IC specialist, now part of Renesas Electronics, with expertise in high-reliability industrial and infrastructure solutions.
The X9111 product line delivers digitally programmable analog front-ends for calibration-critical applications including test equipment, medical devices, and factory automation systems.
FAQ
What is the operating temperature range for the X9111TV14IZ?
The X9111TV14IZ is rated for industrial operation from -40°C to +85°C, as confirmed by the Ordering Information table in FN8159 Rev 5.00. This range applies specifically to the "X9111TV14IZ" variant, distinguishing it from commercial-grade versions like X9111TV14Z (0°C to +70°C). The device maintains full specification compliance-including 100kΩ resistance tolerance, 40Ω wiper resistance, and 2.5 MHz SPI timing-across this entire range.
Does the X9111TV14IZ retain its wiper position after power loss?
The X9111TV14IZ does not retain its active wiper position in the volatile Wiper Counter Register (WCR) after power loss. However, it loads the contents of nonvolatile Data Register 0 (DR0) into the WCR at power-up, ensuring a known, user-programmable startup state. DR0 and three additional nonvolatile registers (DR1–DR3) each support 100,000 write cycles and 100-year data retention, making X9111TV14IZ suitable for systems requiring repeatable boot behavior without host intervention.
Can the X9111TV14IZ be used as a 2-terminal variable resistor?
Yes, the X9111TV14IZ can be configured as a 2-terminal variable resistor by connecting either RH or RL to RW, effectively using only two pins. The datasheet explicitly states this capability on page 1, and Figure 12 shows the three-terminal potentiometer configuration while Figure 13 illustrates the two-terminal variable resistor implementation. This mode is commonly applied in current-setting or gain-control circuits where only one adjustable resistance node is required.
What is the maximum SPI clock frequency supported by the X9111TV14IZ?
The X9111TV14IZ supports a maximum SPI clock frequency of 2.5 MHz, as specified in the AC Timing table (Page 12 of FN8159 Rev 5.00). This value is guaranteed across the full industrial temperature range (-40°C to +85°C) and VCC range (2.7V to 5.5V). Exceeding 2.5 MHz may result in unreliable opcode decoding or register access, particularly during nonvolatile writes which require internal high-voltage generation timed to the clock.
How does the hardware write protect (WP) pin function on the X9111TV14IZ?
The WP pin on the X9111TV14IZ is an active-low hardware lock that prevents nonvolatile writes to the four Data Registers (DR0–DR3). When WP is held LOW, commands to write or transfer data into these registers are ignored, though volatile WCR updates and reads remain fully operational. This feature protects factory-calibrated settings from accidental overwrite during field firmware updates or system debugging, and is distinct from software-based protection schemes requiring command execution.
X9111TV14IZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XDCP™
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 1
- Number of Taps:
- 1024
- Resistance (Ohms):
- 100k
- Interface:
- SPI
- Memory Type:
- Non-Volatile
- Voltage - Supply:
- 5V
- Features:
- Selectable Address
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- ±300ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 14-TSSOP
- Operating Temperature:
- -40°C ~ 85°C
- Resistance - Wiper (Ohms) (Typ):
- 150
X9111TV14IZ FAQ
1.How can I place an order for X9111TV14IZ through Aetrix?
Please submit a Request for Quotation (RFQ) for X9111TV14IZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for X9111TV14IZ reliable?
The price and inventory of X9111TV14IZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for X9111TV14IZ is usually 5 days.
3.What payment methods are accepted for X9111TV14IZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for X9111TV14IZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for X9111TV14IZ?
X9111TV14IZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your X9111TV14IZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for X9111TV14IZ?
For technical support, including X9111TV14IZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your X9111TV14IZ requirements.
6.How does Aetrix verify that X9111TV14IZ is sourced from the original manufacturer or authorized distributors?
All X9111TV14IZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that X9111TV14IZ meets industry standards.
7.What is the process for return or replacement of X9111TV14IZ?
All X9111TV14IZ units undergo pre-shipment inspection (PSI). If there is an issue with X9111TV14IZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The X9111TV14IZ part is unused and in its original packaging.
Return procedure for X9111TV14IZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
X9111TV14IZ Tags

-
MCP4018T-103E/LT
Microchip Technology

-
MCP4018T-503E/LT
Microchip Technology

-
MCP4011T-103E/SN
Microchip Technology

-
MCP4018T-104E/LT
Microchip Technology

-
MCP4017T-503E/LT
Microchip Technology

-
MCP4018T-502E/LT
Microchip Technology

-
MCP4017T-103E/LT
Microchip Technology

-
MCP4531T-103E/MF
Microchip Technology

-
MCP4021T-202E/SN
Microchip Technology

-
MCP4023T-103E/CH
Microchip Technology

-
MCP4022T-503E/CH
Microchip Technology

-
MCP4551T-502E/MS
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

