Renesas X9313ZS-3T1
- Part No.:
- X9313ZS-3T1
- Manufacturer:
- Renesas
- Category:
- Digital Potentiometers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
X9313ZS-3T1.pdf
- Description:
- IC DGTL POT 1KOHM 32TAP 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,056
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
X9313ZS-3T1 from Intersil is a digitally controlled potentiometer (XDCP™) with 32 linear tap positions, 3-wire serial interface (CS/U/D/INC), nonvolatile wiper position storage, and 1kΩ end-to-end resistance. It operates from 3V to 5.5V, supports terminal voltages from –VCC to +VCC, and functions as either a three-terminal potentiometer or two-terminal variable resistor in precision analog trimming applications.
For engineers reviewing the X9313ZS-3T1 datasheet, X9313ZS-3T1 pinout, X9313ZS-3T1 application, or X9313ZS-3T1 equivalent, this device delivers deterministic wiper positioning, power-up recall of stored settings, ±20% RTOTAL tolerance, temperature-compensated linearity, and low-power CMOS operation suitable for embedded calibration, sensor offset adjustment, and programmable gain control circuits.
Technical Context
The X9313ZS-3T1 implements a 31-element resistor array with make-before-break wiper switching, driven by a 5-bit up/down counter decoded to select one of 32 tap points. Wiper position is stored in nonvolatile memory on CS↑ with INC HIGH, enabling reliable power-up restoration without external EEPROM.
Its 3-wire interface uses asynchronous edge-triggered logic: INC toggles wiper position on negative edge, U/D sets direction, and CS enables selection and initiates store operations. The device maintains wiper state during standby with ≤500µA current and exhibits ±0.2 MI relative linearity and ±1 MI absolute linearity over temperature.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| RTOTAL | 1kΩ ±20% - defines full-scale resistance range for voltage divider or current-limiting use |
| Wiper Resolution | 32 taps (31 segments) - provides 3.125% step resolution across full scale |
| VCC Range | 3V to 5.5V - supports dual-supply systems and battery-powered designs |
| Terminal Voltage Range | –VCC to +VCC - enables bipolar signal handling without external level-shifting |
| Wiper Resistance | 40Ω typical at VCC = 5V - contributes minimal series error in precision divider configurations |
| Nonvolatile Endurance | 100,000 data changes per bit - ensures long-term field reliability for recalibration cycles |
| Data Retention | 100 years - guarantees factory-set or user-trimmed values persist over product lifetime |
Pinout & Package
Package: 8-lead SOIC (Pb-free, RoHS compliant), 3.9mm × 4.9mm body, 1.27mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Positive supply input | Power source for internal logic and resistor array; must be stable before CS/INC activation |
| VSS | Ground reference | Common return path for all digital and analog functions; decoupling required near pin |
| RH/VH | High terminal | Fixed end of resistor array; voltage polarity defined by external circuit, not internal logic |
| RL/VL | Low terminal | Fixed opposite end of resistor array; forms complete resistive path with RH/VH |
| RW/VW | Wiper output | Movable tap point; connects to one of 32 nodes; series resistance ≤100Ω affects accuracy at high frequencies |
| CS | Chip select | Active-low enable; rising edge with INC HIGH triggers nonvolatile store; controls standby entry |
| U/D | Direction control | Static logic level defining wiper increment/decrement direction during INC transitions |
| INC | Increment clock | Negative-edge triggered; each pulse moves wiper one tap; timing requires tIL ≥1µs, tIH ≥1µs |
Key Features
| Feature | Design Value |
|---|---|
| Nonvolatile wiper storage | Retains last programmed position across power cycles without external memory or backup power |
| 3-wire serial interface | Requires only three GPIOs (CS/U/D/INC) - eliminates need for SPI/I²C peripherals or address decoding logic |
| Make-before-break switching | Prevents open-circuit glitches during wiper movement - critical for stable biasing in amplifier feedback networks |
| Temperature-compensated array | ±300 ppm/°C RTOTAL drift and ±20 ppm/°C ratiometric drift - maintains voltage division accuracy over industrial temperature range |
| Bipolar terminal capability | Supports –VCC to +VCC applied across RH/VH and RL/VL - enables AC-coupled and dual-supply signal conditioning |
Applications
| Audio Signal Level Control | Sensor Offset Calibration |
|---|---|
Use Scenario: Adjusting volume or gain in analog audio paths within consumer or professional equipment. IC Role / Device Role / Timing Role: Functions as a digitally programmable voltage divider in op-amp feedback or input attenuation networks. Use Value: Enables silent, glitch-free level changes via software control while retaining last setting after power loss - eliminating manual trimpots and service visits. | Use Scenario: Compensating for initial offset voltage in pressure, temperature, or current-sense amplifiers. IC Role / Device Role / Timing Role: Serves as a two-terminal variable resistor in the reference leg of instrumentation amplifiers or ADC front-ends. Use Value: Provides factory-trimmable or field-updatable nulling with 1kΩ resolution and 100-year data retention - ensuring long-term measurement stability. |
| Programmable Power Supply Feedback | Industrial DAC Output Scaling |
Use Scenario: Setting output voltage of adjustable DC-DC converters or linear regulators in automated test equipment. IC Role / Device Role / Timing Role: Acts as the upper resistor in a feedback divider network for voltage-mode regulation loops. Use Value: Allows remote reconfiguration of output voltage without hardware change; nonvolatile storage ensures safe boot-up at nominal setpoint. | Use Scenario: Scaling full-scale range of 8- to 12-bit DAC outputs to match sensor input ranges in PLC analog I/O modules. IC Role / Device Role / Timing Role: Configures gain in an op-amp-based multiplying DAC interface stage. Use Value: Delivers precise 32-step scaling with <±1 MI linearity error - improving effective resolution and reducing calibration overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digitally controlled potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5243BRMZ10 | I²C interface, dual-channel, 256-tap resolution, 10kΩ RTOTAL | Requires I²C master; higher resolution but larger package and no bipolar terminal support | Choose when multi-channel control or finer adjustment granularity is needed and I²C infrastructure exists |
| MCP41010-I/P | SPITM interface, single-channel, 256-tap, 10kΩ RTOTAL, no nonvolatile memory | Needs external MCU to reload wiper on power-up; lacks automatic recall functionality | Prefer when cost-sensitive designs can tolerate volatile operation and SPI is already used elsewhere |
Compared with AD5243BRMZ10 and MCP41010-I/P, the X9313ZS-3T1 offers unique advantages in low-pin-count 3-wire control, guaranteed power-up recall, bipolar voltage handling, and compact SOIC-8 footprint - making it optimal for space-constrained, self-contained analog trimming where reliability and simplicity are prioritized over resolution or multi-channel density.
Availability
X9313ZS-3T1 is available at Aetrix Electronics and suitable for audio signal conditioning, sensor calibration, programmable power supplies, and industrial DAC scaling requiring stable component supply and long-term parameter retention.
Supply support for X9313ZS-3T1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation is a leading provider of precision analog and power management ICs, serving industrial, infrastructure, and high-end consumer markets with high-reliability, application-optimized solutions.
The X9313 family was designed specifically for solid-state replacement of mechanical potentiometers in embedded systems requiring nonvolatile trim, low power, and robust operation across extended temperature ranges.
FAQ
What is the maximum allowable voltage across RH/VH and RL/VL terminals for X9313ZS-3T1?
The X9313ZS-3T1 specifies ΔV = |VH − VL| ≤ 4V for the Z-series variant. This limit applies regardless of VCC level and is enforced to prevent resistor array degradation. Exceeding 4V risks permanent damage to the 1kΩ element structure and invalidates the ±20% RTOTAL tolerance guarantee. Always ensure external circuitry clamps differential voltage within this bound.
Does X9313ZS-3T1 require an external pull-up or pull-down resistor on the INC pin?
No, the X9313ZS-3T1 does not require external biasing on the INC pin. Its input leakage current is ±10µA over temperature, and VIH/VIL thresholds are defined relative to VCC and VSS. Driving INC directly from a CMOS GPIO (with rail-to-rail swing) meets all timing and voltage requirements specified in the datasheet, including tIL ≥1µs and tIH ≥1µs minimum pulse widths.
Can X9313ZS-3T1 be used in a true bipolar signal path where VH is at +2.5V and VL is at –2.5V?
Yes, the X9313ZS-3T1 supports terminal voltages from –VCC to +VCC. With VCC = 5V, VH and VL may be biased at +2.5V and –2.5V respectively, satisfying the –VCC to +VCC specification. However, the absolute differential voltage must remain ≤4V, and VW output will swing between those rails. Ensure downstream circuitry references the same ground and tolerates the resulting wiper voltage range.
How many wiper position changes can X9313ZS-3T1 endure before failure?
The X9313ZS-3T1 is rated for 100,000 data changes per bit in its nonvolatile memory. This endurance figure applies to store operations (CS↑ with INC HIGH), not incremental INC toggles. Each store writes the current 5-bit wiper value to EEPROM. Field life exceeds 10 years even with daily recalibration, assuming ≤27 store cycles per day - well within the 100k-cycle rating.
Is the wiper resistance of X9313ZS-3T1 constant across all tap positions?
No, the wiper resistance of X9313ZS-3T1 varies slightly with position due to internal switch geometry and routing, but remains bounded: 40Ω typical and ≤100Ω maximum at VCC = 5V. This variation is included in the ±1 MI absolute linearity spec and does not affect monotonicity. For precision applications, treat RW as a fixed series impedance added to the selected segment resistance.
X9313ZS-3T1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- XDCP™
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 1
- Number of Taps:
- 32
- Resistance (Ohms):
- 1k
- Interface:
- Up/Down (U/D, INC, CS)
- Memory Type:
- Non-Volatile
- Voltage - Supply:
- 3V ~ 5.5V
- Features:
- -
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- ±300ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 8-SOIC
- Operating Temperature:
- 0°C ~ 70°C
- Resistance - Wiper (Ohms) (Typ):
- 40
X9313ZS-3T1 FAQ
1.How can I place an order for X9313ZS-3T1 through Aetrix?
Please submit a Request for Quotation (RFQ) for X9313ZS-3T1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for X9313ZS-3T1 reliable?
The price and inventory of X9313ZS-3T1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for X9313ZS-3T1 is usually 5 days.
3.What payment methods are accepted for X9313ZS-3T1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for X9313ZS-3T1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for X9313ZS-3T1?
X9313ZS-3T1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your X9313ZS-3T1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for X9313ZS-3T1?
For technical support, including X9313ZS-3T1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your X9313ZS-3T1 requirements.
6.How does Aetrix verify that X9313ZS-3T1 is sourced from the original manufacturer or authorized distributors?
All X9313ZS-3T1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that X9313ZS-3T1 meets industry standards.
7.What is the process for return or replacement of X9313ZS-3T1?
All X9313ZS-3T1 units undergo pre-shipment inspection (PSI). If there is an issue with X9313ZS-3T1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The X9313ZS-3T1 part is unused and in its original packaging.
Return procedure for X9313ZS-3T1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
X9313ZS-3T1 Tags

-
MCP4018T-103E/LT
Microchip Technology

-
MCP4018T-503E/LT
Microchip Technology

-
MCP4011T-103E/SN
Microchip Technology

-
MCP4018T-104E/LT
Microchip Technology

-
MCP4017T-503E/LT
Microchip Technology

-
MCP4018T-502E/LT
Microchip Technology

-
MCP4017T-103E/LT
Microchip Technology

-
MCP4531T-103E/MF
Microchip Technology

-
MCP4021T-202E/SN
Microchip Technology

-
MCP4023T-103E/CH
Microchip Technology

-
MCP4022T-503E/CH
Microchip Technology

-
MCP4551T-502E/MS
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

